Patents by Inventor Tetsuya Itano

Tetsuya Itano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8670049
    Abstract: A photoelectric conversion device includes a pixel unit including a photoelectric converter, an amplifier arranged on the output side of the pixel unit, an output unit arranged on the output side of the amplifier, a first restriction circuit, and a second restriction circuit. The first restriction circuit restricts, between the amplifier and the output unit, a noise level read out from the pixel unit via the amplifier in reading out the noise level from the pixel unit. The second restriction circuit restricts, between the photoelectric converter and the amplifier, a noise level to be provided to the amplifier in reading out the noise level from the pixel unit.
    Type: Grant
    Filed: December 15, 2011
    Date of Patent: March 11, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Toshiaki Ono, Toru Koizumi, Tetsuya Itano
  • Publication number: 20140054663
    Abstract: At least one exemplary embodiment is directed to a solid state image sensor including at least one antireflective layer and/or non rectangular shaped wiring layer cross section to reduce dark currents and 1/f noise.
    Type: Application
    Filed: October 30, 2013
    Publication date: February 27, 2014
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Toru Koizumi, Akira Okita, Tetsuya Itano, Sakae Hashimoto, Ryuichi Mishima
  • Publication number: 20140014817
    Abstract: An image sensor comprises a pixel portion formed by arraying pixels including photoelectric conversion portions in a matrix, a plurality of A/D converters which are provided in a one-to-one correspondence to pixel columns of the pixel portion, an adding unit which adds pixel signals from a plurality of pixel columns to each other, and a connecting portion capable of inputting, to an arbitrary A/D converter, a sum signal obtained by adding the pixel signals by the adding unit.
    Type: Application
    Filed: June 28, 2013
    Publication date: January 16, 2014
    Inventors: Yusaku Motonaga, Kazuo Yamazaki, Tetsuya Itano
  • Patent number: 8598901
    Abstract: A system includes: a plurality of pixels arranged in a matrix; a reference signal generating unit for generating a ramp signal; A/D converters each arranged correspondingly to each of columns to A/D-convert a signal from the pixel; a counter that performs a count operation according to an output of the ramp signal, and supplies the count signal through the count signal line to the A/D converter; and a counter test circuit that is provided independently from the A/D converter, and tests the counter, based on a matching of the expected value of the count signal with the count signal supplied through the count signal line from the counter. This configuration allows the count signal to be checked concurrently with imaging of an object.
    Type: Grant
    Filed: September 21, 2012
    Date of Patent: December 3, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiroki Hiyama, Tetsuya Itano, Kazuhiro Saito, Yu Maehashi, Koichiro Iwata, Kohichi Nakamura
  • Patent number: 8553123
    Abstract: An image sensing apparatus includes a pixel array including an optical black region and effective pixel region, and a scanning unit which scans the pixel array. The scanning unit includes a first shift register which scans the optical black region by a shift operation, and a second shift register which scans the effective pixel region by a shift operation. The second shift register starts the shift operation during a first period when the first shift register scans the optical black region, and scans a readout region serving as a partial region of the effective pixel region during a second period following the first period.
    Type: Grant
    Filed: April 26, 2011
    Date of Patent: October 8, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Tomoyuki Noda, Tetsuya Itano, Koichiro Iwata, Hidekazu Takahashi
  • Patent number: 8547446
    Abstract: In a known fully-differential amplifier, it has been difficult to set a power voltage VDD to a low level while maintaining the signal amplitude and increase the amplitude of an output signal without increasing the power voltage VDD. The present invention provides a fully-differential amplifier including a voltage-current conversion unit, a first current-voltage conversion unit, and a second current-voltage conversion unit, where a resistance element included in the voltage-current conversion unit, a resistance element included in the first current-voltage conversion unit, and a resistance element included in the second current-voltage conversion unit are connected in parallel with one another.
    Type: Grant
    Filed: October 25, 2010
    Date of Patent: October 1, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventor: Tetsuya Itano
  • Publication number: 20130248953
    Abstract: An apparatus according to the present invention in which a first substrate including a photoelectric conversion element and a gate electrode of a transistor, and a second substrate including a peripheral circuit portion are placed upon each other. The first substrate does not include a high-melting-metal compound layer, and the second substrate includes a high-melting-metal compound layer.
    Type: Application
    Filed: May 20, 2013
    Publication date: September 26, 2013
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Nobuyuki Endo, Tetsuya Itano, Kazuo Yamazaki, Kyouhei Watanabe, Takeshi Ichikawa
  • Publication number: 20130175652
    Abstract: In a solid-state imaging device, a photoelectric conversion unit, a transfer transistor, and at least a part of electric charge holding unit, among pixel constituent elements, are disposed on a first semiconductor substrate. An amplifying transistor, a signal processing circuit other than a reset transistor, and a plurality of common output lines, to which signals are read out from a plurality of pixels, are disposed on a second semiconductor substrate.
    Type: Application
    Filed: September 20, 2011
    Publication date: July 11, 2013
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Kazuo Yamazaki, Tetsuya Itano, Nobuyuki Endo, Kyouhei Watanabe
  • Patent number: 8466403
    Abstract: An apparatus according to the present invention in which a first substrate including a photoelectric conversion element and a gate electrode of a transistor, and a second substrate including a peripheral circuit portion are placed upon each other. The first substrate does not include a high-melting-metal compound layer, and the second substrate includes a high-melting-metal compound layer.
    Type: Grant
    Filed: December 21, 2010
    Date of Patent: June 18, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Nobuyuki Endo, Tetsuya Itano, Kazuo Yamazaki, Kyouhei Watanabe, Takeshi Ichikawa
  • Patent number: 8441558
    Abstract: An solid state image pickup device including a plurality of photoelectric conversion regions (PD1, PD2) for generating carriers by photoelectric conversions to accumulate the generated carriers, an amplifying unit for amplifying the carriers, being commonly provided to at least two photoelectric conversion regions, a first and a second transfer units (Tx-MOS1, Tx-MOS2) for transferring the carriers accumulated in the first and the second photoelectric conversion regions, respectively, a first and a second carrier accumulating units (Cs1, Cs2) for accumulating the carriers flowing out from the first and the second photoelectric conversion regions through a first and a second fixed potential barriers, respectively, and a third and a fourth transfer units (Cs-MOS1, Cs-MOS2) for transferring the carriers accumulated in the first and the second carrier accumulating units to the amplifying unit, respectively.
    Type: Grant
    Filed: March 10, 2011
    Date of Patent: May 14, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Akira Okita, Toru Koizumi, Masanori Ogura, Shin Kikuchi, Tetsuya Itano
  • Publication number: 20130105663
    Abstract: A member for a solid-state image pickup device having a bonding plane with no gaps and a method for manufacturing the same are provided. The manufacturing method includes the steps of providing a first substrate provided with a photoelectric converter on its primary face and a first wiring structure, providing a second substrate provided with a part of a peripheral circuit on its primary face and a second wiring structure, and performing bonding so that the first substrate, the first wiring structure, the second wiring structure, and the second substrate are disposed in this order. In addition, at least one of an upper face of the first wiring structure and an upper face of the second wiring structure has a concave portion, and a conductive material forms a bottom face of the concave portion.
    Type: Application
    Filed: July 4, 2011
    Publication date: May 2, 2013
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Nobuyuki Endo, Tetsuya Itano, Kazuo Yamazaki, Kyouhei Watanabe, Junji Iwata
  • Publication number: 20130087685
    Abstract: An imaging apparatus includes a plurality of unit pixels arranged in a matrix and configured to generate a signal by photoelectric conversion, a plurality of pixel output lines connected to each column of the unit pixels, a plurality of column amplifiers configured to amplify a signal of the pixel output lines, and a driving circuit configured to generate a control signal of the column amplifiers. Each of the column amplifiers includes first and second input terminals, an output terminal, an input capacitance between the first and second input terminals, and a first switch between the second input and output terminals. The driving circuit is configured to generate the control signal so as to make a period for switching the first switch from a conductive state to a non-conductive state longer than a period for switching the first switch from the non-conductive state to the conductive state.
    Type: Application
    Filed: September 10, 2012
    Publication date: April 11, 2013
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Tetsuya Itano, Hiroki Hiyama, Kazuhiro Saito, Kohichi Nakamura, Koichiro Iwata, Yu Maehashi, Takeshi Akiyama
  • Publication number: 20130088627
    Abstract: A photoelectric conversion device includes a counter circuit configured to count a first clock signal to output a count signal thereof, a second clock signal generation unit configured to generate a second clock signal based on the first clock signal, and a clock synchronization unit configured to output a count start signal in synchronization with the second clock signal, wherein the counter circuit performs a counting operation in response to the count start signal synchronized with the second clock signal.
    Type: Application
    Filed: September 12, 2012
    Publication date: April 11, 2013
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Kohichi Nakamura, Hiroki Hiyama, Tetsuya Itano, Kazuhiro Saito, Yu Machashi, Koichiro Iwata
  • Publication number: 20130088292
    Abstract: A solid-state imaging apparatus includes: an amplifier circuit configured to amplify a signal from pixel; and a reference signal generating circuit configured to generate a ramp signal, wherein feedback capacitor elements having the same structure are electrically connected to a capacitive feedback type amplifier of the amplifier circuit and to a capacitive feedback type amplifier of the reference signal generating circuit respectively, and a connecting configuration between an amplifier of the amplifier circuit and the feedback capacitor element and a connecting configuration between an amplifier of the reference signal generating circuit and the feedback capacitor element are the same.
    Type: Application
    Filed: September 13, 2012
    Publication date: April 11, 2013
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Yu Maehashi, Hiroki Hiyama, Tetsuya Itano, Kazuhiro Saito, Kohichi Nakamura
  • Publication number: 20130087686
    Abstract: A solid-state imaging apparatus includes a plurality of pixels arrayed in a matrix, and configured to generate signals by photoelectric conversion; a plurality of read-out circuits disposed on each column of the plurality of pixels arrayed in a matrix pattern, and configured to read out the signals from the plurality of pixels; a plurality of comparison units configured to compare the signals output from the plurality of read-out circuits with a reference signal whose level changes with time; a counter configured to count a clock signal after the level of the reference signal starts a change; a storage unit configured, when a magnitude relationship between the signals output from the plurality of the read-out circuits and the reference signal is reversed; and a reset unit configured to reset the count value stored in the storage unit.
    Type: Application
    Filed: September 11, 2012
    Publication date: April 11, 2013
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Tetsuya Itano, Hiroki Hiyama, Kazuhiro Saito, Kohichi Nakamura, Yu Maehashi
  • Publication number: 20130088625
    Abstract: A solid-state imaging apparatus includes: a plurality of pixels arranged in a matrix; a plurality of amplifier circuits each arranged correspondingly to each of columns of the pixels, for amplifying a signal from the pixel; and a current source transistor whose source is supplied with a power source voltage and which supplies the amplifier circuit with a bias current. When the current source transistor is operating in the saturation region, the gate voltage of the current source transistor that is supplied from the bias line is sampled and held. The gate voltage of the current source transistor with respect to the power source voltage is controlled to the sampled voltage, thereby suppressing variation. This suppression can, in turn, suppress occurrence of line noise and a lateral smear due to difference of drop in voltage of a power source line concerning a column circuit on each row.
    Type: Application
    Filed: September 12, 2012
    Publication date: April 11, 2013
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Koichiro Iwata, Hiroki Hiyama, Tetsuya Itano, Kohichi Nakamura, Kazuhiro Saito
  • Publication number: 20130087687
    Abstract: A photoelectric conversion apparatus includes, on one substrate, a pixel driving unit and a signal processing unit that includes a digital circuit configured to execute signal processing. A first voltage and a second voltage different in value from the first voltage are supplied to the digital circuit of the pixel driving unit. A third voltage and a fourth voltage different in value from the third voltage are supplied to the digital circuit of the signal processing unit. A main portion of a first conductor that supplies the first voltage to the digital circuit of the pixel driving unit and a main portion of a second conductor that supplies the third voltage to the digital circuit of the signal processing unit are isolated from each other.
    Type: Application
    Filed: September 12, 2012
    Publication date: April 11, 2013
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Hiroki Hiyama, Tetsuya Itano, Kazuhiro Saito, Kohichi Nakamura, Yu Maehashi, Koichiro Iwata
  • Patent number: 8411187
    Abstract: A photoelectric conversion device includes a photoelectric conversion region having a plurality of photoelectric conversion elements and a first MOS transistor configured to read a signal in response to an electric charge of each photoelectric conversion element; and a peripheral circuit region having a second MOS transistor configured to drive the first MOS transistor and/or amplify the signal read from the photoelectric conversion region, the photoelectric conversion region and the peripheral circuit region being located on the same semiconductor substrate, wherein an impurity concentration in a drain of the first MOS transistor is lower than an impurity concentration in a drain of the second MOS transistor.
    Type: Grant
    Filed: March 4, 2011
    Date of Patent: April 2, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takanori Watanabe, Tetsuya Itano, Hidekazu Takahashi, Shunsuke Takimoto, Kotaro Abukawa, Hiroaki Naruse, Shigeru Nishimura, Masatsugu Itahashi
  • Publication number: 20130070136
    Abstract: In an A/D converter, a first analog signal which is input to an input terminal in a state in which the input terminal and a reference voltage line are connected via a first capacitor is converted into digital data when a reference signal is supplied to the reference signal line in a state in which the reference signal line and a first input terminal of a comparator are connected via the first capacitor. A second analog signal which is input to the input terminal in a state in which the input terminal and the reference voltage line are connected via a second capacitor is converted into digital data when the reference signal is supplied to the reference signal line in a state in which the reference signal line and the first input terminal of the comparator are connected via the second capacitor.
    Type: Application
    Filed: August 9, 2012
    Publication date: March 21, 2013
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Hiroki Hiyama, Kohichi Nakamura, Kazuhiro Saito, Tetsuya Itano
  • Publication number: 20130068930
    Abstract: Provided is an A/D converter including an input terminal, a reference signal line for supplying a reference signal which changes temporally, a comparator, a correction capacitor connected to an inverting input terminal of the comparator; and an output circuit which outputs digital data corresponding to an analog signal input to the input terminal. In a first state in which a total voltage of a first analog signal and an offset voltage of the comparator is held in the correction capacitor, a second analog signal input to the input terminal is supplied to a non-inverting input terminal of the comparator, and the second analog signal or the total voltage is changed using the reference signal, thereby outputting, from the output circuit, digital data.
    Type: Application
    Filed: August 22, 2012
    Publication date: March 21, 2013
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Kohichi Nakamura, Hiroki Hiyama, Tetsuya Itano, Kazuhiro Saito