Abstract: The disclosure relates to accessing memory content with a high temporal locality of reference. An embodiment of the disclosure stores the content in a data buffer, determines that the content of the data buffer has a high temporal locality of reference, and accesses the data buffer for each operation targeting the content instead of a cache storing the content.

Abstract: Aggregating cache maintenance instructions in processor-based devices is disclosed. In this regard, a processor-based device comprises one or more processing elements (PEs), each providing an aggregation circuit configured to detect a first cache maintenance instruction in an instruction stream. The aggregation circuit then aggregates one or more subsequent, consecutive cache maintenance instructions in the instruction stream with the first cache maintenance instruction until an end condition is detected (e.g., detection of a data synchronization barrier instruction or a cache maintenance instruction targeting a non-consecutive memory address or a different memory page than a previous cache maintenance instruction, and/or detection that an aggregation limit has been exceeded). After detecting the end condition, the aggregation circuit generates a single cache maintenance request representing the aggregated cache maintenance instructions.

Abstract: Antenna switching circuitry includes an antenna node, a number of signal path nodes, and a number of switching elements. Each one of the switching elements is coupled between a different one of the signal path nodes and the antenna node. At least two of the signal path nodes are coupled together in order to form a low distortion node, such that the switching elements between the low distortion node and the antenna node are used to pass a low-distortion radio frequency (RF) signal. By coupling two of the signal path nodes together, a low distortion signal path is created to the antenna. Creating a low distortion signal path using multiple switching elements allows for the size of the switching elements to remain small, which reduces the parasitic capacitance of each one of the switches and therefore the insertion loss of the antenna switching circuitry.

Abstract: A method for displaying live and archived cycling classes comprising displaying information about cycling classes that can be accessed by a first user using a first stationary bike via a digital communication network on a display screen at a first location, whereby the first user can select either a live cycling class or select among a plurality of archived cycling classes, outputting digital video and audio content comprising the selected cycling class, detecting performance parameters from the first stationary bike at a particular point in the selected class, displaying at least one of the performance parameters on the display screen, and displaying performance parameters from a second stationary bike at a second location on the display screen such that at least one of the performance parameters from the first stationary bike and at least one of the performance parameters from the second stationary bike at the same point in the class are presented for comparison.

Abstract: A mobile insurance architecture includes a wireless communication interface that connects mobile client devices to wireless networks. An insurance server cluster that includes a group of independent network servers operates and appears to mobile client devices as if the group of independent network servers were a single computer server. An adaptive transmission controller communicates with the insurance server cluster and processes content in multiple mobile formats that may be optimized to the screen sizes of the mobile client devices. The insurance server cluster responds to native application clients resident to the mobile client devices. The native application clients contain code stored on a non-transitory media that render insurance quoting services, insurance claims services, on-line insurance policy services, usage based insurance services, mobile monitoring services, or insurance agency management services.

Abstract: A steering assistance actuator for a vehicle includes a actuator shaft, a torque sensor, a motor, a drive mechanism and a drive housing. The actuator shaft is rotatable about a first axis. The actuator shaft includes an integral torque sensor. The motor has an output shaft rotatable about a second axis. The second axis is substantially parallel to the first axis. The drive mechanism is disposed between and drivingly connects the motor and the steering column. The drive mechanism provides a speed reduction from the motor to the actuator shaft. The drive housing encloses the torque sensor and the drive mechanism and is separate from a steering gear. The drive housing also has a mounting feature to which a housing of the motor is fixed. The drive housing also has a first bearing and a second bearing rotatably supporting the actuator shaft in the drive housing.

Abstract: Systems and methods are directed to prefetch mechanisms involving non-equal magnitude stride values. A non-equal magnitude functional relationship between successive stride values, may be detected, wherein the stride values are based on distances between target addresses of successive load instructions. At least a next stride value for prefetching data, may be determined, wherein the next stride value is based on the non-equal magnitude functional relationship and a previous stride value. Data prefetch may be from at least one prefetch address calculated based on the next stride value and a previous target address. The non-equal magnitude functional relationship may include a logarithmic relationship corresponding to a binary search algorithm.

Abstract: An electronic control assembly for an appliance can include features that provide for ergonomic assembly of the electronic control assembly, as well as a sturdy fit and feel when the electronic control assembly is fully assembled. Electronic control assembly can include features that reduce the number of fasteners, such as e.g., screws, required to assemble electronic control assembly.

Abstract: A method for displaying live and archived cycling classes comprising displaying information about cycling classes that can be accessed by a first user using a first stationary bike via a digital communication network on a display screen at a first location, whereby the first user can select either a live cycling class or select among a plurality of archived cycling classes, outputting digital video and audio content comprising the selected cycling class, detecting performance parameters from the first stationary bike at a particular point in the selected class, displaying at least one of the performance parameters on the display screen, and displaying performance parameters from a second stationary bike at a second location on the display screen such that at least one of the performance parameters from the first stationary bike and at least one of the performance parameters from the second stationary bike at the same point in the class are presented for comparison.

Abstract: Providing efficient handling of memory array failures in processor-based systems is disclosed. In this regard, in one aspect, a memory controller of a processor-based device is configured to detect a defect within a memory element of a plurality of memory elements of a memory array. In response, a disable register of one or more disable registers is set to correspond to the memory element to indicate that the memory element is disabled. The memory controller receives a memory access request to a memory address corresponding to the memory element, and determines, based on one or more disable registers, whether the memory element is disabled. If so, the memory controller disallows the memory access request. Some aspects may provide that the memory controller, in response to detecting the defect, provides a failure indication to an executing process, and subsequently receives, from the executing process, a request to set the disable register.

Abstract: Systems and methods for precise invalidation of cache lines of a virtually indexed virtually tagged (VIVT) cache include associating, with each cache line of the VIVT cache, at least a translation lookaside buffer (TLB) index corresponding to a TLB entry which comprises a virtual address to physical address translation for the cache line. The TLB entries are inclusive of the cache lines of the VIVT cache. Upon receiving an invalidate instruction, the invalidate instruction is filtered at the TLB to determine if the invalidate instruction might affect cache lines in the VIVT cache. If the invalidate instruction might affect cache lines in the VIVT cache, the TLB indices of the TLB entries which match the invalidate instruction are determined, and only the cache lines of the VIVT cache which are associated with the affected TLB indices are selectively invalidated.

Abstract: A mobile insurance architecture includes a wireless communication interface that connects mobile client devices to wireless networks. An insurance server cluster that includes a group of independent network servers operates and appears to mobile client devices as if the group of independent network servers were a single computer server. An adaptive transmission controller communicates with the insurance server cluster and processes content in multiple mobile formats that may be optimized to the screen sizes of the mobile client devices. The insurance server cluster responds to native application clients resident to the mobile client devices. The native application clients contain code stored on a non-transitory media that render insurance quoting services, insurance claims services, on-line insurance policy services, usage based insurance services, mobile monitoring services, or insurance agency management services.

Abstract: Providing dynamic determination of memory attributes in processor-based systems is disclosed. In this regard, in some aspects, a processor-based system comprises a processor device and one or more memory devices, each of which is associated with one of a plurality of memory attributes. The processor device transmits a request to one of the memory devices to determine the memory attribute associated with the memory device. In response to the request, the memory device provides a memory attribute indication that informs the processor device of the memory attribute associated with the memory device. The processor device in some aspects then performs subsequent memory access operations on the memory device based on the memory attribute indication. Some aspects may provide that the processor device also stores the memory attribute indication, and performs subsequent memory access operations based on the stored memory attribute indication.

Abstract: The present invention provides a novel in vitro release assay for the accurate, reproducible quantitation of vincristine sulfate release from liposomes.

Abstract: An isolated or synthesized compound of Formula I and salts thereof are provided. A compound isolated from Actinomadura and having a chemical formula of C38H60O12 is also provided. Compositions including the compounds and methods of using the compounds to treat bacterial infections including gram positive infections such as C. difficile are also disclosed.

Abstract: A processor includes a queue for storing instructions processed within the context of a current value of a register field, where for some embodiments the instruction is undefined or defined, depending upon the register field at time of processing. After a write instruction (an instruction that writes to the register field) executes, the queue is searched for any entries that contain instructions that depend upon the executed write instruction. Each such entry stores the value of the register field at the time the instruction in the entry was processed. If such an entry is found in the queue and its stored value of the register field does not match the value that the write instruction wrote to the register field, then the processor flushes the pipeline and restarts at a state so as to correctly execute the instruction.

Abstract: Improved methods for efficiently constituting liposome encapsulated vincristine for intravenous injection (VSLI) with reduced risk of operational errors and contamination are disclosed.

Abstract: Systems and methods for managing access to a cache relate to determining one or more execute permissions associated with a write-address of a write-request to the cache. The cache may be a unified cache for storing data as well as instructions. If there is a write-miss in the cache for the write-request, a cache controller may determine whether to implement a write-allocate policy or a write-no-allocate policy for servicing the write-miss, based on the one or more execute permissions. The one or more execute permissions can relate to a privilege level associated with the write-address. Execute permissions of a producing agent which generated the write-request and an execute permission of a consuming agent which can execute from the write-address may be based on the privilege levels of the producing agent and the consuming agent, respectively.

Abstract: Photosensitive lithium zinc aluminosilicate glasses that can be selectively irradiated and cerammed to provide patterned regions of glass and lithium-based glass ceramic, and composite glass articles made from such glasses and glass ceramics are provided. Compressive and tensile stress at the interface of the lithium-based glass-ceramic and lithium zinc aluminosilicate glass may be used to frustrate crack propagation in such a composite glass/glass ceramic article. Methods of making composite glass articles comprising such lithium-based glass ceramics and lithium zinc aluminosilicate glasses are also provided.

Abstract: A new and distinct Gardenia cultivar named ‘Prince Charles’ which is characterized by the combination of a compact and freely-branching growth habit, dense foliage, recurrent flowering from spring until dormancy, an abundance of white double flowers with a sweet fragrance, and the stability of these characteristics from generation to generation.