Abstract: The present disclosure provides a substrate-enhanced comparator and electronic device, the comparator including: a cross-coupled latch, for connecting input signals to the gate of a cross-coupled MOS transistor to form a first input of the latch; output buffers, connected to the cross-coupled latch for amplifying output signals of the latch; AC couplers, connected to the output buffers for receiving and amplifying the output signals of the latch, coupling the output signals to substrates of the cross-coupled MOS transistors to form second inputs of the latch. The cross-coupled latch is also for output signal regenerative latching based on input signals sampled at the first inputs and input signals sampled at the second inputs. The present disclosure introduces additional substrate inputs to the cross-coupled structure of the conventional latch as the second inputs of the latch.

Abstract: The present disclosure provides an array substrate and a display panel including the same. The array substrate includes a plurality of pixel units. Each of the pixel units includes a main pixel electrode, a sub-pixel electrode, a first thin film transistor (TFT) electrically connected to the sub-pixel electrode, a second TFT electrically connected to the first TFT, and a third TFT electrically connected to the main pixel electrode. The first TFT includes a first channel and a first semiconductor layer. The first channel includes two or more subchannels. The first semiconductor layer includes two or more semiconductor sublayers. Each of the semiconductor sublayers is disposed in a corresponding subchannel.

Abstract: The present application provides a small-molecule inhibitor targeting an EB virus nuclear antigen protein, and/or a pharmaceutical composition containing the same, which can be used for the treatment of a disease caused by EBNA1 activity, such as, but not limited to, cancer, infectious mononucleosis, chronic fatigue syndrome, multiple sclerosis, systemic lupus erythematosus and/or rheumatoid arthritis. The present application further provides a small-molecule inhibitor targeting an EB virus nuclear antigen protein, and/or a pharmaceutical composition containing the same, which can be used for the treatment of a disease caused by EBV infection in a lytic and/or latent phase.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a first conductive line over a substrate. The semiconductor device structure includes a first protection cap over the end portion. The first protection cap and the first conductive line are made of different conductive materials, and the first protection cap exposes a peripheral region of a top surface of the end portion. The semiconductor device structure includes a first photosensitive dielectric layer over the substrate, the first conductive line, and the first protection cap. The semiconductor device structure includes a conductive via structure passing through the first photosensitive dielectric layer and connected to the first protection cap.

Abstract: A method and a system for initiating a location-based topic are provided. The system includes a serving system that allows a user to initiate the location-based topic within a social media and a graphical user interface initiated in a user device through a software means. The method allows the user to initiate a topic page when browsing digital contents in the social media via the graphical user interface. Besides being able to browse various location-based topics created by other users and the responses, the user himself can also create a location-based topic provided for other users to browse and respond to. Through web and computer technology, the serving system allows the user to browse the various digital contents via the social media and interact with other users through the various location-based topics.

Abstract: The application provides a method, apparatus, device and medium for detecting an internal short-circuit fault of a battery cell. The method includes obtaining electrical signal values for each of m battery cells of a battery pack, when it is in a preset condition including that a current detection is an nth detection; performing following steps for a target battery cell: calculating a first parameter of the target battery cell using the electrical signal values of the target battery cell, which characterizes a degree of fluctuation of the electrical signal values; calculating a second parameter that characterizes a degree of dispersion between the first parameter of the target battery cell and first parameters of other battery cells; and determining that an internal short-circuit fault occurs in the target battery cell, under a condition that the second parameter is greater than a threshold.

Abstract: An approach includes a new power and ground structure description language (PSDL) will allow the user to describe the desired routing pattern for each layer and on a user defined region by region basis, including how the pattern will be laid out in the design with respect to other patterns from a different layer. The new PSDL also gives the complete picture of the entire power and ground structure, instead of just a layer-by-layer view from a single command. It also allowed flexibility in alignment especially when dealing with track misalignments, thus avoiding the extensive trial-and-error steps needed to calculate offsets and distances to maintain pattern alignment using previous approaches. Additionally, because PSDL is not tightly dependent on the design size and/or floorplan, transferring the desired power and ground structure from one design to another will be very easy with only few adjustments.

Abstract: A method for forming a semiconductor device structure is provided. The method includes providing a chip structure including a substrate and a wiring structure over a first surface of the substrate. The method includes removing a first portion of the wiring structure adjacent to the hole to widen a second portion of the hole in the wiring structure. The second portion has a first width increasing in a first direction away from the substrate. The method includes forming a first seed layer over the wiring structure and in the hole. The method includes thinning the substrate from a second surface of the substrate until the first seed layer in the hole is exposed. The method includes forming a second seed layer over the second surface of the substrate and the first seed layer in the hole.

Abstract: A semiconductor device includes a substrate, at least one via, a liner layer and a conductive layer. The substrate includes an electronic circuitry. The at least one via passes through the substrate. The at least one via includes a plurality of concave portions on a sidewall thereof. The liner layer fills in the plurality of concave portions of the at least one via. The conductive layer is disposed on the sidewall of the at least one via, covers the liner layer, and extends onto a surface of the substrate. The thickness of the conductive layer on the sidewall of the at least one via is varied.

Abstract: A pharmaceutical composition. The pharmaceutical composition comprises citric acid, paeoniflorin and gallic acid, wherein the weight ratio of citric acid, paeoniflorin and gallic acid is about 100:(1˜8):(0.1˜5). Also provided is use of the pharmaceutical composition in the treatment of rectal hemangioma and in the treatment of hemorrhoids in patients with leukemia and hemophilic.

Abstract: A pipelined analog-to-digital converter and an output calibration method for the same. The pipelined analog-to-digital converter introduces an error calibration mechanism on the basis of traditional pipelined analog-to-digital converters through a control module, an equivalent gain error extraction module, an error storage module and a coding reconstruction module to compensate for gain errors and setup errors caused by operational amplifiers in a pipelined conversion module, so that the analog-to-digital conversion accuracy is improved, and requirements for the gain and bandwidth of the operational amplifier are relaxed, which can effectively reduce the power consumption of the analog-to-digital converter and the complexity of the corresponding analog circuit; a curve fitting method is adopted to obtain an ideal output sequence and then calculate errors; meanwhile, extraction and calibration of equivalent gain errors are all done in digital ways, and therefore accuracy thereof is high.

Abstract: The present disclosure provides a tool-less assembly hard disk drive bracket, including: a fixation rack, including a fixation bracket portion and a fixation arm connected with a first side of the fixation bracket portion; a rotation rack, including a rotation arm connected with a second side of the fixation bracket portion, and a rotation bracket portion connected with the rotation arm, the rotation bracket portion is connected with the fixation bracket portion to support a hard disk drive; and at least two connecting components, arranged on an inner side of the fixation arm and the rotation arm, respectively, the connecting components connect and fix the hard disk drive in the structure formed by the fixation rack and the rotation rack. The present disclosure is simple in installation, convenient in assembly and disassembly, and easy to maintain, thereby having high economy and practicability.

Abstract: A highly linear time amplifier with power supply rejection. In a reset stage, the threshold value of an over-threshold detector is used for resetting an output node of an amplifier, to eliminate the impact of power supply voltage changes on the threshold value of the threshold detector. A node capacitor unit is charged under the control of an input clock signal. After completion of charging, the node capacitor unit is discharged under the control of a synchronous clock signal. The time amplification gain only depends on the proportion of the charge and discharge current, and the charging and discharging time are completely linear in principle, which eliminates the nonlinearity of the traditional time amplifier, and reduces the negative impact of threshold change on system performance.

Abstract: Apparatus, systems, and articles of manufacture are disclosed teaching an apparatus comprising an extender including a body and a tab, the tab coupled to the memory device, a first surface of the tab to be aligned with a second surface of the memory device. Examples disclosed herein further include a bracket to extend across the second surface of the memory device and the first surface of the tab, the bracket coupled to the first surface of the tab via fasteners.

Abstract: The present disclosure relates to the field of display technology, and provides an array substrate and a display panel. The array substrate is provided with a via hole and further includes an annular wiring area. The annular wiring area is located around the via hole and is provided with an incision extending toward an outer edge of the annular wiring area along an inner edge of the annular wiring area, and at least a portion of the annular wiring area is bent toward a side away from a display side along the inner edge.

Abstract: Disclosed is a continuous preparation method of cellulose fibers, in which a forming tension of 0.1 to 1.9 cN/dtex is applied to a fine solution stream obtained by extrusion through a spinneret plate and air gap cooling, then the fine solution stream is fed into a coagulating bath at a speed of 80 to 1000 m/min, a traction tension of 0.075 to 1.5 cN/dtex is continued to be applied to washed fibers in a water washing system behind the coagulating bath, and finally, the washed fibers are fed into a post-treatment system for continuous and efficient spinning of finished fibers at a speed of 80 to 1000 m/min.

Abstract: The disclosure provides a display substrate, a driving method thereof and a display device. The display substrate includes: a base substrate with a hole in a hole region of the base substrate; a plurality of first signal lines, on a first side of the hole; and a plurality of second signal lines, on the other side of the hole distal to the first side; a plurality of first switch units, at terminals of the plurality of first signal lines proximal to the hole and electrically coupled to the plurality of first signal lines in one-to-one correspondence; a plurality of second switch units, at terminals of the plurality of second signal lines proximal to the hole; a plurality of connection lines comprising a plurality of first connection lines, a plurality of second connection lines and a plurality of third connection lines.

Abstract: Systems and methods for encoding regions containing an element of interest in a sequence of images with a high resolution are provided. Such systems and methods can include a camera that can capture the sequence of images of a monitored region, a detection processor that can identify a first region that contains an element of interest within the sequence of images, and an encoder that can encode the first region within a first subset of the sequence of images with a first resolution and encode a second region within the first subset of the sequence of images outside of the first region with a second resolution that is less than the first resolution, wherein a number of the sequence of images in the first subset of the sequence of images is less than all of the sequence of images and is based on a predefined parameter.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a first conductive line over a substrate. The semiconductor device structure includes a first protection cap over the first conductive line. The semiconductor device structure includes a first photosensitive dielectric layer over the substrate, the first conductive line, and the first protection cap. The semiconductor device structure includes a conductive via structure passing through the first photosensitive dielectric layer and connected to the first protection cap. The semiconductor device structure includes a second conductive line over the conductive via structure and the first photosensitive dielectric layer. The semiconductor device structure includes a second protection cap over the second conductive line. The semiconductor device structure includes a second photosensitive dielectric layer over the first photosensitive dielectric layer, the second conductive line, and the second protection cap.

Abstract: The invention discloses the application of a ?-N-acetylhexosaminidase (HaHex74) from Haloferula sp. in the synthesis of human milk oligosaccharides. The invention provides the use of HaHex74 protein or related biological materials thereof in any one of the following: synthesizing human milk oligosaccharides; synthesizing Lacto-N-triose II and/or Lacto-N-neotetraose; the HaHex74 protein having the amino acid sequence shown in SEQ ID No. 2 is derived from Haloferula sp. The ?-N-acetylhexosaminidase HaHex74 disclosed by the invention possesses high-level expression, excellent hydrolysis properties and transglycosylation activity, which may make it potentially useful in the production of human milk oligosaccharides.