Abstract: A classification model building apparatus and a classification model building method thereof are provided. The classification model building apparatus introduces a clustering algorithm to assist in training a deep learning model for classification and takes a sum of a clustering loss function, a center concentration loss function and a classification loss function multiplied by different weights, respectively, as a total loss function for training the deep learning model. Based on the total loss function, the classification model building apparatus adjusts parameters of the deep learning model through a backpropagation algorithm to build a classification model.

Abstract: A method of forming a semiconductor device includes: forming an interconnect structure over a substrate; forming a first passivation layer over the interconnect structure; forming a first conductive feature over the first passivation layer and electrically coupled to the interconnect structure; conformally forming a second passivation layer over the first conductive feature and the first passivation layer; forming a dielectric layer over the second passivation layer; and forming a first bump via and a first conductive bump over and electrically coupled to the first conductive feature, where the first bump via is between the first conductive bump and the first conductive feature, where the first bump via extends into the dielectric layer, through the second passivation layer, and contacts the first conductive feature, where the first conductive bump is over the dielectric layer and electrically coupled to the first bump via.

Abstract: A semiconductor device includes a substrate; an interconnect structure over the substrate; a first passivation layer over the interconnect structure; a first conductive pad, a second conductive pad, and a conductive line disposed over the first passivation layer and electrically coupled to conductive features of the interconnect structure; a conformal second passivation layer over and extending along upper surfaces and sidewalls of the first conductive pad, the second conductive pad, and the conductive line; a first conductive bump and a second conductive bump over the first conductive pad and the second conductive pad, respectively, where the first conductive bump and the second conductive bump extend through the conformal second passivation layer and are electrically coupled to the first conductive pad and the second conductive pad, respectively; and a dummy bump over the conductive line, where the dummy bump is separated from the conductive line by the conformal second passivation layer.

Abstract: The present disclosure provides a buffer circuit and a buffer. The buffer circuit includes: an input follower circuit for following the voltage change of the first input signal; an input follower linearity boosting circuit for improving follower linearity of the input follower circuit; a first voltage bootstrap circuit for bootstrapping the voltage of the first input signal; a second voltage bootstrap circuit for bootstrapping the voltage of the second input signal; a third voltage bootstrap circuit for providing corresponding quiescent operation point voltage; a compensation follower circuit for following the compensation voltage; a compensation follower linearity boosting circuit for improving follower linearity of the compensation follower circuit; a first load for collecting the buffered voltage; a bias circuit for providing a bias current for the buffer; a bias linearity boosting circuit for improving linearity of the bias circuit; a second load for generating a nonlinear compensation current.

Abstract: The present disclosure provides a color film substrate, a manufacturing method thereof, a display panel and a display device, and relates to the field of display technology. The color film substrate includes a base substrate, the base substrate being provided with an opening region, a black matrix, the black matrix being disposed on a surface of the base substrate, the black matrix including at least one annular opening surrounding the opening region, and the at least one annular opening spacing the black matrix apart from the opening region.

Abstract: This application relates to a signal sending method, a signal processing method, and a radar apparatus, and pertains to the field of sensor technologies. The radar apparatus includes at least three transmit antennas. The signal sending method includes: determining at least two transmit antenna groups of the radar apparatus, where each transmit antenna group includes at least one transmit antenna; sending signals by using the at least two transmit antenna groups, where the at least two transmit antenna groups send signals in a TDM manner, and a plurality of transmit antennas included in each transmit antenna group including a plurality of transmit antennas in the at least two transmit antenna groups send signals in a CDM manner. Embodiments of this application may be applied to related fields such as autonomous driving, assisted driving, intelligent driving, intelligent connected vehicle, intelligent vehicle, and electric mobile/electric vehicle.

Abstract: The present disclosure provides a substrate-enhanced comparator and electronic device, the comparator including: a cross-coupled latch, for connecting input signals to the gate of a cross-coupled MOS transistor to form a first input of the latch; output buffers, connected to the cross-coupled latch for amplifying output signals of the latch; AC couplers, connected to the output buffers for receiving and amplifying the output signals of the latch, coupling the output signals to substrates of the cross-coupled MOS transistors to form second inputs of the latch. The cross-coupled latch is also for output signal regenerative latching based on input signals sampled at the first inputs and input signals sampled at the second inputs. The present disclosure introduces additional substrate inputs to the cross-coupled structure of the conventional latch as the second inputs of the latch.

Abstract: In an embodiment, a device includes: a passivation layer on a semiconductor substrate; a first redistribution line on and extending along the passivation layer; a second redistribution line on and extending along the passivation layer; a first dielectric layer on the first redistribution line, the second redistribution line, and the passivation layer; and an under bump metallization having a bump portion and a first via portion, the bump portion disposed on and extending along the first dielectric layer, the bump portion overlapping the first redistribution line and the second redistribution line, the first via portion extending through the first dielectric layer to be physically and electrically coupled to the first redistribution line.

Abstract: Methods for forming under-bump metallurgy (UBM) structures having different surface profiles and semiconductor devices formed by the same are disclosed. In an embodiment, a semiconductor device includes a first redistribution line and a second redistribution line over a semiconductor substrate; a first passivation layer over the first redistribution line and the second redistribution line; a first under-bump metallurgy (UBM) structure over and electrically coupled to the first redistribution line, the first UBM structure extending through the first passivation layer, a top surface of the first UBM structure being concave; and a second UBM structure over and electrically coupled to the second redistribution line, the second UBM structure extending through the first passivation layer, a top surface of the second UBM structure being flat or convex.

Abstract: A chip structure is provided. The chip structure includes a substrate. The chip structure includes a conductive line over the substrate. The chip structure includes a first passivation layer over the substrate and the conductive line. The chip structure includes a conductive pad over the first passivation layer covering the conductive line. The conductive pad is thicker and wider than the conductive line. The chip structure includes a first conductive via structure and a second conductive via structure passing through the first passivation layer and directly connected between the conductive pad and the conductive line. The chip structure includes a conductive pillar over the conductive pad.

Abstract: Embodiments of the present application provide a manufacturing method of a semiconductor structure and a semiconductor structure. The manufacturing method includes: providing a base with an electrical contact layer therein; forming an insulating layer on the base, the insulating layer having a through hole penetrating the insulating layer, and the through hole exposing a surface of the electrical contact layer; forming a sidewall layer on a sidewall of the through hole; forming a first isolation layer, the first isolation layer covering a surface of the sidewall layer and an exposed surface of the insulating layer; removing the sidewall layer to form a gap between the first isolation layer and the insulating layer; and forming a conducting layer filling the through hole, the conducting layer being electrically connected to the electrical contact layer.

Abstract: A display substrate, a manufacturing method thereof and a display device. The display substrate includes a working area and a sealant setting area outside of the working area. The display substrate further includes: a base substrate, a first conductive structure on a first side of the base substrate, and a second conductive structure on one side of the first conductive structure away from the base substrate. The first conductive structure and the second conductive structure are in the sealant setting area. The second conductive structure at least includes an inclined part inclined relative to a main surface of the base substrate. The inclined part is configured to allow at least part of light to be exited out directly over the first conductive structure after the light incident into the inclined part from a second side of the base substrate opposite to the first side is reflected by the inclined part.

Abstract: The application provides a method, apparatus, device and medium for detecting an internal short-circuit fault of a battery cell. The method includes obtaining electrical signal values for each of m battery cells of a battery pack, when it is in a preset condition including that a current detection is an nth detection; performing following steps for a target battery cell: calculating a first parameter of the target battery cell using the electrical signal values of the target battery cell, which characterizes a degree of fluctuation of the electrical signal values; calculating a second parameter that characterizes a degree of dispersion between the first parameter of the target battery cell and first parameters of other battery cells; and determining that an internal short-circuit fault occurs in the target battery cell, under a condition that the second parameter is greater than a threshold.

Abstract: The present invention relates to compositions comprising one or more compounds and/or extracts which induce, promote and/or improve production/release/delivery/excretion of mucin from and/or in the cornea, and methods of using the compositions to treat the eye.

Abstract: A contact structure is provided, which includes a substrate, a copper layer, an organic composite protective layer, and a nanosilver layer. The copper layer is disposed over the substrate. The organic composite protective layer is disposed over the copper layer to avoid oxidation of the copper layer, in which the organic composite protective layer forms a monomolecular adsorption layer over a surface of the copper layer. The nanosilver layer is disposed over the organic composite protective layer. A method of manufacturing a contact structure is also provided.

Abstract: A phosphate-solubilizing microbial agent for maize is provided. The phosphate-solubilizing microbial agent is obtained by fermentation of a strain CR50; and the strain CR50 is Bacillus stratosphericus (B. stratosphericus), which was deposited in the China Center for Type Culture Collection (CCTCC) on Nov. 10, 2020, with a deposit number of CCTCC M 2020721. The phosphate-solubilizing microbial agent has the ability to solubilize insoluble inorganic phosphorus and insoluble organic phosphorus such as calcium phosphate and calcium phytate, which can increase an available phosphorus content in soil, significantly promote the growth of maize, and increase a maize yield. The phosphate-solubilizing strain also has the ability to produce indoleacetic acid (IAA) and siderophore, and can undergo an agglutination reaction with maize agglutinin due to maize agglutinin affinity. The strain CR50 can colonize at maize roots for a long time under the mediation of agglutinin and stably exert the growth-promoting effect.

Abstract: An error extraction method for foreground digital correction of a pipeline analog-to-digital converter including: acquiring a transmission curve of a pipeline analog-to-digital converter, and controlling an input signal to be within a sub-segment 0 of the transmission curve; during extraction of error information of an ith pipeline stage, setting a magnitude of the input signal according to Formula (I); locking the outputs of all previous-stage comparators in the ith pipeline stage of the pipeline analog-to-digital converter; and completing, according to original output code of the pipeline analog-to-digital converter, error extraction by means of adaptive iteration, stage-by-stage, sequentially from a last stage to a first stage of a pipeline.

Abstract: An input method for a virtual keyboard includes: in response to acquiring a click operation on the virtual keyboard, determining a click position of the click operation; determining a first probability that the click operation belongs to each key based on the click position and a current response region corresponding to each key in the virtual keyboard; determining a second probability that the click operation belongs to each key based on an input character sequence; and determining a target key corresponding to the click operation based on the first probability and the second probability for each key.

Abstract: The intelligent measurement and control communication network at least includes at least one management node and at least one common node. The whole intelligent measurement and control communication network is logically divided into a control plane and a service plane. The control plane selects a routing strategy with the shortest path to cause each management node on the control plane to communicate with all common nodes. The service plane is divided into multiple task subnets according to tasks performed by each node, and each task subnet may select different routing strategies according to task requirements of this task subnet. According to the application and scenario needs of the tasks, the control plane combines externally changed parameters and utilizes machine learning to generate a new mathematical model in real time and sends a new task instruction to the service plane.

Abstract: A pharmaceutical composition is prepared from the following raw materials (in parts by weight): silybin (8.75-60), phospholipid (15-65), a Pu'er tea extract (25-200), and vitamin E (6.25-40). The composition has the effect of treating non-alcoholic fatty liver diseases.