Patents by Inventor TING YEH

TING YEH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160126442
    Abstract: Disclosure is related to a thermoelectric power generator. The generator essentially includes a thermoelectric thin-film element which is such as a thin film used to generate voltages according to a temperature difference. The output electric signals are converted to energy stored in an energy storage element. An output circuit is included to output power. In an exemplary embodiment, the thermoelectric power generator has a contact interface for sensing external temperate. The thermoelectric thin-film element is enabled to output voltages when temperature difference is induced. The generator further has a switch, which is used to control if the power is output. The output element is such as a light-emitting element.
    Type: Application
    Filed: November 3, 2014
    Publication date: May 5, 2016
    Inventors: YU-CHOU YEH, YU HSIN WANG, CHEN-CHI WU, TSUNG-HER YEH, CHIH-MING HU, TING-CHING LIN, CHIU CHENG TSUI, BO RUEI CHENG, CHUN TING YEH, YU JU WANG
  • Patent number: 9312402
    Abstract: A micro optical package structure with filtration layers includes a substrate having a light-emitting area and a light-receiving area, a light-emitting chip being deposited in a light-emitting area, a light-receiving chip being deposited in a light-receiving area, two packaging resin bodies for enclosing the light-emitting chip and the light-receiving chip, respectively, and being separately deposited in the light-emitting area and the light-receiving area, respectively, and the filtration layers formed on the packaging resin bodies surface for filtering out lights of different wavelengths. The micro optical package structure needs neither barrier nor protective cover between or outside the packaging resin bodies, so can be microminiaturized. The micro optical package structure can filter out visible lights of specific wavelengths without using any additional filters.
    Type: Grant
    Filed: February 3, 2014
    Date of Patent: April 12, 2016
    Assignee: LINGSEN PRECISION INDUSTRIES, LTD.
    Inventors: Ming-Te Tu, Yao-Ting Yeh
  • Publication number: 20160086718
    Abstract: A transformer structure includes a first conductive plate, a second conductive plate, a circuit board and a core assembly. The first conductive plate has a first through hole and two first pins, and the first pins are formed by bending two ends of the first conductive plate respectively. The second conductive plate is installed opposite to the first conductive plate and has a second through hole and two second pins, and second pins are formed by bending the two ends of the second conductive plate respectively. The circuit board includes a winding, a positioning portion and a third through hole. The core assembly is electromagentically coupled to the first conductive plate, the circuit board and the second conductive plate and passed through the first, second and third through holes to provide a high amperage and low-profile transformer structure.
    Type: Application
    Filed: September 24, 2014
    Publication date: March 24, 2016
    Inventors: Hsien-Yi TSAI, Po-Ting LIN, Yu-Ting YEH, Chi-Hsien WENG
  • Patent number: 9287403
    Abstract: A method for manufacturing a FinFET, and FinFETs are provided. In various embodiments, the method for manufacturing a FinFET includes forming a fin structure over a substrate. Next, a dummy gate is deposited across over the fin structure. The method continues with forming a pair of first spacers on sidewalls of the dummy gate. Then, a source/drain region is formed in the fin structure not covered by the dummy gate. The method further includes removing the dummy gate to expose the fin structure. After that, the first spacers are truncated, and a gate stack is formed to cover the exposed fin structure and top surfaces of the first spacers.
    Type: Grant
    Filed: December 5, 2014
    Date of Patent: March 15, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wei-Yang Lee, Ting-Yeh Chen
  • Patent number: 9257896
    Abstract: A control circuit of a power converter including a first and a second control modules is provided. The first control module sets sampling points for a ripple signal of an input voltage according to a reference signal. The first control module determines whether a power point is the maximum power point according to ripple voltages of the sampling points. The second control module controls the power converter to output a maximum power according to the maximum power point based on the determination result of the first control module and the reference signal. An embodiment of a method for tracking a maximum power point is provided. The input voltage of the power converter is measured. The sampling points are set for the ripple signal of the input voltage and phase information of the ripple signal is determined, such that the maximum power point is determined by using the ripple voltages.
    Type: Grant
    Filed: January 11, 2015
    Date of Patent: February 9, 2016
    Assignee: Industrial Technology Research Institute
    Inventors: Horng-Jzer Shih, Tsan-Huang Chen, Chien-Yu Chen, Bo-Ting Yeh
  • Publication number: 20160035477
    Abstract: Disclosure is to a thin-film coil component, and a charging apparatus. The thin-film coil is composed of spiral thin-film winding. Within the spiral windings, a gap exists between adjacent spiral structure, A first thin-film winding forms a first connection port for connecting external circuit at an external end, and has a first winding terminal at an internal end. An induced electric field can be formed by supplying electric current via the connection port. Further, a thin-film coil component is made when two thin-film coils with the same spiral direction are fabricated on two opposite surfaces of a substrate. An adhesive layer mixed with Ferromagnetic material is used to combine coils and the substrate. An induced electric field is also created when powering this thin-film coil component. Assembly of one or more thin-film coil components can make the charging apparatus used to electrically charge an electronic device which includes a device-end thin-film coil component.
    Type: Application
    Filed: December 26, 2014
    Publication date: February 4, 2016
    Inventors: YU-CHOU YEH, YU HSIN WANG, CHEN-CHI WU, TSUNG-HER YEH, CHIH-MING HU, TING-CHING LIN, CHIU CHENG TSUI, BO RUEI CHENG, CHUN TING YEH, YU JU WANG
  • Publication number: 20160037154
    Abstract: The present invention provides an image processing system and method, the image processing system uses at least two cameras, and the location of the cameras can be changed due to the easiness of installation onto a vehicle and number of the cameras around the vehicle. The present invention uses the image analysis method to evaluate the depth of objects around the vehicle, and then generate a 3D model with depth information to reduce the distortion of the image. After that, the image will be displayed on the wide-area electronic rearview mirror to provide the driver a rearview image more correctly.
    Type: Application
    Filed: January 15, 2015
    Publication date: February 4, 2016
    Applicant: NATIONAL TAIWAN UNIVERSITY
    Inventors: Yi-Ping HUNG, Yen-Ting YEH
  • Patent number: 9190398
    Abstract: A package structure of an optical module includes: a substrate defined with a light-emitting region and a light-admitting region; a light-emitting chip disposed at the light-emitting region of the substrate; a light-admitting chip disposed at the light-admitting region of the substrate; two encapsulants for enclosing the light-emitting chip and the light-admitting chip, respectively; and a shielding layer formed on the substrate and the encapsulants and having a light-emitting hole and a light-admitting hole, wherein the light-emitting hole and the light-admitting hole are positioned above the light-emitting chip and the light-admitting chip, respectively. Accordingly, the optical module package structure simplifies a packaging process and cuts manufacturing costs.
    Type: Grant
    Filed: November 6, 2013
    Date of Patent: November 17, 2015
    Assignee: LINGSEN PRECISION INDUSTRIES, LTD.
    Inventors: Ming-Te Tu, Yao-Ting Yeh
  • Patent number: 9183329
    Abstract: A virtual platform simulates behavior of a modular circuit based on a circuit design including both high-level and low-level models of circuit modules. A compiler that converts the high-level and low-level models into executable models prior to an initial simulation also generates a separate “replay engine” corresponding to each low-level module for use during subsequent replay simulations. During the initial simulation, the virtual platform simulates circuit behavior by concurrently executing the high-level and low-level executable models and recording data representing behavior of output signals of the low-level design modules modeled by the executable models. To speed up subsequent replays of the simulation, the virtual platform executes one or more of the replay engines in lieu of executing their corresponding low-level executable models.
    Type: Grant
    Filed: March 19, 2009
    Date of Patent: November 10, 2015
    Assignee: Synopsys, Inc.
    Inventors: Nan-Ting Yeh, Wenchu Cheng, Kuen-Yang Tsai, Chia-Ling Ho
  • Publication number: 20150304760
    Abstract: An earphone includes a housing having a sound-emitting hole, a speaker mounted in the housing, and a passive radiator mounted in between the sound hole and the speaker driver and including a vibrating diaphragm main body and a weight embedded in the vibrating diaphragm main body or bonded to the top or bottom surface of the vibrating diaphragm main body. The mounting arrangement of the passive radiator optimizes the sound performance of the earphone. The weight of the passive radiator is firmly connected with the vibrating diaphragm main body so that severe vibration of the vibrating diaphragm main body does not cause disconnection of the weight.
    Type: Application
    Filed: April 17, 2014
    Publication date: October 22, 2015
    Applicant: MERRY ELECTRONICS (SHENZHEN) CO., LTD.
    Inventor: Ruei-Ting YEH
  • Patent number: 9165891
    Abstract: One embodiment of the disclosure provides an electrostatic discharge protection circuit. The electrostatic discharge protection circuit includes a p-type field effect transistor, a capacitance device and an n-type field effect transistor. The p-type field effect transistor has a source coupled to an input/output terminal, a gate coupled to a first node and a drain coupled to a second node. The capacitance device has a first terminal coupled to a first rail and a second terminal coupled to the first node. The n-type field effect transistor has a source coupled to the first rail, a gate coupled to the second node and a drain coupled to the first node.
    Type: Grant
    Filed: April 26, 2013
    Date of Patent: October 20, 2015
    Assignee: Industrial Technology Research Institute
    Inventors: Yung-Chih Liang, Chih-Ting Yeh
  • Patent number: 9163290
    Abstract: A method for in vitro detection of the presence of a C-terminal truncation mutation of a hepatitis B virus (HBV) surface (S) gene encoding a small S protein in an isolated nucleic acid sample is disclosed. An in vitro diagnostic kit for use in the aforementioned method is also disclosed.
    Type: Grant
    Filed: June 6, 2013
    Date of Patent: October 20, 2015
    Assignee: NATIONAL HEALTH RESEARCH INSTITUTES
    Inventors: Shiu-Feng Huang, Chau-Ting Yeh, Ya-Ting Chen
  • Publication number: 20150288172
    Abstract: A circuit and a method for electrostatic discharge clamping are provided. The circuit includes a detection module, a control module, and a clamping module. The detection, control, and clamping modules are coupled with a first power line of a first power source and a second power line of the first power source. Third terminals of the detection, control and clamping modules are coupled to a first power line of a second power source, a voltage division terminal of the detection module, a fourth terminal of the control module respectively. According to an electrostatic discharge event on the first power line of the first power source, the division voltage terminal of the detection module provides a voltage to the control module. Then, the control module controls the clamping module to couple the first power line of the first power source to the second power line of the first power source.
    Type: Application
    Filed: December 8, 2014
    Publication date: October 8, 2015
    Inventors: Chih-Ting YEH, Yung-Chih LIANG
  • Publication number: 20150279827
    Abstract: A an optical module integrated package includes a substrate, a light-receiving chip mounted in a light-receiving region of the substrate, an electronic component mounted in the substrate, a cover mounted on the substrate and having a light-receiving chip disposed above the light-receiving hole, and a lens fixedly mounted in the light-receiving hole of the cover. Thus, the optical module integrated package not only have the chip and the electronic component integrated therein to reduce the packaging cost and to improve the yield but also provide a light filtering, focusing or diffusing effect to enhance optical recognition accuracy.
    Type: Application
    Filed: July 22, 2014
    Publication date: October 1, 2015
    Inventors: Ming-Te TU, Yao-Ting YEH, Yu-Chen LIN
  • Patent number: 9142953
    Abstract: An electrostatic discharge (ESD) protection apparatus, coupled between a first rail line and a second rail line, includes a clamp circuit and a detection circuit. The detection circuit includes an electronic element having an equivalent capacitance value, and a transistor having a gate, a first input and a second input respectively coupled to a first node, the first rail line and a drive terminal of the clamp circuit. In response to an ESD event, leakage currents pass between the first input and the gate and between the second input and the gate to equivalently form parasitic resistance therein, respectively. The parasitic resistances and the electronic element form a delay circuit to provide a drive voltage between the gate and the first input, and to provide a trigger current for conducting the clamp circuit, so that the first and second rail lines perform an ESD operation via the clamp circuit.
    Type: Grant
    Filed: November 15, 2012
    Date of Patent: September 22, 2015
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventor: Chih-Ting Yeh
  • Patent number: 9129988
    Abstract: A FinFET includes a fin structure, a gate and a source-drain region. The fin structure is over a substrate and has a recess of an upper surface of the fin structure and a doped region in the fin structure and adjacent to the recess. The gate protrudes from the recess and across over the fin structure. The source-drain region is in the fin structure and adjacent to the doped region. Methods for forming the FinFET are also provided.
    Type: Grant
    Filed: November 26, 2014
    Date of Patent: September 8, 2015
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wei-Yang Lee, Ting-Yeh Chen, Chia-Ling Chan, Chien-Tai Chan
  • Patent number: 9111687
    Abstract: An electrolyte composition for a dye-sensitized solar cell (DSSC) is provided, which includes a redox couple solution and inorganic nanoparticles. The surface of the inorganic nanoparticle may have a substituted or unsubstituted silane group, an ether group, a substituted amino group, a carbonyl group, an ester group, an amide group or a combination thereof.
    Type: Grant
    Filed: May 13, 2013
    Date of Patent: August 18, 2015
    Assignee: Eternal Materials Co., Ltd.
    Inventors: Wei-Ting Yeh, An-I Tsai
  • Patent number: 9098305
    Abstract: A computer system and a bootup and shutdown method thereof are provided. The computer system includes a memory, a chipset, a basic input/output system (BIOS), and an embedded controller, and an operating system (OS) is executed in the computer system. In the shutdown and bootup method, the embedded controller is notified to prepare to enter into a standby mode when the BIOS intercepts a shutdown instruction issued by the OS. The content of a register of the chipset is set according to the standby mode. A current operation mode data of the computer system is retained, and power is continuously supplied to the memory to make the computer system enter into the standby mode.
    Type: Grant
    Filed: May 30, 2011
    Date of Patent: August 4, 2015
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Chih-Chien Liu, Feng-Hsun Chen, Chien-Ting Yeh
  • Publication number: 20150187963
    Abstract: A micro optical package structure with filtration layers includes a substrate having a light-emitting area and a light-receiving area, a light-emitting chip being deposited in a light-emitting area, a light-receiving chip being deposited in a light-receiving area, two packaging resin bodies for enclosing the light-emitting chip and the light-receiving chip, respectively, and being separately deposited in the light-emitting area and the light-receiving area, respectively, and the filtration layers formed on the packaging resin bodies surface for filtering out lights of different wavelengths. The micro optical package structure needs neither barrier nor protective cover between or outside the packaging resin bodies, so can be microminiaturized. The micro optical package structure can filter out visible lights of specific wavelengths without using any additional filters.
    Type: Application
    Filed: February 3, 2014
    Publication date: July 2, 2015
    Applicant: LINGSEN PRECISION INDUSTRIES, LTD.
    Inventors: Ming-Te TU, Yao-Ting YEH
  • Patent number: 9048101
    Abstract: One embodiment of the disclosure provides an electrostatic discharge protection circuit, including a first resistor, a p-type field effect transistor, a capacitance device and an n-type field effect transistor. The first resistor has a first terminal coupled to a first rail and a second terminal coupled to a first node. The p-type field effect transistor has a source coupled to the first rail, a gate coupled to the first node and a drain coupled to a second node. The capacitance device has a first terminal coupled to a second rail or the second node and a second terminal coupled to the first node. The n-type field effect transistor has a source coupled to the second rail, a gate coupled to the second node and a drain coupled to the first node.
    Type: Grant
    Filed: May 31, 2011
    Date of Patent: June 2, 2015
    Assignee: Industrial Technology Research Institute
    Inventors: Yung-Chih Liang, Chih-Ting Yeh