Patents by Inventor TING YEH

TING YEH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190256984
    Abstract: Examples relating to coating an alloy substrate are described. For example, techniques for coating a surface of the alloy substrate with a coating layer and an exterior coat include anodizing an alloy substrate to form a metal oxide layer on surface of the alloy substrate and obtain an anodized alloy substrate. The alloy substrate is a metal alloy and the anodized alloy substrate has irregularities on surface. Thereafter, a coating layer is applied on the surface of the alloy substrate to smoothen the surface by providing a uniform covering on the irregularities of the surface. After applying the coating layer, an exterior coat is deposited on the surface of the alloy substrate.
    Type: Application
    Filed: October 26, 2016
    Publication date: August 22, 2019
    Inventors: YA-TING YEH, KUAN-TING WU, SHIH-HSUN HUANG
  • Publication number: 20190255877
    Abstract: The present subject matter relates to patterned substrates. In an example implementation of the present subject matter, techniques for creating patterns on different substrates are described. In an example, a method of creating the patterns includes spray depositing a plurality of coating layers over the substrate to form a coated substrate, where the plurality of coating layers include at least a top layer, and at least one of a base coating layer, a primer coating layer, and a powder coating layer. The method further includes forming a predefined pattern on the coated substrate by one of laser etching and Computer Numeric Control (CNC) process.
    Type: Application
    Filed: October 26, 2016
    Publication date: August 22, 2019
    Inventors: YA-TING YEH, WEN-TA LAI, KUAN-TING WU
  • Publication number: 20190250380
    Abstract: An optical imaging module includes six lens elements, the six lens elements being, in order from an object side to an image side, a first lens element, a second lens element, a third lens element, a fourth lens element, a fifth lens element and a sixth lens element. The first lens element has negative refractive power. The second lens element has an image-side surface being concave. The third lens element has an image-side surface being convex. The fourth lens element has positive refractive power. The fifth lens element with negative refractive power has an object-side surface being concave and an image-side surface being convex. The sixth lens element has an image-side surface being concave, wherein an object-side surface and the image-side surface of the sixth lens element are both aspheric, and the image-side surface of the sixth lens element includes at least one inflection point.
    Type: Application
    Filed: April 25, 2019
    Publication date: August 15, 2019
    Inventors: Cheng-Chen LIN, Chun-Yen CHEN, Yu-Tai TSENG, Kuan-Ting YEH, Hsin-Hsuan HUANG
  • Patent number: 10374418
    Abstract: A circuit and a method for electrostatic discharge clamping are provided. The circuit includes a detection module, a control module, and a clamping module. The detection, control, and clamping modules are coupled with a first power line of a first power source and a second power line of the first power source. Third terminals of the detection, control and clamping modules are coupled to a first power line of a second power source, a voltage division terminal of the detection module, a fourth terminal of the control module respectively. According to an electrostatic discharge event on the first power line of the first power source, the division voltage terminal of the detection module provides a voltage to the control module. Then, the control module controls the clamping module to couple the first power line of the first power source to the second power line of the first power source.
    Type: Grant
    Filed: December 8, 2014
    Date of Patent: August 6, 2019
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chih-Ting Yeh, Yung-Chih Liang
  • Patent number: 10362406
    Abstract: A MEMS microphone package includes a substrate including a base layer, a sound hole cut through the base layer, a conduction part arranged on the base layer, a sidewall connected with one end thereof to the top surface of the base layer and having a conducting line electrically connected to the conduction part, a cover plate connected to an opposite end of the sidewall and having a solder pad and a third contact disposed in conduction with the solder pad and electrically connected to the conducting line, an acoustic wave sensor mounted on the top surface of the base layer to face toward the sound hole, a processor chip mounted on the top surface of the base layer and electrically connected to the acoustic wave sensor and the conduction part, and one or multiple electronic components electrically bonded to the cover plate.
    Type: Grant
    Filed: October 26, 2016
    Date of Patent: July 23, 2019
    Assignee: LINGSEN PRECISION INDSUTRIES, LTD.
    Inventors: Yao-Ting Yeh, Hsien-Ken Liao, Jyong-Yue Tian, Ming-Te Tu
  • Patent number: 10362377
    Abstract: A MEMS microphone package includes a substrate including a sound hole, a first conduction part and a second conduction part, a sidewall connected with one end thereof to the substrate and having a conducting line electrically connected to the second conduction part, a cover plate connected to an opposite end of the sidewall and defining a chamber therein and having a solder pad and a fifth contact in conduction with the solder pad and electrically connected to the conducting line, a processor chip mounted on the substrate inside the chamber and electrically connected to the first conduction part and the second conduction part, and a acoustic wave sensor mounted on the substrate inside the chamber to face toward the sound hole and electrically connected to the first conduction part using flip-chip technology.
    Type: Grant
    Filed: October 26, 2016
    Date of Patent: July 23, 2019
    Assignee: LINGSEN PRECISION INDUSTRIES, LTD.
    Inventors: Hsien-Ken Liao, Ming-Te Tu, Jyong-Yue Tian, Yao-Ting Yeh
  • Patent number: 10355144
    Abstract: A heat-dissipating Zener diode includes a heavily-doped semiconductor substrate having a first conductivity type, a first epitaxial layer having the first conductivity type, a first heavily-doped area having a second conductivity type, a second epitaxial layer, and a second heavily-doped area having the second conductivity type or the first conductivity type. The first epitaxial layer is formed on the heavily-doped semiconductor substrate. The first heavily-doped area is formed in the first epitaxial layer and spaced from the heavily-doped semiconductor substrate. The second epitaxial layer is formed on the first epitaxial layer and penetrated with a first doped area, and the first doped area has the second conductivity type and contacts the first heavily-doped area. The second heavily-doped area is formed in the first doped area.
    Type: Grant
    Filed: July 23, 2018
    Date of Patent: July 16, 2019
    Assignee: Amazing Microelectronic Corp.
    Inventors: Chih-Ting Yeh, Sung-Chih Huang, Che-Hao Chuang
  • Patent number: 10353589
    Abstract: A data management method includes steps of: receiving a read command; reading a page containing target data from a non-volatile memory when the target data corresponding to the read command is stored in the non-volatile memory; determining whether a count of reading of the page is greater than a read threshold; and if false, storing at least one record of subsequent data into a first storage space of a data buffering storage device; or if true, storing the at least one record of subsequent data into a second storage space of the data buffering storage device. Both of the target data and the at least one record of subsequent data are stored in the page, and the target data and the at least one record of subsequent data have a sequential relationship in terms of data reading. Another data management method and a corresponding data storage device are also provided.
    Type: Grant
    Filed: February 20, 2017
    Date of Patent: July 16, 2019
    Assignee: SILICON MOTION, INC.
    Inventors: Teng-Chi Liang, Yen-Ting Yeh
  • Patent number: 10317646
    Abstract: An optical imaging module includes six lens elements, the six lens elements being, in order from an object side to an image side, a first lens element, a second lens element, a third lens element, a fourth lens element, a fifth lens element and a sixth lens element. The first lens element has negative refractive power. The second lens element has an image-side surface being concave. The third lens element has an image-side surface being convex. The fourth lens element has positive refractive power. The fifth lens element with negative refractive power has an object-side surface being concave and an image-side surface being convex. The sixth lens element has an image-side surface being concave, wherein an object-side surface and the image-side surface of the sixth lens element are both aspheric, and the image-side surface of the sixth lens element includes at least one inflection point.
    Type: Grant
    Filed: August 10, 2017
    Date of Patent: June 11, 2019
    Assignee: LARGAN PRECISION CO., LTD.
    Inventors: Cheng-Chen Lin, Chun-Yen Chen, Yu-Tai Tseng, Kuan-Ting Yeh, Hsin-Hsuan Huang
  • Patent number: 10299046
    Abstract: A MEMS microphone package includes a substrate including a base layer, a sound hole cut through opposing top and bottom surfaces of the base layer, a conduction part arranged on the base layer and a notch located on the top surface of the base layer, a sidewall connected with one end thereof to the top surface of the base layer and having a conducting line electrically connected to the conduction part, a cover plate connected to an opposite end of the sidewall and having a solder pad and a third contact disposed in conduction with the solder pad and electrically connected to the conducting line, a processor chip mounted in the notch and electrically connected to the conduction part, and an acoustic wave sensor mounted on the base layer to face toward the sound hole and electrically connected to the processor chip.
    Type: Grant
    Filed: October 27, 2016
    Date of Patent: May 21, 2019
    Assignee: LINGSEN PRECISION INDUSTRIES, LTD.
    Inventors: Hsien-Ken Liao, Ming-Te Tu, Jyong-Yue Tian, Yao-Ting Yeh
  • Patent number: 10282106
    Abstract: An operating method of a memory controller includes steps of: configuring the memory controller to receive a read command and read at least one piece of first data stored in a non-volatile memory according to the received read command; configuring the memory controller to determine whether a read count of the at least one piece of first data is greater than a set value; and configuring the memory controller to copy and store the at least one piece of first data in a data temporary storage device when the read count of the at least one piece of first data is determined to be greater than the set value. A data storage device and another operating method are also provided.
    Type: Grant
    Filed: February 22, 2017
    Date of Patent: May 7, 2019
    Assignee: SILICON MOTION, INC.
    Inventors: Yen-Ting Yeh, Teng-Chi Liang
  • Publication number: 20190123200
    Abstract: A semiconductor structure includes a first region. The first region includes at least three first gate structures separate one from another and adjacent to each other and at least three second gate structures separate one from another and adjacent to each other. The first gate structures are further away from each other than the second gate structures. The first region further includes first epitaxial semiconductor features proximate the first gate structures and second epitaxial semiconductor features proximate the second gate structures. A first distance from the first epitaxial semiconductor features to the respective first gate structures is smaller than a second distance from the second epitaxial semiconductor features to the respective second gate structures.
    Type: Application
    Filed: December 12, 2018
    Publication date: April 25, 2019
    Inventors: Wei-Yang Lee, Tzu-Hsiang Hsu, Ting-Yeh Chen, Feng-Cheng Yang
  • Publication number: 20190115468
    Abstract: A high voltage MOS device includes: a well, a body region, a gate, a source, plural body contact regions and a drain. The plural body contact regions are formed in the body region, wherein each of the body contact region is located beneath the top surface and contacts the top surface in the vertical direction, and is in contact or not in contact with the gate in the lateral direction. The plural body contact regions are arranged substantially in parallel in the width direction and any two neighboring body contact regions are not in contact with each other in the width direction. The gate includes a poly-silicon layer which serves as the only electrical contact of the gate, and every part of the poly-silicon layer is the first conductivity type.
    Type: Application
    Filed: August 19, 2018
    Publication date: April 18, 2019
    Inventors: Tsung-Yi Huang, Chu-Feng Chen, Yu-Ting Yeh
  • Publication number: 20190064483
    Abstract: An imaging lens system includes, in order from an object side to an image side: a first lens element, a second lens element, a third lens element, a fourth lens element, a fifth lens element and a sixth lens element. The first lens element with negative refractive power has an image-side surface being concave in a paraxial region thereof. The second lens element with negative refractive power has an object-side surface being concave in a paraxial region thereof. The third lens element with positive refractive power has an image-side surface being convex in a paraxial region thereof. The fourth lens element has positive refractive power. The fifth lens element with negative refractive power has an image-side surface being concave in a paraxial region thereof. The sixth lens element with positive refractive power has an object-side surface being convex in a paraxial region thereof.
    Type: Application
    Filed: January 8, 2018
    Publication date: February 28, 2019
    Applicant: LARGAN PRECISION CO.,LTD.
    Inventors: Chun-Yen CHEN, Kuan-Ting YEH, Shu-Yun YANG
  • Publication number: 20190064484
    Abstract: An imaging lens system includes five lens elements, which are, in order from an object side to an image side: a first lens element, a second lens element, a third lens element, a fourth lens element and a fifth lens element. At least one of an object-side surface and an image-side surface of the fifth lens element has at least one inflection point. The object-side surface and the image-side surface of the fifth lens element are both aspheric.
    Type: Application
    Filed: January 10, 2018
    Publication date: February 28, 2019
    Applicant: LARGAN PRECISION CO.,LTD.
    Inventors: Kuan-Ting YEH, Hung-Shuo CHEN, Chien-Hsun WU, Wei-Yu CHEN
  • Publication number: 20190056570
    Abstract: An image system lens assembly includes five lens elements, the five lens elements being, in order from an object side to an image side: a first lens element; a second lens element having an object side-surface being convex in a paraxial region thereof; a third lens element having negative refractive power; a fourth lens element with positive refractive power having an image-side surface being convex in a paraxial region thereof; and a fifth lens element having negative refractive power.
    Type: Application
    Filed: October 23, 2017
    Publication date: February 21, 2019
    Inventors: Kuan-Ting Yeh, Tzu-Chieh Kuo
  • Patent number: 10192808
    Abstract: A semiconductor structure includes a substrate having a frontside surface and a backside surface. A through-substrate via extends into the substrate from the frontside surface. The through-substrate via comprises a top surface. A metal cap covers the top surface of the through-substrate via. A plurality of cylindrical dielectric plugs is embedded in the metal cap. The cylindrical dielectric plugs are distributed only within a central area of the metal cap. The central area is not greater than a surface area of the top surface of the through-substrate via.
    Type: Grant
    Filed: July 6, 2017
    Date of Patent: January 29, 2019
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Teng-Chuan Hu, Chun-Hung Chen, Chu-Fu Lin, Chun-Ting Yeh, Chung-Hsing Kuo, Ming-Tse Lin
  • Publication number: 20190025895
    Abstract: Examples of a cover for a device are described herein. The cover includes a substrate to be placed in proximity of a heat source of a device. In an example, a heat resistant layer is applied over a surface of the substrate to insulate heat generated by the heat source. Further, a top layer is applied over one of the heat resistant layer and another surface of the substrate, which is opposite to the surface having the heat resistant layer. The top layer provides at least one of chemical resistant properties and aesthetic properties.
    Type: Application
    Filed: April 6, 2016
    Publication date: January 24, 2019
    Inventors: KUAN-TING WU, AI-TSUNG LI, YA-TING YEH, KEVIN VOSS, MICHAEL DELPIER
  • Patent number: 10185128
    Abstract: An optical photographing lens assembly includes five lens elements, in order from an object side to an image side: a first lens element, a second lens element, a third lens element, a fourth lens element and a fifth lens element. The first lens element with positive refractive power has a convex object-side surface in a paraxial region thereof. The second lens element with negative refractive power has a convex object-side surface and a concave image-side surface in a paraxial region thereof. The fourth lens element with positive refractive power has a convex image-side surface in a paraxial region thereof. The fifth lens element with negative refractive power has a concave image-side surface in a paraxial region thereof, wherein the image-side surface of the fifth lens element has at least one convex critical point in an off-axial region thereof, and two surfaces of the fifth lens element are both aspheric.
    Type: Grant
    Filed: July 11, 2017
    Date of Patent: January 22, 2019
    Assignee: LARGAN Precision Co., Ltd.
    Inventors: Chun-Che Hsueh, Wei-Yu Chen, Chun-Shan Chen, Hsuan-Chin Huang, Kuan-Ting Yeh
  • Publication number: 20190013259
    Abstract: A semiconductor structure includes a substrate having a frontside surface and a backside surface. A through-substrate via extends into the substrate from the frontside surface. The through-substrate via comprises a top surface. A metal cap covers the top surface of the through-substrate via. A plurality of cylindrical dielectric plugs is embedded in the metal cap. The cylindrical dielectric plugs are distributed only within a central area of the metal cap. The central area is not greater than a surface area of the top surface of the through-substrate via.
    Type: Application
    Filed: July 6, 2017
    Publication date: January 10, 2019
    Inventors: Teng-Chuan Hu, Chun-Hung Chen, Chu-Fu Lin, Chun-Ting Yeh, Chung-Hsing Kuo, Ming-Tse Lin