Abstract: The present invention provides an artificial dressing and a use of the artificial dressing for promoting wound healing. The artificial dressing includes a gelatin and a fungal extract.

Abstract: A photographing lens assembly includes, in order from an object side to an image side: a first, a second, a third, a fourth, a fifth and a sixth lens elements. The first lens element with negative refractive power has an object-side surface being concave in a paraxial region thereof, wherein the object-side surface has at least one convex critical point in an off-axis region thereof. The third lens element has an image-side surface being convex in a paraxial region thereof. The fourth lens element has positive refractive power. The fifth lens element with negative refractive power has an object-side surface being concave in a paraxial region thereof, and an image-side surface being convex in a paraxial region thereof. The sixth lens element has an image-side surface being concave in a paraxial region thereof, wherein the image-side surface has at least one convex critical point in an off-axis region thereof.

Abstract: A method for manufacturing a semiconductor structure includes: forming a first bonding layer on a device substrate formed with a semiconductor device so as to cover the semiconductor device, wherein the first bonding layer includes a first metal oxide material in an amorphous state; forming a second bonding layer on a carrier substrate, wherein the second bonding layer includes a second metal oxide material in an amorphous state; conducting a surface modification process on the first bonding layer and the second bonding layer; bonding the device substrate and the carrier substrate to each other through the first and second bonding layers; and annealing the first and second bonding layers so as to convert the first and second metal oxide materials from the amorphous state to a crystalline state.

Abstract: An uninterruptible power system and an operation method thereof are provided. The uninterruptible power system comprises a DC-AC conversion circuit, a plurality of switches, a plurality of sensing units, a plurality of output ports and a control unit. Each output port is electrically coupled to an output terminal of the DC-AC conversion circuit sequentially through one of the sensing units and one of the switches. The control unit is configured to define members of at least one group from the output ports according to a system setting, and define which members of each group are non-critical output ports according to the system setting. The control unit is further configured to set, according to the system setting, at least one condition for all non-critical output ports in each group to simultaneously stop supplying power, and to accordingly control the operations of the corresponding switches.

Abstract: An imaging system lens assembly includes six lens elements which are, in order from an object side to an image side along an optical path: a first lens element, a second lens element, a third lens element, a fourth lens element, a fifth lens element and a sixth lens element. Each of the six lens elements has an object-side surface facing toward the object side and an image-side surface facing toward the image side. The first lens element has positive refractive power. The image-side surface of the fifth lens element is convex in a paraxial region thereof. The image-side surface of the sixth lens element is concave in a paraxial region thereof, and the image-side surface of the sixth lens element has at least one inflection point.

Abstract: Disclosed herein are methods and kits for identifying responsiveness or non-responsiveness of a cancer subject to arginine deprivation therapy. The method includes determining the presence of a G/G genotype of rs13338697 of the target nucleic acid in a biological sample derived from the subject by use of a polymerase chain reaction (PCR)-based method, in which the presence of the G/G genotype of rs13338697 of the target nucleic acid is an indication that the subject is responsive to the arginine deprivation therapy.

Abstract: Semiconductor device and the manufacturing method thereof are disclosed. An exemplary semiconductor device comprises semiconductor layers over a substrate, wherein the semiconductor layers are stacked up and separated from each other, each semiconductor layer includes a first portion in a first channel region of the substrate and a second portion in a second channel region of the substrate, epitaxial layers formed in a source/drain region between the first channel region and the second channel region, wherein the epitaxial layers are separated from each other and each epitaxial layer is formed between the first portion and the second portion of each semiconductor layer, and a conductive feature wrapping each of the epitaxial layers.

Abstract: A semiconductor device structure and a method for forming a semiconductor device structure are provided. The semiconductor device structure includes a stack of channel structures over a semiconductor fin and a gate stack wrapped around the channel structures. The semiconductor device structure also includes a source/drain epitaxial structure adjacent to the channel structures and multiple inner spacers. Each of the inner spacers is between the gate stack and the source/drain epitaxial structure. The semiconductor device structure further includes an isolation structure between the semiconductor fin and the source/drain epitaxial structure.

Abstract: A method for calibrating the alignment of a wafer is provided. A plurality of alignment position deviation (APD) simulation results are obtained form a plurality of mark profiles. An alignment analysis is performed on a mark region of the wafer with a light beam. A measured APD of the mark region of the wafer is obtained in response to the light beam. The measured APD is compared with the APD simulation results to obtain alignment calibration data. An exposure process is performed on the wafer with a mask according to the alignment calibration data.

Abstract: An imaging lens assembly includes, in order from an object side to an image side along an optical path: a first lens element through an eighth lens element. The first lens element with positive refractive power has an object-side surface being convex in a paraxial region thereof and an image-side surface being concave in a paraxial region thereof. The second lens element has an object-side surface being convex in a paraxial region thereof. The fifth lens element has positive refractive power. The sixth lens element with negative refractive power has an image-side surface being concave in a paraxial region thereof. The seventh lens element with positive refractive power has an object-side surface being convex in a paraxial region thereof. The eighth lens element has negative refractive power. At least one lens surface of the imaging lens assembly has at least one critical point in an off-axis region thereof.

Abstract: A cooling device includes a partitioning board abutting inner faces of two boards, respectively. A chamber is defined between the partitioning board and one of the two boards. Another chamber is defined between the partitioning board and another of the two boards and intercommunicates with the chamber via an intercommunication port and a backflow port of the partitioning board. A pump drives a working fluid to circulate in the two chambers. Two welding channels are formed on outer faces of the two boards and surround the two chambers, respectively. The smallest distance between a channel bottom face of each annular welding channel and the inner face of a respective board having the annular welding channel is smaller than that between the inner and outer faces of the respective board. The two boards are coupled to the partitioning board along the annular welding channels by laser welding.

Abstract: A method is provided for forming a semiconductor device. A fin feature is formed on a semiconductor substrate, and a dummy gate feature is formed over the fin feature. The fin feature includes a sacrificial portion disposed over the semiconductor substrate, and a fin portion disposed over the sacrificial portion. The dummy gate feature is connected to the fin feature and the semiconductor substrate. Then, the sacrificial portion is removed to form a gap between the semiconductor substrate and the fin portion. A dielectric isolation layer is formed to fill the gap for electrically isolating the fin portion from the semiconductor substrate. Subsequently, source/drain features are formed over the dielectric isolation layer, and the dummy gate feature is processed to form a gate electrode feature on the fin portion.

Abstract: In a method of manufacturing a semiconductor device, a fin structure, in which first and second semiconductor layers are alternately stacked over a substrate, is formed, a source/drain region of the fin structure is etched thereby forming a source/drain space, ends of the first semiconductor layers are laterally etched in the source/drain space, a first insulating layer is formed on a sidewall of the source/drain space, the first insulating layer is partially etched, thereby forming a first bottom spacer at a bottom of the source/drain space, a second insulating layer is formed on the sidewall of the source/drain space, the second insulating layer is partially etched, thereby forming inner spacers on end faces of the first semiconductor layers and leaving a part of the second insulating layer as a second bottom spacer at the bottom of the source/drain space, and a source/drain epitaxial layer is formed in the source/drain space.

Abstract: A test structure and methods of forming the same are described. In some embodiments, the structure includes a first portion having a first thickness, and the first portion comprises one or more dielectric layers. The test structure further includes a second portion disposed adjacent the first portion, the second portion has a second thickness substantially less than the first thickness, and the second portion includes the one or more dielectric layers and a first plurality of test conductive features disposed in the one or more dielectric layers. The test structure further includes a third portion disposed adjacent the second portion, the third portion has a third thickness substantially less than the second thickness, and the third portion comprises the one or more dielectric layers and a second plurality of test conductive features disposed in the one or more dielectric layers.

Abstract: A method includes forming a fin in a substrate. The fin is etched to create a source/drain recess. A source/drain feature is formed in the source/drain recess, in which a lattice constant of the source/drain feature is greater than a lattice constant of the fin. An epitaxy coat is grown over the source/drain feature, in which a lattice constant of the epitaxy coat is smaller than a lattice constant of the fin.

Abstract: A sole data collection device and a sole data collection method are disclosed. The sole data collection device includes an image capture module, a temperature detection module and a monofilament testing module. The sole data collection device is used for collecting the sole data of a user, and the sole data is transmitted to a cloud server. The sole data collection device and the sole data collection method are not only convenient for a user to collect sole data at home at any time, but also allow the user's caregiver and/or relevant medical care personnel to extract the sole data from the cloud server to screen the user's plantar condition, so as to solve the problem that it is time-consuming and costly to go to a medical institution for relevant examinations.

Abstract: Techniques for performing point-in-time relative outlier detection are disclosed herein. In some embodiments, an outlier detection system analyzes metric data based on (a) the values of the metric data detected on a computing resource, (b) a relative change between different metric readings and/or (c) an absolute change between different metric readings relative to the point in time. The outlier detection system may predict whether the computing resource is exhibiting anomalous behavior by applying a set of machine-learning (ML) models to the point-in-time values. The ML models allow the outlook detection system to make inferences and adjustments during application runtime rather than relying on static instruction sets to detect and classify outliers. The ML models that are applied may implement unsupervised learning methods that do not rely on pre-training and/or time-series analysis for classification.

Abstract: The present disclosure is drawn to covers for electronic devices. In one example, a cover for an electronic device can include an aluminum or aluminum alloy cover frame having an opening. A magnesium or magnesium alloy cover panel supported by the aluminum or aluminum alloy cover frame within or over the opening. A protective coating can be over a surface of the aluminum or aluminum alloy cover frame and a surface of the magnesium or magnesium alloy cover panel. A chamfered edge can include a chamfer at an edge of the aluminum or aluminum alloy cover frame. The chamfer can expose the aluminum or aluminum alloy cover frame beneath the protective coating, and the chamfer at the same time does not expose the magnesium or magnesium alloy cover panel.

Abstract: A semiconductor device includes first and second semiconductor fins extending from a substrate and a source/drain region epitaxially grown in recesses of the first and second semiconductor fins. A top surface of the source/drain region is higher than a surface level with top surfaces of the first and second semiconductor fins. The source/drain region includes a plurality of buffer layers. Respective layers of the plurality of buffer layers are embedded between respective layers of the source/drain region.

Abstract: A method includes forming a fin in a substrate. The fin is etched to create a source/drain recess. A source/drain feature is formed in the source/drain recess, in which a lattice constant of the source/drain feature is greater than a lattice constant of the fin. An epitaxy coat is grown over the source/drain feature, in which a lattice constant of the epitaxy coat is smaller than a lattice constant of the fin.