Patents by Inventor Tomio Iwasaki

Tomio Iwasaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6927435
    Abstract: A semiconductor device comprising a semiconductor substrate, gate insulators formed on the substrate, and gate electrodes formed on the gate insulators, the gate insulators which are mainly composed of a material selected from titanium oxide, zirconium oxide and hafnium oxide, and in which compressive strain is produced and equipped with MOS transistors, can suppress leakage current flowing through the gate insulators and has high reliability.
    Type: Grant
    Filed: January 14, 2002
    Date of Patent: August 9, 2005
    Assignee: Renesas Technology Corp.
    Inventors: Hiroshi Moriya, Tomio Iwasaki, Hideo Miura, Shuji Ikeda
  • Patent number: 6927439
    Abstract: A semiconductor device equipped with information storage capacitor comprising a first capacitor electrode, an oxide film, a second capacitor electrode and insulating films containing silicon as a main constituting element, wherein at least one of first and second capacitor electrodes contains as a main constituting element at least one element selected from rhodium, ruthenium, iridium, osmium and platinum, and as an adding element at least one element selected from palladium, nickel, cobalt and titanium, is excellent in adhesiveness between the capacitor electrodes and the insulating films.
    Type: Grant
    Filed: August 23, 2004
    Date of Patent: August 9, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Hiroshi Moriya, Tomio Iwasaki, Hiroyuki Ohta, Shinpei Iijima, Isamu Asano, Yuzuru Ohji, Yoshitaka Nakamura
  • Publication number: 20050156150
    Abstract: A phase change memory comprises: a substrate; an insulation film formed on a main surface of the substrate; a first electrode deposited on the insulation film; a phase change recording film deposited on the first electrode; and a second electrode deposited on the phase change recording film. The phase change recording film contains at least two of Ge, Sb and Te as main constituting elements thereof. The first electrode comprises material of group of Ti, Si and N, or group of Ta, Si and N as main constituting material thereof.
    Type: Application
    Filed: October 29, 2004
    Publication date: July 21, 2005
    Inventors: Tomio Iwasaki, Hiroshi Moriya, Hideyuki Matsuoka, Norikatsu Takaura
  • Publication number: 20050079667
    Abstract: A semiconductor device having a high degree of reliability is provided. A second object of the invention is to provide a semiconductor device of high yield. The semiconductor includes a silicon substrate, a gate dielectric film formed on one main surface of the silicon substrate, a gate electrode formed by being stacked on the gate dielectric film and a diffusion layer containing arsenic and phosphorus. Both of the concentration of the highest concentration portion of arsenic and the concentration of the highest concentration portion of phosphorus are each at 1026 atoms/m3 or more and 1027 atoms/m3 or less, and the depth of the highest concentration portion of phosphorus from the surface of the silicon substrate is less than the depth of the highest concentration portion of arsenic.
    Type: Application
    Filed: February 5, 2003
    Publication date: April 14, 2005
    Inventors: Tomio Iwasaki, Norio Ishitsuka, Hideo Miura
  • Patent number: 6875662
    Abstract: The invention offers a highly reliable semiconductor device with high yields. The semiconductor device includes a silicon substrate, a gate insulating film formed on one main plane of a silicon substrate and mainly including zirconium oxide of hafnium oxide, and a gate electrode film formed in contact with the gate insulating film. The gate insulating film contains an additional element for stabilizing the amorphous state.
    Type: Grant
    Filed: August 15, 2003
    Date of Patent: April 5, 2005
    Assignees: Hitachi, Ltd., Hitachi Kokusai Electric Inc.
    Inventors: Tomio Iwasaki, Hideo Miura
  • Publication number: 20050056938
    Abstract: A semiconductor device has a wiring structure in which an insulating layer, a wiring layer made of Al and containing at least either Au or Ag as an additional element, and a protecting layer are sequentially laminated on a substrate, so that a peel-off does not occur at an interface between the Al film and a substratum insulative material in an Al wiring structure made of Al as a main component material.
    Type: Application
    Filed: July 30, 2004
    Publication date: March 17, 2005
    Inventors: Hiromi Shimazu, Tomio Iwasaki, Hiroyuki Ohta
  • Publication number: 20050051855
    Abstract: A semiconductor device constitutes an electric field effect type transistor having a semiconductor substrate, a gate insulating layer formed on the substrate and a gate electrode formed on the gate insulating layer. The gate insulating layer is mainly formed of silicon oxynitride (SiON) and a strain state of the gate insulating layer is a compressed strain state.
    Type: Application
    Filed: August 4, 2004
    Publication date: March 10, 2005
    Inventors: Yoshiharu Kanegae, Tomio Iwasaki, Hiroshi Moriya
  • Patent number: 6856021
    Abstract: A semiconductor device is provided which includes a semiconductor substrate, metal conductors formed on a side of a main face of the substrate, which metal conductors contain aluminum as a main constituent thereof, and copper as an additive element, the metal conductors being made to contain such an element as to suppress the precipitation of copper or being made to have such a film adjacent to the metal conductor as to suppress the precipitation of copper or being made to have such a film adjacent to the metal conductor as to suppress the precipitation of copper.
    Type: Grant
    Filed: August 28, 2000
    Date of Patent: February 15, 2005
    Assignee: Renesas Technology Corp.
    Inventors: Tomio Iwasaki, Hideo Miura, Takashi Nakajima, Hiroyuki Ohta, Shinji Nishihara, Masashi Sahara
  • Publication number: 20050024811
    Abstract: A semiconductor device equipped with information storage capacitor comprising a first capacitor electrode, an oxide film, a second capacitor electrode and insulating films containing silicon as a main constituting element, wherein at least one of first and second capacitor electrodes contains as a main constituting element at least one element selected from rhodium, ruthenium, iridium, osmium and platinum, and as an adding element at least one element selected from palladium, nickel, cobalt and titanium, is excellent in adhesiveness between the capacitor electrodes and the insulating films.
    Type: Application
    Filed: August 23, 2004
    Publication date: February 3, 2005
    Inventors: Hiroshi Moriya, Tomio Iwasaki, Hiroyuki Ohta, Shinpei Iijima, Isamu Asano, Yuzuru Ohji, Yoshitaka Nakamura
  • Publication number: 20050001314
    Abstract: An object of the present invention is to establish, for an LSI having a stacked interconnection structure of Cu interconnect/Low-k material, a narrow pitch wire bonding technique enabling a reduction in damage to a bonding pad and application similar to the conventional LSI of an aluminum interconnection. In a semiconductor device having a multilayer interconnection made of a Cu interconnect/Low-k dielectric material, the above-described object can be attained by a bonding pad structure in which all the wiring layers up to the uppermost cap interconnect are formed of a Cu wiring layer and a bonding pad portion formed of a Cu layer is equipped with a refractory intermediate metal layer such as Ti (titanium) filmor (tungsten) film on the Cu layer and an aluminum alloy layer on the intermediate metal layer.
    Type: Application
    Filed: June 23, 2004
    Publication date: January 6, 2005
    Inventors: Naotaka Tanaka, Tomio Iwasaki, Hideo Miura, Yasuyuki Nakajima, Tomoo Matsuzawa
  • Publication number: 20040258978
    Abstract: The present invention provides a catalyst structure of high catalytic activity and a fuel cell of high cell output. The catalyst structure comprises a conductive film and catalyst particles formed on the conductive film wherein the difference between lattice constant of a material constituting the conductive film and that of a material constituting the catalyst particles is not more than 16%, and preferably not less than 3%.
    Type: Application
    Filed: June 22, 2004
    Publication date: December 23, 2004
    Inventors: Tomio Iwasaki, Hideo Miura
  • Publication number: 20040238965
    Abstract: Provided is a reliable semiconductor device with a layered interconnect structure that may develop no trouble of voids and interconnect breakdowns, in which the layered interconnect structure comprises a conductor film and a neighboring film as so layered on a semiconductor substrate that the neighboring film is contacted with the conductor film.
    Type: Application
    Filed: June 29, 2004
    Publication date: December 2, 2004
    Inventors: Tomio Iwasaki, Hideo Miura
  • Publication number: 20040227160
    Abstract: In semiconductor devices, a semiconductor device is provided which is high in reliability while suppressing changes in characteristics such as threshold voltages. In a semiconductor device which has a gate dielectric film above a semiconductor substrate and also has above the gate dielectric film a gate electrode film made of silicon germanium chosen as its main constituent material, or alternatively in a semiconductor device which has beneath the gate dielectric film a channel made of silicon as its main constituent material and which has below the channel a channel underlayer film made of silicon germanium as its main constituent material, a specifically chosen dopant, such as cobalt (Co) or carbon (C) or nitrogen (N), is added to the gate electrode and the channel underlayer film, for use as the unit for suppressing diffusion of germanium in the gate electrode or in the channel underlayer film.
    Type: Application
    Filed: May 12, 2004
    Publication date: November 18, 2004
    Applicants: Hitachi, Ltd., Trecenti Technologies, Inc.
    Inventors: Shingo Nasu, Tomio Iwasaki, Hiroyuki Ohta, Yukihiro Kumagai, Shuji Ikeda
  • Publication number: 20040227242
    Abstract: The reliability of wirings, each of which includes a main conductive film containing copper as a primary component, is improved. On an insulating film including the upper surface of a wiring serving as a lower layer wiring, an insulating film formed of a silicon carbonitride film having excellent barrier properties to copper is formed; on the insulating film, an insulating film formed of a silicon carbide film having excellent adhesiveness to a low dielectric constant material film is formed; on the insulating film, an insulating film formed of a low dielectric constant material as an interlayer insulating film is formed; and thereafter a wiring as an upper layer wiring is formed.
    Type: Application
    Filed: March 24, 2004
    Publication date: November 18, 2004
    Applicant: Renesas Technology Corp.
    Inventors: Junji Noguchi, Takayuki Oshima, Noriko Miura, Kensuke Ishikawa, Tomio Iwasaki, Kiyomi Katsuyama, Tatsuyuki Saito, Tsuyoshi Tamaru, Hizuru Yamaguchi
  • Publication number: 20040217432
    Abstract: Diffusion layers 2-5 are formed on a silicon substrate 1, and gate dielectric films 6, 7 and gate electrodes 8, 9 are formed on these diffusion layers 2-5 so as to be MOS transistors. Zirconium oxide or hafnium oxide is used as a major component of gate dielectric films 6, 7. Gate dielectric films 6, 7 are formed, for example, by CVD. As substrate 1, there is used one of which the surface is (111) crystal face so as to prevent diffusion of oxygen into silicon substrate 1 or gate electrodes 8, 9. In case of using a substrate of which the surface is (111) crystal face, diffusion coefficient of oxygen is less than {fraction (1/100)} of the case in which a silicon substrate of which the surface is (001) crystal face is used, and oxygen diffusion is controlled. Thus, oxygen diffusion is controlled, generation of leakage current is prevented and properties are improved.
    Type: Application
    Filed: May 17, 2004
    Publication date: November 4, 2004
    Applicant: Hitachi, Ltd.
    Inventors: Tomio Iwasaki, Hiroshi Moriya, Hideo Miura, Shuji Ikeda
  • Patent number: 6784549
    Abstract: In a semiconductor device, which comprises a capacitor component comprising a first electrode, an oxide film with a high dielectric constant or ferroelectricity in contact with the first electrode and a second electrode in contact with the oxide film, as formed in this order, on one principal side of a silicon substrate with a metal wiring layer formed thereon, such problems as breaking of tungsten interconnect, lowering of reliability, lowering of yield, etc. of semi-conductor devices can be solved by using molybdenum-containing tungsten as the material of metal interconnect layer.
    Type: Grant
    Filed: March 25, 2003
    Date of Patent: August 31, 2004
    Assignee: Renesas Technology Corp.
    Inventors: Tomio Iwasaki, Hideo Miura, Takashi Nakajima, Hiroyuki Ohta, Shinji Nishihara, Masashi Sahara
  • Patent number: 6781172
    Abstract: A semiconductor device equipped with information storage capacitor comprising a first capacitor electrode, an oxide film, a second capacitor electrode and insulating films containing silicon as a main constituting element, wherein at least one of first and second capacitor electrodes contains as a main constituting element at least one element selected from rhodium, ruthenium, iridium, osmium and platinum, and as an adding element at least one element selected from palladium, nickel, cobalt and titanium, is excellent in adhesiveness between the capacitor electrodes and the insulating films.
    Type: Grant
    Filed: March 8, 2001
    Date of Patent: August 24, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Hiroshi Moriya, Tomio Iwasaki, Hiroyuki Ohta, Shinpei Iijima, Isamu Asano, Yuzuru Ohji, Yoshitaka Nakamura
  • Publication number: 20040155276
    Abstract: In order to supply a semiconductor device having high-reliability, there are used a first capacitor electrode, a capacitor insulating film formed in contact with the first capacitor electrode and mainly composed of titanium oxide, and a second capacitor electrode formed in contact with the capacitor insulating film, and there is used a conductive oxide film mainly composed of ruthenium oxide or iridium oxide for the first capacitor electrode and the second capacitor electrode. Alternatively, there is used a gate insulating film having a titanium silicate film and titanium oxide which suppress leakage current.
    Type: Application
    Filed: December 5, 2003
    Publication date: August 12, 2004
    Inventors: Tomio Iwasaki, Hiroshi Moriya, Hideo Miura, Shuji Ikeda
  • Publication number: 20040150111
    Abstract: In a semiconductor device having a cobalt silicide film, at least nickel or iron is contained in the cobalt silicide film for preventing the rise of resistance incidental to thinning of the film.
    Type: Application
    Filed: January 22, 2004
    Publication date: August 5, 2004
    Inventors: Hiromi Shimazu, Tomio Iwasaki, Hiroyuki Ohta, Hideo Miura, Shuji Ikeda
  • Publication number: 20040089947
    Abstract: Problem: In a semiconductor device having a multilayer structure comprising an insulating film, an adjacent conductive film, and a main conductive film, to provide a highly reliable semiconductor device in which defects in the multilayer structure such as adhesive fracture and cracks are difficult to occur. Further, to provide a highly reliable semiconductor device in which voids and disconnections due to migration are difficult to occur.
    Type: Application
    Filed: July 3, 2003
    Publication date: May 13, 2004
    Inventors: Tomio Iwasaki, Hideo Miura, Isamu Asano