Patents by Inventor Tomio Iwasaki

Tomio Iwasaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120015514
    Abstract: The reliability of wirings, each of which includes a main conductive film containing copper as a primary component, is improved. On an insulating film including the upper surface of a wiring serving as a lower layer wiring, an insulating film formed of a silicon carbonitride film having excellent barrier properties to copper is formed; on the insulating film, an insulating film formed of a silicon carbide film having excellent adhesiveness to a low dielectric constant material film is formed; on the insulating film, an insulating film formed of a low dielectric constant material as an interlayer insulating film is formed; and thereafter a wiring as an upper layer wiring is formed.
    Type: Application
    Filed: September 23, 2011
    Publication date: January 19, 2012
    Inventors: JUNJI NOGUCHI, Takayushi Oshima, Noriko Miura, Kensuke Ishikawa, Tomio Iwasaki, Kiyomi Katsuyama, Tatsuyuki Saito, Tsuyoshi Tamaru, Hizuru Yamaguchi
  • Publication number: 20110316661
    Abstract: It is an objective of the present invention to provide a highly adhesive unsaturated polyester resin composition for fixing or immobilizing coils. There is provided an unsaturated polyester resin composition for adhesion of a coil, which includes the ingredients of: A) an unsaturated polyester resin and/or a vinyl ester resin; B) a monomer including a vinyl group as a polymerizable substituent at at least one end thereof; C) an isocyanate; and D) a polymerization initiator.
    Type: Application
    Filed: June 23, 2011
    Publication date: December 29, 2011
    Inventors: Takahito MURAKI, Satoru Amou, Tomio Iwasaki
  • Publication number: 20110293965
    Abstract: In a lubricant including a structure of a polymer compound, the structure includes polar groups or side chains having polarity at terminal ends and in at least one intermediate portion of a main chain, and also includes non-polar side chains at the terminal ends or in the intermediate portions of the main chain. For example, any of —OH, —CH2OH, —COOH, —NH2, and —CH2OCH2CH(OH)CH2OH groups is used for the polar group or the side chain having polarity, and a side chain including the structure of the formula (5) or (6) is used for the non-polar side chain. Then, in the lubricant used for a magnetic disk device, the surface energy is suppressed to a low level while a thin film thickness is being kept small for one molecule, thereby realizing stabilization of head-disk interface in the magnetic disk device for a long time. —(CF2O)P—CF3??(5) —(CF2)P—CF3??(6) (where P represents an integer of 0 or greater in the formulas (5) and (6)).
    Type: Application
    Filed: December 11, 2009
    Publication date: December 1, 2011
    Inventors: Yoko Saito, Tomio Iwasaki, Naoya Sasaki, Mina Amo
  • Patent number: 8026609
    Abstract: Provided, is a reliable semiconductor device with a layered interconnect structure that may develop no trouble of voids and interconnect breakdowns, in which the layered interconnect structure comprises a conductor film and a neighboring film as so layered on a semiconductor substrate that the neighboring film is contacted with the conductor film.
    Type: Grant
    Filed: April 13, 2010
    Date of Patent: September 27, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Tomio Iwasaki, Hideo Miura
  • Publication number: 20110215288
    Abstract: Since a chalcogenide material has low adhesion to a silicon oxide film, there is a problem in that it tends to separate from the film during the manufacturing step of a phase change memory. In addition, since the chalcogenide material has to be heated to its melting point or higher during resetting (amorphization) of the phase change memory, there is a problem of requiring extremely large rewriting current. An interfacial layer includes an extremely thin insulator or semiconductor having the function as both an adhesive layer and a high resistance layer (thermal resistance layer) is inserted between chalcogenide material layer/interlayer insulative film and between chalcogenide material layer/plug.
    Type: Application
    Filed: May 16, 2011
    Publication date: September 8, 2011
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Yuichi MATSUI, Tomio IWASAKI, Norikatsu TAKAURA, Kenzo KUROTSUCHI
  • Patent number: 7965022
    Abstract: A piezoelectric element that is high in piezoelectric performance and large in displacement and is reliable is provided. The piezoelectric element includes a piezoelectric material containing BaTi2O5 as the principal constituent material and an inner electrode that applies voltage to the piezoelectric material. In this piezoelectric element, an electrode material (a mixture of Ru and RuO2) excellent in lattice matching with the piezoelectric material BaTi2O5 is used as the principal constituent material of the inner electrode.
    Type: Grant
    Filed: October 21, 2009
    Date of Patent: June 21, 2011
    Assignee: Hitachi, Ltd.
    Inventor: Tomio Iwasaki
  • Publication number: 20110049689
    Abstract: A semiconductor device in which an adhesion between a lead and a sealing body (mold sealing body) is improved to prevent the peering is provided. In a semiconductor device having a semiconductor chip, a plurality of leads electrically connected to the semiconductor chip and mainly made of metal and a sealing body for sealing the semiconductor chip, in order to improve the adhesion between the lead and the sealing body (mold sealing body), a material combination with good lattice matching is used as a combination of a surface material of the lead and a material of the sealing body, and the sealing body mainly made of acene is used.
    Type: Application
    Filed: August 20, 2010
    Publication date: March 3, 2011
    Inventor: Tomio IWASAKI
  • Patent number: 7846567
    Abstract: The present invention provides a magnetic disk in a discrete track medium and a patterned medium, which prevents the loss of the magnetically recorded data when a head of a magnetic disk device contacts the magnetic disk, and a manufacturing method thereof. A magnetic disk has a protrusion as a non-magnetic member formed on a disk surface to prevent a head from being in contact with a recording section. When the protrusion formed in a disk substrate collides against the head, the protrusion 7 does not collapse, and accordingly, the recording layer is not damaged. Alternatively, concave and convex portions are formed on the substrate surface to use the convex portion as the protrusion.
    Type: Grant
    Filed: May 28, 2008
    Date of Patent: December 7, 2010
    Assignee: Hitachi, Ltd.
    Inventors: Yasutaka Okura, Tomio Iwasaki
  • Patent number: 7825436
    Abstract: A thin film electron source comprising a substrate, a lower electrode formed on one main face of said substrate, an insulation layer formed in contact with said lower electrode and an upper electrode formed in contact with said insulation layer. The upper electrode comprises a first under-layer, a second under-layer, an intermediate layer and a surface layer laminated from the insulation layer side. A main material of the first under-layer is IrO2 or RuO2; a main material of the second under-layer is Ir or Ru, and a main material of the surface layer is a member selected from the group consisting of Au and Ag.
    Type: Grant
    Filed: April 3, 2007
    Date of Patent: November 2, 2010
    Assignee: Hitachi, Ltd.
    Inventor: Tomio Iwasaki
  • Patent number: 7796362
    Abstract: The present invention provides a highly reliable patterned medium without generating an error in recording and reproduction, and a magnetic disc memory device using the same. The patterned medium has a substrate, a soft magnetic layer, a non-magnetic layer, an intermediate layer and a recording layer. The recording layer has a pattern structure of a non-magnetic material and a magnetic material, and the Young's modulus of the non-magnetic material is larger than the Young's modulus of the magnetic material.
    Type: Grant
    Filed: January 18, 2007
    Date of Patent: September 14, 2010
    Assignee: Hitachi, Ltd.
    Inventor: Tomio Iwasaki
  • Patent number: 7777343
    Abstract: The reliability of wirings, each of which includes a main conductive film containing copper as a primary component, is improved. On an insulating film including the upper surface of a wiring serving as a lower layer wiring, an insulating film formed of a silicon carbonitride film having excellent barrier properties to copper is formed; on the insulating film, an insulating film formed of a silicon carbide film having excellent adhesiveness to a low dielectric constant material film is formed; on the insulating film, an insulating film formed of a low dielectric constant material as an interlayer insulating film is formed; and thereafter a wiring as an upper layer wiring is formed.
    Type: Grant
    Filed: June 9, 2006
    Date of Patent: August 17, 2010
    Assignee: Renesas Technology Corp.
    Inventors: Junji Noguchi, Takayuki Oshima, Noriko Miura, Kensuke Ishikawa, Tomio Iwasaki, Kiyomi Katsuyama, Tatsuyuki Saito, Tsuyoshi Tamaru, Hizuru Yamaguchi
  • Patent number: 7771853
    Abstract: A patterned magnetic medium includes: a substrate; a soft magnetic underlying film, a nonmagnetic film, an intermediate film and a recording layer which are formed on a principal surface of the substrate; a first protective film formed in contact with the recording film; a second protective film formed in contact with the first protective film; and a third protective film formed in contact with the second protective film. Moreover, the recording layer has a pattern structure formed by making a magnetic film come into contact with a concavo-convex pattern of a nonmagnetic material. The first protective film and the third protective film include carbon as the main constituent element and the second protective film is a wet-coated polymer film. High adhesion between carbon and the wet-coated polymer film can prevent peeling off and the wet-coated polymer film as a cushioning material absorbs impact.
    Type: Grant
    Filed: December 14, 2007
    Date of Patent: August 10, 2010
    Assignee: Hitachi, Ltd.
    Inventor: Tomio Iwasaki
  • Publication number: 20100193957
    Abstract: Provided, is a reliable semiconductor device with a layered interconnect structure that may develop no trouble of voids and interconnect breakdowns, in which the layered interconnect structure comprises a conductor film and a neighboring film as so layered on a semiconductor substrate that the neighboring film is contacted with the conductor film.
    Type: Application
    Filed: April 13, 2010
    Publication date: August 5, 2010
    Inventors: Tomio Iwasaki, Hideo Miura
  • Publication number: 20100102680
    Abstract: A piezoelectric element that is high in piezoelectric performance and large in displacement and is reliable is provided. The piezoelectric element includes a piezoelectric material containing BaTi2O5 as the principal constituent material and an inner electrode that applies voltage to the piezoelectric material. In this piezoelectric element, an electrode material (a mixture of Ru and RuO2) excellent in lattice matching with the piezoelectric material BaTi2O5 is used as the principal constituent material of the inner electrode.
    Type: Application
    Filed: October 21, 2009
    Publication date: April 29, 2010
    Inventor: Tomio IWASAKI
  • Patent number: 7701062
    Abstract: Provided, is a reliable semiconductor device with a layered interconnect structure that may develop no trouble of voids and interconnect breakdowns, in which the layered interconnect structure comprises a conductor film and a neighboring film as so layered on a semiconductor substrate that the neighboring film is contacted with the conductor film.
    Type: Grant
    Filed: August 6, 2007
    Date of Patent: April 20, 2010
    Assignee: Hitachi, Ltd.
    Inventors: Tomio Iwasaki, Hideo Miura
  • Patent number: 7674668
    Abstract: After a gate electrode is formed on a main surface of a semiconductor substrate, low concentration layers are formed on the main surface of the semiconductor substrate by implanting impurities therein, with using the gate electrode as a mask. Thereafter, first sidewalls and second sidewalls are formed on the both side surfaces of the gate electrode. Subsequently, nitrogen or the like is ion-implanted into the semiconductor substrate, with using the first sidewalls, the second sidewalls and the gate electrode as a mask, thereby forming a crystallization-control region (CCR) on the main surface of the semiconductor substrate. Then, after the second sidewalls are removed, high concentration layers for a source and a drain are formed on the main surface of the semiconductor substrate.
    Type: Grant
    Filed: December 26, 2007
    Date of Patent: March 9, 2010
    Assignee: Renesas Technology Corp.
    Inventors: Norio Ishitsuka, Nobuyoshi Hattori, Tomio Iwasaki
  • Publication number: 20100052139
    Abstract: There is provided a semiconductor device which has been improved in adhesion between leads and a sealing resin (molding resin), and thus does not undergo peeling therebetween, and has high reliability.
    Type: Application
    Filed: August 14, 2009
    Publication date: March 4, 2010
    Inventor: Tomio IWASAKI
  • Publication number: 20100044672
    Abstract: Manufacturing processes for phase change memory have suffered from the problem of chalcogenide material being susceptible to delamination, since this material exhibits low adhesion to high melting point metals and silicon oxide films. Furthermore, chalcogenide material has low thermal stability and hence tends to sublime during the manufacturing process of phase change memory. According to the present invention, conductive or insulative adhesive layers are formed over and under the chalcogenide material layer to enhance its delamination strength. Further, a protective film made up of a nitride film is formed on the sidewalls of the chalcogenide material layer to prevent sublimation of the chalcogenide material layer.
    Type: Application
    Filed: November 5, 2009
    Publication date: February 25, 2010
    Inventors: Yuichi Matsui, Nozomu Matsuzaki, Norikatsu Takaura, Naoki Yamamoto, Hideyuki Matsuoka, Tomio Iwasaki
  • Patent number: 7667222
    Abstract: A phase change memory comprises a phase-change recording layer for recording information through changing between a crystal phase and an amorphous phase; and a means for applying a tensile strain onto the phase-change recording layer, thereby providing the memory having high reliability, as well as, high tolerance or durability against repetitive rewriting operation.
    Type: Grant
    Filed: August 31, 2005
    Date of Patent: February 23, 2010
    Assignee: Hitachi, Ltd.
    Inventor: Tomio Iwasaki
  • Patent number: 7641989
    Abstract: Embodiments of the invention provide a medium which provides high media S/N and good corrosion resistance. According to one embodiment, in a perpendicular magnetic recording medium at least comprising a soft-magnetic underlayer, a seed layer, an intermediate layer, a magnetic recording layer and an overcoat layer which are stacked over a substrate in order, the magnetic recording layer has a granular structure which consists of many columnar grains of CoCrPt alloy and a grain boundary layer containing an oxide, the seed layer is made of TaNi alloy or TaTi alloy and the intermediate layer is made of Ru or Ru alloy which contains about 80 at. % Ru or more.
    Type: Grant
    Filed: December 5, 2005
    Date of Patent: January 5, 2010
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Ikuko Takekuma, Reiko Arai, Yoko Ogawa, Yoshiyuki Hirayama, Yuzuru Hosoe, Tomio Iwasaki