Abstract: A semiconductor device includes a semiconductor part, first and second electrodes, and a control electrode. The semiconductor part is provided between the first and second electrodes. The semiconductor part includes first to seventh layers. The second of a second conductivity type is provided between the first layer of a first conductivity type and the first electrode. The third and fourth layers of the first conductivity type are arranged along the second layer between the second layer and the first electrode. The fifth layer of the second conductivity type is provided between the second electrode and the first layer. The sixth and seventh layers are arranged along the fifth layer between the first and fifth layers. The sixth and seventh layers include the first-conductivity-type impurities with first and second surface densities, respectively. The first surface density is greater than the second surface density.

Abstract: A semiconductor device of embodiments includes: a semiconductor layer including a first trench, a second trench, a first semiconductor region of a first conductive type, a second semiconductor region of a second conductive type provided between a first face and the first semiconductor region, between the first trench and the second trench, and in contact with the second trench, a third semiconductor region of a first conductive type provided between the first trench and the second semiconductor region, a fourth semiconductor region of a second conductive type provided between the third semiconductor region and the first face, and a fifth semiconductor region of a second conductive type provided between the second semiconductor region and the first face, spaced from the fourth semiconductor region, in contact with the second trench; a first electrode on a first face side; and a second electrode on a second face side.

Abstract: A semiconductor device includes: a first electrode; a first semiconductor layer located on the first electrode in a diode region; a second semiconductor layer located on the first electrode in an IGBT region; a third semiconductor layer located in the diode region, the boundary region, and the IGBT region and positioned on the first semiconductor layer and the second semiconductor layer; a fourth semiconductor layer located on the third semiconductor layer in the boundary region and the IGBT region; a fifth semiconductor layer located on the third semiconductor layer and the fourth semiconductor layer; a second electrode located in the diode region; a third electrode located in the IGBT region; and a fourth electrode extending from an upper surface of the fifth semiconductor layer toward the third semiconductor layer in the boundary region and electrically insulated from the third electrode.

Abstract: A semiconductor device includes first and second electrodes, a semiconductor part therebetween, and first and second control electrodes in a trench of the semiconductor part. The first and second control electrodes are arranged along a front surface of the semiconductor part. The semiconductor part includes first and third layers of a first-conductivity-type, and the second and fourth layer of a second-conductivity-type. The second layer is provided between the first layer and the second electrode. Between the second layer and the second electrode, the third and fourth layers are provided apart from the first layer with first and second portions of the second layer interposed, respectively. The first portion of the second layer has a first thickness in a second direction from the first electrode toward the second electrode. The second portion of the second layer has a second thickness in the second direction larger than the first thickness.

Abstract: A semiconductor device of an embodiment includes semiconductor layer including first and second planes, and in order from the first plane's side to the second plane's side, first region of first conductivity type, second region of second conductivity type, third region of second conductivity type having second conductivity type impurity concentration higher than the second region, fourth region of first conductivity type, and fifth region of second conductivity type, and including first and second trench on the first plane's side; first gate electrode in the first trench; first gate insulating film in contact with the fifth semiconductor region; second gate electrode in the second trench; second gate insulating film; a first electrode on the first plane; second electrode on the second plane; first gate electrode pad connected to the first gate electrode; and second gate electrode pad connected to the second gate electrode.

Abstract: A semiconductor device includes first and second electrodes, a semiconductor part therebetween; first and second control electrodes each in a trench at the frontside of the semiconductor part. The semiconductor part includes first to sixth layers. The first and third layers are of a first conductivity type. Other layers are of a second conductivity type. The first layer extends between the first electrode at the backside and the second electrode at the frontside. The second layer is provided between the first layer and the second electrode. The third and fourth layers each are selectively provided between the second layer and the second electrode. The fifth layer is provided between the first layer and the first electrode. The sixth layer is provided between the first layer and the second control electrode. The sixth layer extends along an insulating film between the semiconductor part and the second control electrode.

Abstract: A semiconductor device includes first and second electrodes, first to fifth layers of semiconductor, first and second control electrodes. The first and third layers are of a first conductivity type. The second, fourth and fifth layers are of a second conductivity type. The first layer is provided between the first and second electrodes. The second and third layers are provided between the first layer and the second electrode. The fourth layer is provided between the first layer and the first electrode. The first and second control electrodes are provided respectively inside trenches and arranged along a boundary between the first and second layers. The fifth layer is provided between the first and second control electrodes, and includes first and second portions. The first portion is provided in the first layer. The second portion is provided between the first and second layers and electrically connected to the first portion.

Abstract: A semiconductor device includes first and third semiconductor layers of a first conductivity type, and second, fourth and fifth semiconductor layers of a second conductivity type. The first semiconductor layer is provided on the fifth semiconductor layer. The second semiconductor layer is provided on the first semiconductor layer. The third and fourth semiconductor layers are arranged along the second semiconductor layer. In a plane parallel to an upper surface of the second semiconductor layer, the fourth semiconductor layer has a surface area greater than a surface area of the third semiconductor layer. The device further includes first to third electrodes, and first control electrode. The first to third electrodes are electrically connected to the third to fifth semiconductor layers, respectively. The first control electrode is provided in a first trench extending into the first semiconductor layer from an upper surface of the third semiconductor layer.

Abstract: A semiconductor device of one embodiment including: a semiconductor layer with first and second planes, first and second trenches, a third trench beside the first trench, a fourth trench beside the second trench, and first to fourth semiconductor regions; first to fourth gate electrodes in the first to fourth trenches, respectively; a first electrode on the first plane, a first contact area with the semiconductor layer between the first trench and the third trench being larger than a second contact area with the semiconductor layer between the third trench and the fourth trench, a third contact area with the semiconductor layer between the second trench and the fourth trench being larger than the second contact area; a second electrode on the second plane; a first gate electrode pad connected to the first and second gate electrodes; and a second gate electrode pad connected to the third and fourth gate electrodes.

Abstract: A semiconductor device of embodiments includes: a semiconductor layer having a first face and a second face opposite to the first face and including a first trench, a second trench, and a third trench provided on a first face side; a first gate electrode in the first trench; a second gate electrode in the second trench; a third gate electrode in the third trench; a fourth gate electrode and a fifth gate electrode provided on a second face side; a first electrode contacting the first face; a second electrode contacting the second face; a first electrode pad electrically connected to the first gate electrode; a second electrode pad electrically connected to the second gate electrode; a third electrode pad electrically connected to the third gate electrode; a fourth electrode pad electrically connected to the fourth gate electrode; and a fifth electrode pad electrically connected to the fifth gate electrode.

Abstract: A semiconductor device includes first and second semiconductor layers of a first conductivity type, a third semiconductor layer of a second conductivity type, a plurality of electrodes, and a first insulating film. The second semiconductor layer is provided on the first semiconductor layer. The third semiconductor layer is provided on the second semiconductor layer with a first surface at a side opposite to the first semiconductor layer. The electrodes extend from the first surface into the second semiconductor layer. A first insulating film provided between the second and third semiconductor layers and each of electrodes. The electrodes include first and second electrode groups. The first electrode group is arranged in one column in the first direction and apart from each other by a first distance. The first and second electrode groups are apart from each other by a second distance in the second direction.

Abstract: A semiconductor device includes a semiconductor layer having first and second surfaces, a first electrode and a first gate electrode along the first surface, and a second electrode and a second gate electrode along the second surface. The layer includes a first type first region, a second type second region between the first region and the first surface and facing the first gate electrode, a first type third region between the second region and the first surface and contacting the first electrode, a second type fourth region between the first region and the second surface, facing the second gate electrode, and contacting the second electrode, and a first type fifth region between the fourth region and the second surface and contacting the second electrode. Transistors including the first and second gate electrodes have different threshold voltages that are both positive or negative.

Abstract: A semiconductor element includes a semiconductor part, first to third electrodes and a control electrode. The first electrode is provided at a front side of the semiconductor part. The second and third electrodes are provided at a back side of the semiconductor part. The control electrode is provided between the semiconductor part and the first electrode. The semiconductor part includes first and third layers of a first conductivity type and second and fourth layers of a second conductivity type. The first layer is provided between the first and second electrodes and between the first and third electrodes. The first layer is connected to the third electrode at the back side. The second layer is provided between the first layer and the first electrode. The third layer is provided between the second layer and the first electrode. The fourth layer is provided between the second electrode and the first layer.

Abstract: A semiconductor device of the embodiment includes a semiconductor layer including a first semiconductor region, a second semiconductor region, a third semiconductor region, a fourth semiconductor region, a fifth semiconductor region, a sixth semiconductor region, a first trench, and a second trench, a first gate electrode in the first trench; a second gate electrode in the second trench; a first electrode on a first face side; a second electrode on a second face side; a first electrode pad connected to the first gate electrode; and a second electrode pad connected to the second gate electrode. The semiconductor device includes a first region including the first semiconductor region; a second region including the second semiconductor region; and a third region provided between the first region and the second region, the third region having a density of the second trench higher than that of the first region.

Abstract: A semiconductor device includes first and second electrodes. A first-type layer is between the first and second electrodes. A pair of first gate electrodes is between the first and second electrodes and each is surrounded by a gate insulating film. Second gate electrodes are disposed between the pair of first gate electrodes. A second-type layer is on the first-type layer in a first region between a first gate electrode and one of the second gate electrodes. Another first-type layer is on the second-type layer. This other first-type layer is directly adjacent to the gate insulating film. Another second-type layer is on the other second-type layer. A width of the first-type layer between adjacent second gate electrodes is less than a length of the first-type layer in the region between adjacent second gate electrodes.

Abstract: A semiconductor device according to an embodiment including: a semiconductor layer having a first plane and a second plane, the semiconductor layer including: a first trench on the first plane; a second trench on the second plane; a first conductivity first semiconductor region; a second conductivity type second semiconductor region between the first semiconductor region and the first plane; a first conductivity type third semiconductor region between the second semiconductor region and the first plane; a second conductivity type fourth semiconductor region between the third semiconductor region and the first plane; and a first conductivity type fifth semiconductor region provided between the second trench and the third semiconductor region in contact with the second trench; a first gate electrode in the first trench; a second gate electrode in the second trench; a first electrode on the first plane; and a second electrode on the second plane.

Abstract: A semiconductor device includes a semiconductor part having a first surface and a second surface opposite to the first surface, a first electrode on the first surface, a second electrode on the second surface, first to third control electrodes between the first electrode and the semiconductor part. The first to third control electrodes are biased independently from each other. The semiconductor part includes a first layer of a first-conductivity-type, a second layer of a second-conductivity-type, a third layer of the first-conductivity-type and the fourth layer of the second-conductivity-type. The second layer is provided between the first layer and the first electrode. The third layer is selectively provided between the second layer and the first electrode. The fourth layer is provided between the first layer and the second electrode. The second layer opposes the first to third control electrode with insulating films interposed.

Abstract: A semiconductor device of an embodiment includes first and second electrodes; first and second gate electrodes; and semiconductor layer including first and second planes, the semiconductor layer including a first semiconductor region of first conductivity type including first portion, second portion having a carrier concentration higher than the first portion, and third portion having a carrier concentration lower than the second portion; a second semiconductor region of second conductivity type between the first semiconductor region and the first plane and facing the first gate electrode; a third semiconductor region of first conductivity type between the second semiconductor region and the first plane and contacting the first electrode; a fourth semiconductor region of second conductivity type between the first semiconductor region and the second plane and facing the second gate electrode; and a fifth semiconductor region of first conductivity type between the fourth semiconductor region and the second plan

Abstract: A semiconductor device includes a semiconductor body; a first electrode on the semiconductor body; control electrodes provided in the semiconductor body along the surface thereof; and first films electrically insulating the control electrodes from the semiconductor body. The semiconductor body includes first, third, sixth layers of a first conductivity type, and second, fourth, fifth layers of a second conductivity type. The second to sixth layers are provided between the first electrode and the first layer. The second and third layers are positioned between two adjacent control electrodes. The fourth to sixth layers are positioned between other two adjacent control electrodes. The sixth layer positioned between the fourth layer and the fifth layer. The sixth layer includes a major portion and a boundary portion between the major portion and one of the first films. An impurity concentration in the boundary portion is lower than that in the major portion.

Abstract: A semiconductor device has a cell part and a terminal part set in the device. The terminal part encloses the cell part. The semiconductor device includes a first electrode, a first semiconductor layer of a first conductive type, a second semiconductor layer of a second conductive type, and an insulating layer. The first semiconductor layer is formed above the first electrode. The second semiconductor layer is provided in an upper portion of the first semiconductor layer, and has an impurity concentration profile along a vertical direction including a plurality of peaks. The insulating layer is provided on the second semiconductor layer.