Patents by Inventor Tomoko Matsudai

Tomoko Matsudai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10256314
    Abstract: A semiconductor device includes a first semiconductor layer, a first electrode above and electrically connected to the first semiconductor layer, a second electrode above the first semiconductor layer and electrically connected to the first semiconductor layer, a first insulating layer above the first semiconductor layer between the first and second electrodes, and a third electrode. The second electrode is spaced from the first electrode along the first semiconductor layer. The third electrode includes a first portion above the first insulating layer between the first and second electrodes, and a second portion between the first portion and the second electrode and extending from the first portion in the direction of, and spaced from, the second electrode. The distance between the first semiconductor layer and an adjacent curved surface of the second portion gradually increases from the first portion to the end of the second portion distal the first portion.
    Type: Grant
    Filed: August 26, 2016
    Date of Patent: April 9, 2019
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masako Kodera, Tomoko Matsudai
  • Publication number: 20190006495
    Abstract: According to one embodiment, an IGBT has a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, a third semiconductor layer of the second conductivity type, a fourth semiconductor layer of the first conductivity type, and a fifth semiconductor layer of the second conductivity type, between a first electrode and a second electrode, on the first electrode in order. A third electrode is provided on the third semiconductor layer, the fourth semiconductor layer, and the fifth semiconductor layer via a gate insulating film, and is insulated from the first electrode and the second electrode. A fourth electrode is provided between the third electrode and the second semiconductor layer, and is insulated from the third electrode and the second semiconductor layer.
    Type: Application
    Filed: March 9, 2018
    Publication date: January 3, 2019
    Inventors: Tsuneo Ogura, Tomoko Matsudai
  • Publication number: 20190006494
    Abstract: A semiconductor device includes a semiconductor layer between a collector electrode and an emitter electrode. The semiconductor layer includes a base region of a first conductivity type, a first collector layer of a second conductivity type between the collector electrode in a cell region in which an emitter layer is arranged and the base layer, and a second collector layer of the second conductivity type between the collector electrode in a boundary region in which a gate wiring is arranged and the base layer. A peak value of an impurity concentration of the second conductivity type in the second collector layer is higher than a peak value of an impurity concentration of the second conductivity type in the first collector layer.
    Type: Application
    Filed: March 2, 2018
    Publication date: January 3, 2019
    Inventor: Tomoko MATSUDAI
  • Publication number: 20180342604
    Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a semiconductor layer provided between the first electrode and the second electrode, a plurality of gate electrodes provided in the semiconductor layer and extending in a first direction, a plurality of gate interconnects provided in the semiconductor layer and connected with the gate electrodes, the gate interconnects extending in a second direction crossing the first direction, an insulating film provided between the gate electrodes and the semiconductor layer, and between the gate interconnects and the semiconductor layer, and an inter-layer insulating film provided between the gate electrodes and the second electrode, and between the gate interconnects and the second electrode.
    Type: Application
    Filed: December 11, 2017
    Publication date: November 29, 2018
    Inventors: Tsuneo Ogura, Tomoko Matsudai
  • Patent number: 10141455
    Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, an insulating region, and a third semiconductor region of the first conductivity type. The first semiconductor region is provided between the first electrode and the second electrode, and is in contact with the first electrode. The second semiconductor region is provided between the first semiconductor region and the second electrode. The second semiconductor region is in contact with the second electrode. The insulating region extends in a direction from the second electrode toward the first semiconductor region. The insulating region is in contact with the second electrode. The third semiconductor region is provided between the second semiconductor region and the insulating region.
    Type: Grant
    Filed: March 16, 2017
    Date of Patent: November 27, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tsuneo Ogura, Shinichiro Misu, Tomoko Matsudai, Norio Yasuhara
  • Publication number: 20180301538
    Abstract: A semiconductor device includes first and second electrodes spaced apart along a first direction, a first semiconductor region of a first conductivity type between the first and second electrodes, first and second conductive regions between the first semiconductor region and the second electrode and electrically connected to the second electrode, a third electrode between the first and second conductive regions, second and third semiconductor regions of a second conductivity type respectively between the first and second conductive regions and the third electrode, and fourth and fifth semiconductor regions of the first conductivity type respectively between the second and third semiconductor regions and the second electrode. The third electrode extends in the first direction toward the first electrode farther than portions of the second and third semiconductor regions that are alongside the third electrode.
    Type: Application
    Filed: June 20, 2018
    Publication date: October 18, 2018
    Inventors: Tsuneo OGURA, Tomoko MATSUDAI
  • Patent number: 10083956
    Abstract: A semiconductor device includes first and second electrodes, a first semiconductor region between the first and second electrodes, a second semiconductor region between the first semiconductor region and the second electrode, a third semiconductor region between the first semiconductor region and the second electrode, a fourth semiconductor region between the first semiconductor region and the first electrode, a third electrode between the first electrode and the first semiconductor region, a first insulating film between the third electrode and both the first electrode and the first semiconductor region, a fifth semiconductor region between the fourth semiconductor region and the first electrode and in contact with the first electrode, a sixth semiconductor region between the fourth semiconductor region and the first electrode and in contact with the first electrode, and a seventh semiconductor region between the fourth semiconductor region and the first insulating film and in contact with the first semicond
    Type: Grant
    Filed: September 4, 2017
    Date of Patent: September 25, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tsuneo Ogura, Tomoko Matsudai
  • Publication number: 20180226398
    Abstract: A semiconductor device includes first and second electrodes, a first semiconductor region between the first and second electrodes, a second semiconductor region between the first semiconductor region and the second electrode, a third semiconductor region between the first semiconductor region and the second electrode, a fourth semiconductor region between the first semiconductor region and the first electrode, a third electrode between the first electrode and the first semiconductor region, a first insulating film between the third electrode and both the first electrode and the first semiconductor region, a fifth semiconductor region between the fourth semiconductor region and the first electrode and in contact with the first electrode, a sixth semiconductor region between the fourth semiconductor region and the first electrode and in contact with the first electrode, and a seventh semiconductor region between the fourth semiconductor region and the first insulating film and in contact with the first semicond
    Type: Application
    Filed: September 4, 2017
    Publication date: August 9, 2018
    Inventors: Tsuneo OGURA, Tomoko MATSUDAI
  • Patent number: 10032874
    Abstract: A semiconductor device includes first and second electrodes spaced apart along a first direction, a first semiconductor region of a first conductivity type between the first and second electrodes, first and second conductive regions between the first semiconductor region and the second electrode and electrically connected to the second electrode, a third electrode between the first and second conductive regions, second and third semiconductor regions of a second conductivity type respectively between the first and second conductive regions and the third electrode, and fourth and fifth semiconductor regions of the first conductivity type respectively between the second and third semiconductor regions and the second electrode. The third electrode extends in the first direction toward the first electrode farther than portions of the second and third semiconductor regions that are alongside the third electrode.
    Type: Grant
    Filed: August 29, 2016
    Date of Patent: July 24, 2018
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tsuneo Ogura, Tomoko Matsudai
  • Publication number: 20170271490
    Abstract: A semiconductor device includes a third electrode between a first semiconductor region and a second electrode, a fourth electrode between the first semiconductor region and the second electrode, a second semiconductor region between the first semiconductor region and the second electrode and between the third electrode and the fourth electrode, a third semiconductor region between the second semiconductor region and the second electrode, a fourth electrode between the first semiconductor region and the second electrode to be electrically connected to the second electrode, and a fifth semiconductor region between the first electrode and the first semiconductor region. A first insulating film is provided between the third electrode and the first semiconductor region, the second semiconductor region, the third semiconductor region and the second electrode.
    Type: Application
    Filed: February 24, 2017
    Publication date: September 21, 2017
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tsuneo OGURA, Tomoko MATSUDAI
  • Publication number: 20170263714
    Abstract: A semiconductor device includes first and second electrodes spaced apart along a first direction, a first semiconductor region of a first conductivity type between the first and second electrodes, first and second conductive regions between the first semiconductor region and the second electrode and electrically connected to the second electrode, a third electrode between the first and second conductive regions, second and third semiconductor regions of a second conductivity type respectively between the first and second conductive regions and the third electrode, and fourth and fifth semiconductor regions of the first conductivity type respectively between the second and third semiconductor regions and the second electrode. The third electrode extends in the first direction toward the first electrode farther than portions of the second and third semiconductor regions that are alongside the third electrode.
    Type: Application
    Filed: August 29, 2016
    Publication date: September 14, 2017
    Inventors: Tsuneo OGURA, Tomoko MATSUDAI
  • Publication number: 20170263724
    Abstract: A semiconductor device includes a first semiconductor layer, a first electrode above and electrically connected to the first semiconductor layer, a second electrode above the first semiconductor layer and electrically connected to the first semiconductor layer, a first insulating layer above the first semiconductor layer between the first and second electrodes, and a third electrode. The second electrode is spaced from the first electrode along the first semiconductor layer. The third electrode includes a first portion above the first insulating layer between the first and second electrodes, and a second portion between the first portion and the second electrode and extending from the first portion in the direction of, and spaced from, the second electrode. The distance between the first semiconductor layer and an adjacent curved surface of the second portion gradually increases from the first portion to the end of the second portion distal the first portion.
    Type: Application
    Filed: August 26, 2016
    Publication date: September 14, 2017
    Inventors: Masako KODERA, Tomoko MATSUDAI
  • Patent number: 9741872
    Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a first semiconductor region, a second semiconductor region, a third semiconductor region, and a fourth semiconductor region. The first semiconductor region is provided between the first and second electrodes. The second semiconductor region is provided between the first semiconductor region and the second electrode. The third semiconductor region is provided between the first semiconductor region and the second electrode, is provided beside the second semiconductor region in a second direction crossing a first direction from the first electrode toward the second electrode, and a portion of the first semiconductor region is positioned between the third and second semiconductor regions. The fourth semiconductor region is provided between the portion of the first semiconductor region and the second electrode and has a greater impurity concentration than the second and third semiconductor regions.
    Type: Grant
    Filed: September 4, 2015
    Date of Patent: August 22, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tsuneo Ogura, Tomoko Matsudai
  • Publication number: 20170186884
    Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, an insulating region, and a third semiconductor region of the first conductivity type. The first semiconductor region is provided between the first electrode and the second electrode, and is in contact with the first electrode. The second semiconductor region is provided between the first semiconductor region and the second electrode. The second semiconductor region is in contact with the second electrode. The insulating region extends in a direction from the second electrode toward the first semiconductor region. The insulating region is in contact with the second electrode. The third semiconductor region is provided between the second semiconductor region and the insulating region.
    Type: Application
    Filed: March 16, 2017
    Publication date: June 29, 2017
    Inventors: Tsuneo Ogura, Shinichiro Misu, Tomoko Matsudai, Norio Yasuhara
  • Patent number: 9653557
    Abstract: A semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region having a second conductivity type, a first insulating layer on the first and second semiconductor regions, and field plate electrodes are provided in the first insulating layer at different distances from the first semiconductor layer. A first field plate electrode is at a first distance, a second field plate electrode is at a second distance greater than the first distance, and a third field plate electrode is at a distance greater than the second distance. The first through third field plate electrodes are electrically connected to each other and the third electrode is electrically connected to the second semiconductor region.
    Type: Grant
    Filed: March 3, 2014
    Date of Patent: May 16, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tomoko Matsudai, Yuichi Oshino, Keiko Kawamura, Bungo Tanaka
  • Patent number: 9634128
    Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, an insulating region, and a third semiconductor region of the first conductivity type. The first semiconductor region is provided between the first electrode and the second electrode, and is in contact with the first electrode. The second semiconductor region is provided between the first semiconductor region and the second electrode. The second semiconductor region is in contact with the second electrode. The insulating region extends in a direction from the second electrode toward the first semiconductor region. The insulating region is in contact with the second electrode. The third semiconductor region is provided between the second semiconductor region and the insulating region.
    Type: Grant
    Filed: July 6, 2015
    Date of Patent: April 25, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tsuneo Ogura, Shinichiro Misu, Tomoko Matsudai, Norio Yasuhara
  • Patent number: 9620631
    Abstract: A power semiconductor device includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, a pair of conductive bodies, a third semiconductor layer of the second conductivity type, and a fourth semiconductor layer of the first conductivity type. The second semiconductor layer is provided on the first semiconductor layer on the first surface side. The pair of conductive bodies are provided via an insulating film in a pair of first trenches extending across the second semiconductor layer from a surface of the second semiconductor layer to the first semiconductor layer. The third semiconductor layer is selectively formed on the surface of the second semiconductor layer between the pair of conductive bodies and has a higher second conductivity type impurity concentration in a surface of the third semiconductor layer than the second semiconductor layer.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: April 11, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tomoko Matsudai, Tsuneo Ogura, Yuichi Oshino, Hideaki Ninomiya, Kazutoshi Nakamura
  • Patent number: 9613951
    Abstract: According to one embodiment, a semiconductor device includes a first and second electrode, a first, second, third and fourth semiconductor region, and a first intermediate metal film. The first region is provided above the first electrode and has a first impurity concentration. The second region is provided above the first region and has a second impurity concentration lower than the first impurity concentration. The third region is provided above the second region and has a third impurity concentration. The fourth region is provided above the second region and has a fourth impurity concentration lower than the third impurity concentration. The second electrode is provided above the third region and the fourth region and is in ohmic contact with the third region. The intermediate metal film is provided between the second electrode and the fourth region. The intermediate metal film forms Schottky junction with the fourth region.
    Type: Grant
    Filed: March 6, 2014
    Date of Patent: April 4, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tomoko Matsudai, Tsuneo Ogura, Yuuichi Oshino
  • Publication number: 20170077089
    Abstract: According to one embodiment, in a semiconductor device, The first semiconductor region is provided between the first and the second electrode. The second semiconductor region is provided between the first semiconductor region and the second electrode. The first and second connection region are electrically connected to the second electrode, reaches the first semiconductor region. The first insulating film is provided between the first connection region and the second semiconductor region and between the first connection region and the first semiconductor region. The second insulating film is provided between the second connection region and the second semiconductor region and between the second connection region and the first semiconductor region.
    Type: Application
    Filed: February 18, 2016
    Publication date: March 16, 2017
    Inventors: Tsuneo Ogura, Tomoko Matsudai
  • Patent number: 9496352
    Abstract: According to one embodiment, a semiconductor device includes: a first semiconductor region; a second semiconductor region on the first semiconductor region; a third semiconductor region on the second semiconductor region; an fourth insulating film on the second semiconductor region and the third semiconductor region; a first electrode under the first semiconductor region; a second electrode on the fourth insulating film; a plurality of first contact regions extending in a first direction from the first electrode toward the second electrode in the fourth insulating film, and the plurality of first contact regions electrically connecting the third semiconductor region to the second electrode; a plurality of second contact regions extending in the first direction in the fourth insulating film, and one of the plurality of second contact regions between adjacent ones of the first contact regions; and a third electrode in the second semiconductor region via a first insulating film.
    Type: Grant
    Filed: September 2, 2015
    Date of Patent: November 15, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tomoko Matsudai, Norio Yasuhara, Tsuneo Ogura