Patents by Inventor Toshio Yamada
Toshio Yamada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 5592925Abstract: An exhaust gas recirculation device for an internal combustion engine has a filter for trapping particulates in a recirculation gas, which is arranged in a recirculation gas route, and a device for generating a reverse air flow in which a pure gas flow for the reverse air flow passing through said filter in a reverse direction with respect to a recirculation gas flowing direction in the filter is generated. In the exhaust gas circulation device, the trapped gases are discharged out of the filter by the reverse air flow and are not returned into the internal combustion engine due to an engine exhaust pressure.Type: GrantFiled: September 6, 1995Date of Patent: January 14, 1997Assignee: NGK Insulators, Ltd.Inventors: Minoru Machida, Toshio Yamada, Yukihito Ichikawa, Yoshiyuki Kasai
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Patent number: 5554953Abstract: A reference voltage generator is composed of a first constant-voltage generator consisting of three p-type MOS transistors for generating a first reference voltage Vref for use in the normal operation, which is independent of an external power-supply voltage VCC and of a second constant-voltage generator consisting of two p-type MOS transistors and one n-type MOS transistor for generating a second reference voltage Vrefbi for use in a burn-in acceleration test, which is dependent on VCC. The output of each of the constant-voltage generators is feedbacked to the other constant-voltage generator as its input. Two differential amplifiers and two output drivers output, as an internal reduced voltage Vint, the higher one of Vref and Vrefbi which are outputted from the reference voltage generator.Type: GrantFiled: October 6, 1993Date of Patent: September 10, 1996Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Akinori Shibayama, Toshio Yamada
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Patent number: 5545977Abstract: In a circuit, a resistance element is interposed between a positive power supply line (external power supply voltage level VCC) and an output node. To feedback an output potential, there is disposed an N-type MOSFET of which gate is connected to the output node and of which source is connected to the earth line (earth potential VSS) in the circuit. Another three N-type MOSFETs which are so connected in series to one another as to form a MOS diode, are interposed between the drain of the feedback N-type MOSFET and the output node. The earth line also serves as a reference potential line for the potential of the output node. Variations of the threshold voltages of the MOSFETs due to temperature variations are compensated. This restrains the output potential from varying.Type: GrantFiled: June 9, 1993Date of Patent: August 13, 1996Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Toshio Yamada, Akinori Shibayama, Shunichi Iwanari, Atsushi Fujiwara
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Patent number: 5514934Abstract: A discharge lamp having a large light output and a stable discharge. On an external surface of a cylindrical glass bulb enclosing a rare gas such as xenon, a pair of beltlike electrodes are mounted so as to face each other. A light output part is provided between the electrodes, and the electrodes are situated close to each other on the opposite side to the light output part. An image display device is constituted by arranging a plurality of the discharge lamps.Type: GrantFiled: November 14, 1994Date of Patent: May 7, 1996Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Sadayuki Matsumoto, Takeo Saikatsu, Osamu Myodo, Takehiko Sakurai, Hrumi Sawada, Junichiro Hoshizaki, Kazuo Yoshika, Toshio Yamada, Hisae Nishimatsu
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Patent number: 5515334Abstract: In a driver circuit for driving a pair of data lines, the amplitude of a differential input signal is reduced from 2.5 V to 0.6 V, which is smaller than a conventional lower-limit source voltage (approximately 1.5 V). The amplitude of the differential signal transmitted through the pair of data lines is amplified to 2.5 V by an amplifying circuit and the resulting signal is then latched by a latch circuit. After the latching by the latch circuit, the operation of the amplifying circuit is halted. The driver circuit is constituted solely by a plurality of NMOS transistors so as not to increase a leakage current flowing in the off state. Here, the threshold voltage of the NMOS transistor positioned on the ground side is reduced to a conventional lower-limit value (0.3 V to 0.6 V), while the threshold voltage of the NMOS transistor on the power-source side to a value lower than the above lower-limit value (0 V to 0.3 V), thereby enhancing a driving force of the NMOS transistor on the power-source side.Type: GrantFiled: June 15, 1994Date of Patent: May 7, 1996Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Hisakazu Kotani, Hironori Akamatsu, Ichiro Nakao, Toshio Yamada, Akihiro Sawada, Hirohito Kikukawa, Masashi Agata, Shunichi Iwanari
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Patent number: 5497079Abstract: The present invention comprises a plurality of semiconductor testing circuit chips 2 having an exclusive function of testing a plurality of one item of semiconductor integrated-circuit chips 1, a computer 3 for controlling the semiconductor testing circuit chips 2 and for collecting the test results, and a motherboard 4 on which the plurality of chips 1 to be tested and the plurality of testing circuit chips 2 are mounted so that the chips 1 to be tested are connected to the testing circuit chips 2. Since the major testing functions are incorporated into the testing circuit chips 2, the computer 3 for collecting the test results can sufficiently be composed of a low-price computer, so that it is possible to greatly lower the price of the semiconductor testing apparatus. By increasing the number of the testing circuit chips 2, it is possible to greatly increase the number of chips which can be tested simultaneously.Type: GrantFiled: August 31, 1993Date of Patent: March 5, 1996Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Toshio Yamada, Atsushi Fujiwara, Michihiro Inoue, Kazuhiro Matsuyama
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Patent number: 5495741Abstract: An apparatus for bending a band-shaped work, the apparatus including a stationary cylinder having at least a pair of slits on diametrically opposite sides thereof, the slits providing a passageway in which the work is inserted through the slits, a rotary sleeve accepting the stationary cylinder with a gap interposed therebetween, the rotary sleeve having a first opening and a second opening on diametrically opposite sides thereof, a first driving means for feeding the work passed through the passageway in the stationary cylinder and the first and second openings of the rotary sleeve, and a second driving means for rotating the rotary sleeve by a predetermined amount while the movement of the work is stopped so as to bend the work between the stationary cylinder and the rotary sleeve.Type: GrantFiled: May 23, 1994Date of Patent: March 5, 1996Assignee: Santex Co. Ltd.Inventor: Toshio Yamada
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Patent number: 5494881Abstract: A ceramic honeycomb catalyst includes a thin-walled honeycomb structural body (10) and a catalytic substance carried by the honeycomb structural body (10). The honeycomb structural body (10) has a number of longitudinally extending flow passages (13) defined by an outer peripheral wall (11) and partition walls (12) with a reduced thickness (t). The honeycomb structural body (10) satisfies particular relationships between the partition wall thickness (t) and the open frontal area (OFA) or bulk density (G). Notwithstanding the thin-walled partition walls, the honeycomb structural body (10) has practically satisfactory compressive strength characteristics. The catalyst comprising the honeycomb structural body (10) has reduced pressure loss and heat capacity.Type: GrantFiled: March 23, 1994Date of Patent: February 27, 1996Assignee: NGK Insulators, Ltd.Inventors: Minoru Machida, Toshio Yamada, Yukihito Ichikawa
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Patent number: 5456770Abstract: An amorphous magnetic alloy of a composition represented by Fe.sub.a Si.sub.b B.sub.c Sn.sub.x, where 60<a.ltoreq.90, 1.ltoreq.b.ltoreq.19, 6.ltoreq.c.ltoreq.20, 0.01.ltoreq.x<10 (atomic %) and a+b+c+x=100.Type: GrantFiled: August 8, 1994Date of Patent: October 10, 1995Assignee: Nippon Steel CorporationInventors: Takashi Sato, Toshio Yamada, Masahiro Fujikura, Wataru Ohashi, Satoshi Yamashita, Hideo Hagiwara
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Patent number: 5455012Abstract: In an exhaust gas purifying apparatus including first and second exhaust converters composed of a honeycomb catalytic substrate, arranged in sequence from an exhaust manifold downstream along exhaust gas flow of an engine, wherein the catalytic substrate of the first converter has a heat capacity of not exceeding 0.5 J/K per 1 cm.sup.3 in temperatures ranging from room temperature up to 300.degree. C., and the catalytic substrate of the second converter has a geometric surface area of at least 25 cm.sup.2 /cm.sup.3. The first converter purifies exhaust gas immediately after starting up and before completion of warming up of the engine, and the second converter further purifies noxious contents still remaining as being beyond capacity of the first converter.Type: GrantFiled: March 24, 1994Date of Patent: October 3, 1995Assignee: NGK Insulators, Ltd.Inventors: Minoru Machida, Toshio Yamada
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Patent number: 5455097Abstract: A honeycomb structural body including an outermost peripheral wall, and partition walls axially defining a number of through holes inside the outermost peripheral wall. The honeycomb structural body is bent around at least one line located orthogonally to an extending direction of the through holes, wherein L1/L2.gtoreq.0.8, and R.gtoreq.100 mm, in which L1 is an axial length of a longest through hole among through holes located in an outer portion of the honeycomb structural body, L2 is an axial length of a shortest through hole among through holes located in an inner portion of the honeycomb structural body, and R is a radius of curvature of a center line of the honeycomb structural body defined by continuously connecting centroids of said outermost peripheral wall of the honeycomb structural body in respective planes orthogonal to the extending direction of the through holes thereof.Type: GrantFiled: March 15, 1994Date of Patent: October 3, 1995Assignee: NGK Insulators, Ltd.Inventors: Minoru Machida, Masaomi Kamiya, Toshio Yamada
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Patent number: 5447614Abstract: A method of processing a sample using a charged beam and reactive gases and a system employing the same, the method and system being able to perform the reactive etching and the beam assisted deposition using a charged particle detector free from the degradation of the performance due to the reactive gas. The system is designed in such a way that a shutter mechanism is provided in the form of the charged particle detector, and a chamber for accommodating the charged particle detector can be evacuated. In the observation of the sample, the charged particle detector is turned on to open the shutter mechanism, and in the processing of the sample, the charged particle detector is turned off or left as it is to shut the shutter mechanism to evacuate the inside of the charged particle detector.Type: GrantFiled: June 15, 1994Date of Patent: September 5, 1995Assignee: Hitachi, Ltd.Inventors: Yuuichi Hamamura, Satoshi Haraichi, Akira Shimase, Junzou Azuma, Fumikazu Itoh, Toshio Yamada, Yasuhiro Koizumi, Michinobu Mizumura
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Patent number: 5389810Abstract: A semiconductor device having at least one symmetrical pair of MOSFETs is provided. The device includes a semiconductor layer having an upper surface, an active region formed in the upper surface, an isolation region formed in the upper surface and enclosing the active region, and a pair of MOSFETs formed in the active region, wherein the pair of MOSFETs are symmetrical with respect to a first symmetric plane substantially vertical to the upper surface and also with respect to a second symmetric plane vertical both to the upper surface and to the first symmetric plane, each of the pair of MOSFETs includes a source region, a drain region, and a channel region formed in an upper surface of the active region, the source region is shared by the pair of MOSFETs, and the drain region is spatially isolated from the source region by the channel region.Type: GrantFiled: March 23, 1993Date of Patent: February 14, 1995Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Masashi Agata, Hiroyuki Yamauchi, Toshio Yamada
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Patent number: 5381856Abstract: According to the present invention, in the PFC (planar flow casting) method, He gas at room temperature is blown onto the surface of a cooling roll at a flow rate of 0.1 to 5 liters/min.multidot.cm.sup.2 through a He gas blow nozzle provided upstream of a molten alloy (a puddle) ejected through a molten alloy ejection nozzle onto the surface of the cooling roll at a distance from the ejection nozzle, the distance from the surface of the cooling roll and an angle of inclination of the nozzle within respectively specified ranges, thereby forming a He gas atmosphere around the puddle, and a thin strip is dragged out of said puddle. This enables a thin amorphous alloy strip having a very small thickness and a smooth surface free from significant uneven portions and pores to be easily produced at a low cost without use of any vessel for regulating the atmosphere or an apparatus for heating the blown gas.Type: GrantFiled: October 6, 1993Date of Patent: January 17, 1995Assignee: Nippon Steel CorporationInventors: Masahiro Fujikura, Takashi Sato, Toshio Yamada, Fumio Hasebe, Hiromi Chida
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Patent number: 5375095Abstract: A dynamic random access memory is formed with two power supply meshes extending throughout a memory array region in which are formed memory cells and sense amplifier circuits, thereby enabling sense amplifier drive circuits to be distributed throughout that memory array region, with each sense amplifier drive circuit being connected to the nearest points on the two supply meshes. A substantially improved value of read access time, or increased total memory capacity, can thereby be achieved by comparison with a DRAM in which the sense amplifier drive circuits are provided only at the periphery of a memory array region.Type: GrantFiled: June 12, 1991Date of Patent: December 20, 1994Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Toshio Yamada, Michihiro Inoue, Junko Hasegawa
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Patent number: 5342480Abstract: An isolation and flattening technique for a semiconductor substrate having active devices, such as a bipolar transistor, and a MISFET, formed thereon, is disclosed.Type: GrantFiled: June 1, 1993Date of Patent: August 30, 1994Assignees: Hitachi, Ltd., Hitachi VLSI Engineering Corp.Inventors: Hirotaka Nishizawa, Seiichiro Azuma, Takayuki Yoshitake, Kazuo Tanaka, Mikinori Kawaji, Sinmei Hirano, Toshio Yamada, Yasusi Sekine
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Patent number: 5342448Abstract: A method of processing a sample using a charged beam and reactive gases and a system employing the same, the method and system being able to perform the reactive etching and the beam assisted deposition using a charged particle detector free from the degradation of the performance due to the reactive gas. The system is designed in such a way that a shutter mechanism is provided in the form of the charged particle detector, and a chamber for accommodating the charged particle detector can be evacuated. In the observation of the sample, the charged particle detector is turned on to open the shutter mechanism, and in the processing of the sample, the charged particle detector is turned off or left as it is to shut the shutter mechanism to evacuate the inside of the charged particle detector.Type: GrantFiled: March 31, 1993Date of Patent: August 30, 1994Assignee: Hitachi, Ltd.Inventors: Yuuichi Hamamura, Satoshi Haraichi, Akira Shimase, Junzou Azuma, Fumikazu Itoh, Toshio Yamada, Yasuhiro Koizumi, Michinobu Mizumura
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Patent number: 5341035Abstract: In a substrate potential generator, a substrate potential is supplied by a substrate potential supplier controlled by a substrate potential detector. The substrate potential detector sends a setting signal having a hysteresis characteristic relative to the substrate potential. That is, the setting signal is higher when the substrate potential supplier is stopped than when the substrate potential supplier is activated or when negative charges are injected into the substrate potential. Thus, the operation of the substrate potential supplier is stopped after the substrate potential becomes lower than the lower setting potential when the substrate potential supplier is activated, while the operation of the substrate potential supplier is started after the substrate potential becomes higher than the upper setting potential after the operation of the substrate potential supplier is stopped.Type: GrantFiled: June 4, 1991Date of Patent: August 23, 1994Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Akinori Shibayama, Toshio Yamada
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Patent number: 5301742Abstract: An iron base amorphous alloy strip having a sheet thickness of from 50 to 150 .mu.m and a sheet width of at least 20 mm. The strip is produced by a single-roll cooling process and has a fracture strain of 0.01 or more.Type: GrantFiled: June 25, 1993Date of Patent: April 12, 1994Assignee: Nippon Steel CorporationInventors: Takashi Sato, Tsutomu Ozawa, Toshio Yamada
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Patent number: 5300814Abstract: A semiconductor device comprising a semiconductor substrate, a plurality of memory cell regions each having a plurality of memory cells disposed on the semiconductor substrate, a word line formed in a first level above the semiconductor substrate, a bit line formed in a second level above the first level, and a backing line having a lower resistance than the word line and formed in a third level above the second level. A dummy bit line is formed in the second level outside the memory cell region so as to reduce the step formed at the periphery of the memory cell region. The dummy bit line is also used to interconnect the word line and the backing line so that an electrical connection therebetween is stabilized.Type: GrantFiled: July 17, 1992Date of Patent: April 5, 1994Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Susumu Matsumoto, Shin Hashimoto, Toshio Yamada, Yoshiro Nakata