Patents by Inventor Toshio Yamada
Toshio Yamada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6390284Abstract: A hanging-down jig is provided for supporting a vehicle body frame for a motorcycle in a hung-down manner on a hanger of an overhead conveyor. A dummy frame is mounted on the vehicle body frame for the motorcycle for supporting the vehicle body frame in a hang-down manner on a support arm of the hanger of the overhead conveyor. The dummy frame includes a center member coupled to the vehicle body frame by a pin, and a pair of left and right side members coupled to the vehicle body frame by a pin. The angle of, the longitudinal positions of and the lateral distance between the side members with respect to the center member can be adjusted as desired. The longitudinal and vertical positions of a support portion provided on the support arm of the hanger and engaged with a hanging-down member of the dummy frame can be adjusted as desired.Type: GrantFiled: May 18, 2000Date of Patent: May 21, 2002Assignee: Honda Giken Kogyo Kabushiki KaishaInventors: Toshio Yamada, Toshihiro Tsuchiya, Norihisa Ohgi
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Patent number: 6392953Abstract: A plurality of information memory cells and a single reference memory cell are coupled to a single word line. The reference memory cell stores reference information equivalent to a reference potential to information readout. Pieces of information, stored in the information memory cells, are fed, over respective bit lines, to first input terminals of sense amplifiers. The reference information, stored in the reference memory cell, is fed, over a bit line, to second input terminals of the sense amplifiers. When the potential of signal charges stored in the information memory cells falls due to leakage current, the potential of a signal charge stored in the reference memory cell correspondingly falls due to leakage current. This prolongs a length of time taken for a difference between these potentials to reach a sense limit, thereby achieving a longer data retention time.Type: GrantFiled: June 8, 2001Date of Patent: May 21, 2002Assignee: Matsushita Electronics CorporationInventors: Toshio Yamada, Akinori Shibayama
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Patent number: 6375695Abstract: Filter has a filter main body, a container, a first counter room, and a second counter room. A counter air is introduced into the first counter room through the counter air discharge valve, and fine particles trapped in the filter main body are removed and transported to the second counter room. Then, the removed fine particles are further transported to a process portion isolated from an exhaust gas passage, and the fine particles are fired in the process portion. Since the process portion is isolated from the exhaust gas passage, the fine particles in the process portion are not returned to the filter main body. Moreover, since the fine particles are transported by the counter air only to the second counter room, it is possible to reduce an amount of the counter air.Type: GrantFiled: March 10, 1995Date of Patent: April 23, 2002Assignee: NGK Insulators, Ltd.Inventors: Minoru Machida, Toshio Yamada, Takeshi Naito, Yukihito Ichikawa
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Patent number: 6338826Abstract: A gas duct having a honeycomb structure includes: a metal case, a honeycomb structure accommodated in the metal case, a holding member placed between the outer surface of the honeycomb structure and the inner surface of the metal case, and a cone fitted to the inner surface of the metal case at one or both openings of the metal case, wherein the circumference of one or both end faces of the honeycomb structure is allowed to abut on the cone. The gas duct having a honeycomb structure can effectively utilize the whole volume of the honeycomb structure, is low in pressure loss, and inexpensive.Type: GrantFiled: June 21, 1999Date of Patent: January 15, 2002Assignee: NGK Insulators, Ltd.Inventors: Toshio Yamada, Toshihiko Hijikata, Yukiharu Morita
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Publication number: 20010051117Abstract: A gas duct having a honeycomb structure includes: a metal case, a honeycomb structure accommodated in the metal case, a holding member placed between the outer surface of the honeycomb structure and the inner surface of the metal case, and a cone fitted to the inner surface of the metal case at one or both openings of the metal case, wherein the circumference of one or both end faces of the honeycomb structure is allowed to abut on the cone. The gas duct having a honeycomb structure can effectively utilize the whole volume of the honeycomb structure, is low in pressure loss, and is low also in cost.Type: ApplicationFiled: June 21, 1999Publication date: December 13, 2001Applicant: NGK INSULATORS, LTDInventors: TOSHIO YAMADA, TOSHIHKO HIJIKATA, YUKIHARU MORITA
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Patent number: 6323663Abstract: A retainer board, holding a semiconductor wafer having a plurality of integrated circuit terminals for testing a semiconductor chip, is provided in confronting relation to a probe sheet having a plurality of probe terminals electrically connected to their corresponding integrated circuit terminals. An insulating substrate, having wiring electrically connected to the plural probe terminals, is provided on the probe sheet in opposed relation to the retainer board. An elastic member is interposed between the probe sheet and the insulating substrate. The retainer board and the probe sheet are brought into so closer relationship that each integrated circuit terminal of the semiconductor wafer held by the retainer board is electrically connected to its corresponding probe terminal of the probe sheet.Type: GrantFiled: September 16, 1999Date of Patent: November 27, 2001Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yoshirou Nakata, Toshio Yamada, Atsushi Fujiwara, Isao Miyanaga, Shin Hashimoto, Yukiharu Uraoka, Yasushi Okuda, Kenzou Hatada
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Publication number: 20010037729Abstract: Filter has a filter main body, a container, a first counter room, and a second counter room. A counter air is introduced into the first counter room through the counter air discharge valve, and fine particles trapped in the filter main body are removed and transported to the second counter room. Then, the removed fine particles are further transported to a process portion isolated from an exhaust gas passage, and the fine particles are fired in the process portion. Since the process portion is isolated from the exhaust gas passage, the fine particles in the process portion is not returned to the filter main body. Moreover, since the fine particles are transported by the counter air only to the second counter room, it is possible to reduce an amount of the counter air.Type: ApplicationFiled: March 10, 1995Publication date: November 8, 2001Applicant: NGK INSULATORS, LTD.Inventors: MINORU MACHIDA, TOSHIO YAMADA, TAKESHI NAITO, YUKIHITO ICHIKAWA
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Publication number: 20010036427Abstract: A cell structure mounting container comprises a cell structure stored within a metal container. The cell structure is held within the metal container by providing a compressed resilience material having cushioning characteristics between the cell structure and the metal container in a compressed state. The compressed resilience material is a heat-resistant and low-expansion material containing ceramic fibers or ceramic fibers and heat-resistant metal fibers. Accordingly, compression characteristics which do not greatly fluctuate within the usage temperature range are obtained, the compression force acting on the periphery portion of the cell structure does not change greatly, and further, the compression force acts essentially uniformly on the periphery portion of the cell structure.Type: ApplicationFiled: March 6, 2001Publication date: November 1, 2001Applicant: NGK INSULATORS, LTD.Inventors: Toshio Yamada, Toshihiko Hijikata, Yukihito Ichikawa
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Publication number: 20010028588Abstract: A plurality of information memory cells and a single reference memory cell are coupled to a single word line. The reference memory cell stores reference information equivalent to a reference potential to information readout. Pieces of information, stored in the information memory cells, are fed, over respective bit lines, to first input terminals of sense amplifiers. The reference information, stored in the reference memory cell, is fed, over a bit line, to second input terminals of the sense amplifiers. When the potential of signal charges stored in the information memory cells falls due to leakage current, the potential of a signal charge stored in the reference memory cell correspondingly falls due to leakage current. This prolongs a length of time taken for a difference between these potentials to reach a sense limit, thereby achieving a longer data retention time.Type: ApplicationFiled: June 8, 2001Publication date: October 11, 2001Applicant: MATSUSHITA ELECTRONICS CORPORATIONInventors: Toshio Yamada, Akinori Shibayama
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Patent number: 6285723Abstract: A timing signal generation circuit according to the present invention includes: a delay circuit for transmitting an input clock signal while delaying the clock signal, the delay circuit having a plurality of intermediate taps capable of outputting the clock signal at their corresponding positions in the delay circuit; a detection delay circuit for transmitting the clock signal while delaying the clock signal, the detection delay circuit having a plurality of intermediate taps capable of outputting the clock signal at their corresponding positions in the detection delay circuit; a plurality of sample/hold circuits each having a sampling signal terminal, the sampling signal terminals being connected to corresponding ones of the plurality of intermediate taps of the detection delay circuit; a plurality of boundary delay circuits for detecting an edge of the clock signal, the boundary detection circuits being connected to respective output terminals of the sample/hold circuits; and an output selection circuit forType: GrantFiled: February 25, 2000Date of Patent: September 4, 2001Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Toshio Yamada, Masashi Agata
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Publication number: 20010017074Abstract: A working apparatus for band blade provided with a bender for bending a band blade into a predetermined configuration, and a cutter cutting the band blade. The cutter is positioned successively after the bender. And, a working method for band blade having a bending process in which a band blade is bent into a predetermined configuration, and a cutting process in which the band blade is cut. The cutting process is successively conducted after the bending process is previously conducted.Type: ApplicationFiled: February 26, 2001Publication date: August 30, 2001Applicant: Suntex Co., Ltd.,Inventor: Toshio Yamada
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Patent number: 6275434Abstract: A plurality of information memory cells and a single reference memory cell are coupled to a single word line. The reference memory cell stores reference information equivalent to a reference potential to information readout. Pieces of information, stored in the information memory cells, are fed, over respective bit lines, to first input terminals of sense amplifiers. The reference information, stored in the reference memory cell, is fed, over a bit line, to second input terminals of the sense amplifiers. When the potential of signal charges stored in the information memory cells falls due to leakage current, the potential of a signal charge stored in the reference memory cell correspondingly falls due to leakage current. This prolongs a length of time taken for a difference between these potentials to reach a sense limit, thereby achieving a longer data retention time.Type: GrantFiled: March 10, 2000Date of Patent: August 14, 2001Assignee: Matsushita Electronics CorporationInventors: Toshio Yamada, Akinori Shibayama
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Publication number: 20010010057Abstract: A memory having a data processing function is connected with a memory network such as a memory bus. A memory controller writes data to be processed in a predetermined area in the memory having the data processing function. The memory having the data processing function processes the written data and stores resultant processed data. Thereafter, the memory controller reads the stored resultant processed data. Accordingly, work data (intermediate data obtained during the processing) is not transferred to the memory controller through the memory bus but is processed within the memory having the data processing function. As a result, the data processing ability can be improved. In the memory having the data processing function, a processing specification for the processing to be executed is written immediately before executing the processing. Accordingly, no work data is transferred through the memory bus between a CPU and the memory serving as a work area for the processing.Type: ApplicationFiled: February 9, 2001Publication date: July 26, 2001Applicant: Matsushita Electronics CorporationInventor: Toshio Yamada
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Patent number: 6242429Abstract: Antiviral Ara-A derivatives having resistance to metabolism by adenosinedeaminase (ADA) are 2-substituted arabinosyladenine derivatives represented by the formula (I) and pharmaceutically acceptable salts and hydrates thereof: wherein Z is alkyl having at least 4 carbon atoms, alkenyl or alkynyl and R is hydrogen or lower alkyl. The compounds are useful as therapeutic or preventive agents for diseases infected by DNA virus such as herpes simplex virus (HSV), herpes zoster virus, cytomegalovirus (CMV), adenovirus, hepatitis virus or vaccinia virus. As compared with Ara-A, they not only show good activity in blood with an excellent sustaining property but also are capable of being orally administered without substantial loss of pharmaceutical effectiveness due to metabolism by ADA.Type: GrantFiled: June 24, 1999Date of Patent: June 5, 2001Assignee: Nippon Zoki Pharmaceutical Co., Ltd.Inventors: Toshio Yamada, Koichi Yamanishi
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Patent number: 6242071Abstract: To provide a durable catalytic converter or heat exchanger to be used in an exhaust gas cleaning-up system for an internal combustion engine or the like. A durable catalytic converter, heat exchanger or the like is provided by use of a supporting member provided with a low-friction layer to smoothly assemble a ceramic honeycomb structure in a metallic can.Type: GrantFiled: March 17, 1999Date of Patent: June 5, 2001Assignee: NGK Insulators, Ltd.Inventors: Toshio Yamada, Toshihiko Hijikata, Mikio Tanaka
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Patent number: 6181620Abstract: The semiconductor storage device of this invention includes memory cells each having two transistors and one storage capacitor. Each memory cell is connected with a first word line and a first bit line for a first port and a second word line and a second bit line for a second port. The first and second bit lines are alternately disposed in an open bit line configuration. In the operation of the semiconductor storage device, in a period when a first precharge signal for precharging each first bit line or a first sense amplifier activating signal for activating a first sense amplifier is kept in an active state, a second precharge signal for precharging each second bit line and a second sense amplifier activating signal for activating a second sense amplifier are both placed in an inactive state.Type: GrantFiled: January 18, 2000Date of Patent: January 30, 2001Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Masashi Agata, Kazunari Takahashi, Tsutomu Fujita, Naoki Kuroda, Toshio Yamada
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Patent number: 6118319Abstract: A timing signal generation circuit according to the present invention includes: a delay circuit for transmitting an input clock signal while delaying the clock signal, the delay circuit having a plurality of intermediate taps capable of outputting the clock signal at their corresponding positions in the delay circuit; a detection delay circuit for transmitting the clock signal while delaying the clock signal, the detection delay circuit having a plurality of intermediate taps capable of outputting the clock signal at their corresponding positions in the detection delay circuit; a plurality of sample/hold circuits each having a sampling signal terminal, the sampling signal terminals being connected to corresponding ones of the plurality of intermediate taps of the detection delay circuit; a plurality of boundary delay circuits for detecting an edge of the clock signal, the boundary detection circuits being connected to respective output terminals of the sample/hold circuits; and an output selection circuit forType: GrantFiled: February 2, 1998Date of Patent: September 12, 2000Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Toshio Yamada, Masashi Agata
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Patent number: 6091655Abstract: A plurality of information memory cells and a single reference memory cell are coupled to a single word line. The reference memory cell stores reference information equivalent to a reference potential to information readout. Pieces of information, stored in the information memory cells, are fed, over respective bit lines, to first input terminals of sense amplifiers. The reference information, stored in the reference memory cell, is fed, over a bit line, to second input terminals of the sense amplifiers. When the potential of signal charges stored in the information memory cells falls due to leakage current, the potential of a signal charge stored in the reference memory cell correspondingly falls due to leakage current. This prolongs a length of time taken for a difference between these potentials to reach a sense limit, thereby achieving a longer data retention time.Type: GrantFiled: November 18, 1997Date of Patent: July 18, 2000Assignee: Matsushita Electronics CorporationInventors: Toshio Yamada, Akinori Shibayama
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Patent number: 6005436Abstract: A reference voltage generator is composed of a first constant-voltage generator consisting of three p-type MOS transistors for generating a first reference voltage Vref for use in the normal operation, which is independent of an external power-supply voltage VCC and of a second constant-voltage generator consisting of two p-type MOS transistors and one n-type MOS transistor for generating a second reference voltage Vrefbi for use in a burn-in acceleration test, which is dependent on VCC. The output of each of the constant-voltage generators is feedbacked to the other constant-voltage generator as its input. Two differential amplifiers and two output drivers output, as an internal reduced voltage Vint, the higher one of Vref and Vrefbi which are outputted from the reference voltage generator.Type: GrantFiled: May 16, 1997Date of Patent: December 21, 1999Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Akinori Shibayama, Toshio Yamada
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Patent number: RE37077Abstract: The present invention relates to novel adenosine derivatives having the formula (I): wherein R is a lower alkyl group; R′ is hydrogen or a lower alkyl group; X is a cycloalkyl group, an alkyl group having at least one hydroxy group, an alkyl group having at least one phenyl group, a bicycloalkyl group, a naphthylalkyl group, an acenaphthylenylalkyl group or a group of the formula (II) or (III); Z is hydrogen, a hydroxy group or a lower alkoxy group, Q is hydrogen or a hydroxy group, A is —CH2—, —O—, —S— or shows a direct connection; Y is —(CH2)n— or shows a direct connection; n is an integer of 1 to 3; and the broken line is a double bond or a single bond. and pharmaceutically acceptable salt thereof, which are useful as antihypertensive agents.Type: GrantFiled: December 28, 1992Date of Patent: February 27, 2001Assignee: Nippon Zoki Pharmaceutical Co., Ltd.Inventors: Toshio Yamada, Ken-ichi Kageyama