Patents by Inventor Wei-An HSIEH

Wei-An HSIEH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240372062
    Abstract: A preparation method of a composite cathode material is disclosed and includes steps of: (a) providing a nickel-manganese compound material, wherein the nickel-manganese compound material is NixMny(OH)2 or NixMnyO, x+y=1; (b) providing a solid electrolyte material, and mixing the nickel-manganese compound material and the solid electrolyte material in a mechanical mixing into a composite material, wherein the solid electrolyte material has a weight percentage relative to the nickel-manganese compound material, and the weight percentage is ranged from 0.2 wt. % to 1.0 wt. %; and (c) providing a lithium source, mixing the lithium source and the composite material, and sintering to form the composite cathode material, wherein the composite cathode material includes a core and a coating layer, the core is made of LiNi2xMn2yO4 and coated by the coating layer, and the coating layer is made of the solid electrolyte material.
    Type: Application
    Filed: June 15, 2023
    Publication date: November 7, 2024
    Inventors: Ding-De He, Han-Wei Hsieh
  • Patent number: 12132248
    Abstract: An electronic device is provided. The electronic device includes an antenna array including a plurality of antenna patterns collectively configured to provide a scan-angle coverage. Each of the antenna patterns includes a curved surface.
    Type: Grant
    Filed: August 24, 2022
    Date of Patent: October 29, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Cheng-Yu Ho, Meng-Wei Hsieh, Chih-Pin Hung
  • Patent number: 12125900
    Abstract: A semiconductor device includes a gate structure on a substrate, a single diffusion break (SDB) structure adjacent to the gate structure, a first spacer adjacent to the gate structure, a second spacer adjacent to the SDB structure, a source/drain region between the first spacer and the second spacer, an interlayer dielectric (ILD) layer around the gate structure and the SDB structure, and a contact plug in the ILD layer and on the source/drain region. Preferably, a top surface of the second spacer is lower than a top surface of the first spacer.
    Type: Grant
    Filed: November 9, 2022
    Date of Patent: October 22, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Hao Lin, Hsin-Yu Chen, Shou-Wei Hsieh
  • Patent number: 12100750
    Abstract: A semiconductor device includes a gate isolation structure on a shallow trench isolation (STI), a first epitaxial layer on one side of the gate isolation structure, a second epitaxial layer on another side of the gate isolation structure, first fin-shaped structures directly under the first epitaxial layer, and second fin-shaped structures directly under the second epitaxial layer, in which the STI surrounds the first fin-shaped structures and the second fin-shaped structures.
    Type: Grant
    Filed: January 5, 2023
    Date of Patent: September 24, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Hao Lin, Hsin-Yu Chen, Shou-Wei Hsieh
  • Patent number: 12100756
    Abstract: A high electron mobility transistor (HEMT) device including a substrate, a channel layer, a barrier layer, a p-type gallium nitride (GaN) spacer, a gate electrode, a source electrode, and a drain electrode is provided. The channel layer is disposed on the substrate. The barrier layer is disposed on the channel layer and has a protruding portion. The P-type GaN spacer is disposed on a side wall of the protruding portion. The gate electrode is disposed on the protruding portion and the P-type GaN spacer. The source electrode and the drain electrode are disposed on two sides of the gate electrode.
    Type: Grant
    Filed: November 16, 2021
    Date of Patent: September 24, 2024
    Assignee: United Microelectronics Corp.
    Inventors: Hao-Ming Lee, Ta Kang Lo, Tsai-Fu Chen, Shou-Wei Hsieh
  • Publication number: 20240295673
    Abstract: An anti-glare layer and a display device are provided. The anti-glare layer includes a bottom surface and a microstructure surface opposite to each other. The microstructure surface has a plurality of microstructures disposed thereon. In the normal direction perpendicular to the bottom surface, a virtual reference plane parallel to the bottom surface passes through the points of the microstructures closest to the bottom surface, and k virtual sectional planes are sequentially defined along the normal direction from the virtual reference plane on the side opposite to the bottom surface. The virtual sectional planes are spaced apart from each other by a gap D.
    Type: Application
    Filed: October 13, 2023
    Publication date: September 5, 2024
    Inventors: SHANG-WEI HSIEH, YA-CHEN KAO, KEN-YU LIU
  • Publication number: 20240292517
    Abstract: A carrier board includes a substrate having a first substrate surface, a second substrate surface, and a substrate hole that penetrates the first substrate surface and the second substrate surface; a magnet sheath disposed in the substrate hole to cover a hole boundary of the substrate hole, and including a first magnetic surface, a second magnetic surface, and an inner periphery that interconnects the first magnetic surface and the second magnetic surface; a first dielectric isolation layer and a second dielectric isolation layer respectively having outer surfaces facing away from the substrate; and a conductive metal layer covering the inner periphery of the magnet sheath and extending to overlie the outer surfaces of the first dielectric isolation layer and the second dielectric isolation layer.
    Type: Application
    Filed: October 4, 2023
    Publication date: August 29, 2024
    Inventors: Jer-Wei HSIEH, Hung-Lin YIN
  • Publication number: 20240274791
    Abstract: A high-voltage composite positive electrode material and manufacturing method thereof are disclosed. The high-voltage composite positive electrode material includes lithium nickel manganese oxide (LNMO) powders and lithium vanadium fluorophosphate (LVPF) powders. The LNMO powders have a first average particle diameter. A molar ratio of the LVPF powders to the LNMO powders is equal to or less than 0.5. The LVPF powders have a second average particle diameter. The second average particle diameter is less than one-tenth of the first average particle diameter, and the LVPF powders and the LNMO powders are mixed by a mechanically mixing method, so that the LVPF powders are coated on the surfaces of the LNMO powders to form the high-voltage composite positive electrode material.
    Type: Application
    Filed: May 25, 2023
    Publication date: August 15, 2024
    Inventors: Ding-De He, Han-Wei Hsieh
  • Publication number: 20240215151
    Abstract: The present disclosure provides an electronic device and a method of manufacturing the same. The electronic device includes a first redistribution structure and a first encapsulant. The first encapsulant supports the first redistribution structure and is configured to function as a first reinforcement to provide a second redistribution structure. The redistribution structure has a plurality of conductive layers disposed over the first redistribution structure.
    Type: Application
    Filed: December 21, 2022
    Publication date: June 27, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hsu-Chiang SHIH, Cheng-Yuan KUNG, Hung-Yi LIN, Meng-Wei HSIEH, Chien-Mei HUANG, I-Ting LIN, Sheng-Wen YANG
  • Publication number: 20240162220
    Abstract: A capacitor on a fin structure includes a fin structure. A dielectric layer covers the fin structure. A first electrode extension is embedded within the fin structure. A first electrode penetrates the dielectric layer and contacts the first electrode extension. A second electrode and a capacitor dielectric layer are disposed within the dielectric layer. The capacitor dielectric layer surrounds the second electrode, and the capacitor dielectric layer is between the second electrode and the first electrode extension.
    Type: Application
    Filed: December 8, 2022
    Publication date: May 16, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Hsin-Yu Chen, Chun-Hao Lin, Yuan-Ting Chuang, Shou-Wei Hsieh
  • Publication number: 20240101425
    Abstract: A preparation method of a lithium iron phosphate cathode material includes steps of (a) providing a phosphoric acid, an iron powder, a carbon source, wherein the phosphoric acid and the iron powder are reacted to produce a first product, and the first product is amorphous iron phosphate with chemical formula of a-FePO4·xH2O (x>0); (b) providing a lithium salt mixture, wherein the lithium salt mixture includes a lithium hydroxide and a lithium carbonate; (c) grinding and mixing the first product, the carbon source, and the lithium salt mixture; (d) calcining the first product and the lithium salt mixture to produce a precursor, wherein the precursor has a formula of Fe3(PO4)2·8H2O+Li3PO4; and (e) calcining the precursor and the carbon source to obtain the lithium iron phosphate cathode material.
    Type: Application
    Filed: May 11, 2023
    Publication date: March 28, 2024
    Inventors: Han-Wei Hsieh, Yuan-Kai Lin
  • Publication number: 20240105720
    Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first fin-shaped structure on the first region and a second fin-shaped structure on the second region; forming a patterned mask on the second region; and performing a process to enlarge the first fin-shaped structure so that the top surfaces of the first fin-shaped structure and the second fin-shaped structure are different.
    Type: Application
    Filed: December 1, 2023
    Publication date: March 28, 2024
    Applicant: United Microelectronics Corp.
    Inventors: Chun-Hao Lin, Hsin-Yu Chen, Shou-Wei Hsieh
  • Publication number: 20240106114
    Abstract: A radio device includes a first antenna array and an actuator. The first antenna array is configured to transmit a radiation beam to a remote device. The actuator is configured to change an orientation of the first antenna array, whereby a beam direction of the radiation beam is changed according to a change of the orientation of the first antenna array. The beam direction of the radiation beam is adjusted according to a beam steering mechanism performed by the first antenna array.
    Type: Application
    Filed: September 26, 2022
    Publication date: March 28, 2024
    Inventors: Shih-Wei HSIEH, Wei-Hsuan CHANG, Chih-Wei LEE, Shyh-Tirng FANG
  • Patent number: 11935841
    Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a device package and a shielding layer. The device package includes an electronic device unit and has a first surface, a second surface opposite to the first surface, and a third surface connecting the first surface to the second surface. The shielding layer is disposed on the first surface and the second surface of the device package. A common edge of the second surface and the third surface includes a first portion exposed from the shielding layer by a first length, and a common edge of the first surface and the third surface includes a second portion exposed from the shielding layer by a second length that is different from the first length.
    Type: Grant
    Filed: November 18, 2022
    Date of Patent: March 19, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Cheng-Yuan Kung, Hung-Yi Lin, Meng-Wei Hsieh, Yu-Pin Tsai
  • Publication number: 20240088466
    Abstract: A recycling and reworking method of a lithium iron phosphate cathode material is disclosed and includes steps of: (a) providing a lithium iron phosphate recycled material; (b) oxidizing the lithium iron phosphate recycled material in an atmosphere at an oxidation temperature ranged from 300° C. to 400° C. for 1 hour to 5 hours to form a raw material powder composed of LiFePO4, Fe7(PO4)6, Fe2O3 and a residual carbon ranged from 0.07 wt. % to 0.6 wt. %; (c) grinding the raw material powder; (d) adjusting the composition of the raw material powder to form a precursor, which has the molar ratio of Li:P=0.99˜1.05:1, and the molar ratio of Fe:P=0.98˜1.02:1, wherein a carbon source is added; and (e) heat-treating the precursor in an inert gas at a sintering temperature ranged from 500° C. to 800° C. for 8 hours to 12 hours to form a lithium iron phosphate regenerated material.
    Type: Application
    Filed: May 9, 2023
    Publication date: March 14, 2024
    Inventors: Han-Wei Hsieh, Yi-Ting Li
  • Publication number: 20240079561
    Abstract: A cathode material and a preparation thereof are disclosed. The cathode material includes a core and a coating layer coated on the core. The core is formed by a ternary material having a composition of Li[NixCoyMnz]O2, wherein x+y+z=1, 0.8<x<1, 0<y<0.2, and 0<z<0.2. The coating layer is formed by an iron-phosphate compound material and includes a plurality of first particles aggregated. With high nickel content in the core, the cathode material with high energy density and low cost is realized. Since the iron-phosphate compound material has high-rate capability, the coating layer formed thereby further improves the rate capability of the cathode material.
    Type: Application
    Filed: May 3, 2023
    Publication date: March 7, 2024
    Inventor: Han-Wei Hsieh
  • Patent number: 11923825
    Abstract: A semiconductor device and a method of manufacturing a semiconductor device are provided. The semiconductor device includes a carrier, an element, and a first electronic component. The element is disposed on the carrier. The first electronic component is disposed above the element. The element is configured to adjust a first bandwidth of a first signal transmitted from the first electronic component.
    Type: Grant
    Filed: July 22, 2021
    Date of Patent: March 5, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Cheng-Yuan Kung, Meng-Wei Hsieh
  • Publication number: 20240072413
    Abstract: An electronic device is provided. The electronic device includes an antenna array including a plurality of antenna patterns collectively configured to provide a scan-angle coverage. Each of the antenna patterns includes a curved surface.
    Type: Application
    Filed: August 24, 2022
    Publication date: February 29, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Yu HO, Meng-Wei HSIEH, Chih-Pin HUNG
  • Publication number: 20240063370
    Abstract: A dual-cation metal battery and a charging and discharging method thereof are disclosed to reduce the cost of materials, maintain the long-term service life and provide multiple varied applications. The dual-cation metal battery includes a positive electrode, a negative electrode, an electrolyte solution and a separator. The positive electrode includes a positive-electrode material selected from the group consisting of heterosite (FePO4), lithium iron phosphate (LiFePO4) and LixNa1-xFePO4, and 0<x<1. The negative electrode includes a metal mixture consisting of lithium metal and sodium metal, and the weight ratio of lithium metal to sodium metal is 1:3. The electrolyte solution is disposed between the positive electrode and the negative electrode. The separator is disposed in the electrolyte solution, and the positive electrode and the negative electrode are separated from each other by the separator.
    Type: Application
    Filed: May 2, 2023
    Publication date: February 22, 2024
    Inventors: Han-Wei Hsieh, Yi-Ting Li, An-Feng Huang
  • Publication number: 20240056201
    Abstract: A method for evaluating radio performance of a device under test (DUT) comprises the following steps. A first set of points, a second set of points and a third set of points are defined to locate on a sphere surrounding the DUT. A signal power of the DUT is evaluated at the first set of points to identify a first region related to the first set of points. Candidates of the second set of points are selected based on the first region. The signal power of the DUT is evaluated at the candidates of the second set of points to identify a second region related to the second set of points. Candidates of the third set of points are selected based on the second region. The signal power of the DUT is evaluated at the candidates of the third set of points to identify a beam peak.
    Type: Application
    Filed: August 9, 2022
    Publication date: February 15, 2024
    Inventors: Shih-Wei HSIEH, Che-Chuan HU, Chih-Wei LEE, Ting-Wei KANG, Shyh-Tirng FANG