Patents by Inventor Wei-An HSIEH

Wei-An HSIEH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11876095
    Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first fin-shaped structure on the first region and a second fin-shaped structure on the second region; forming a patterned mask on the second region; and performing a process to enlarge the first fin-shaped structure so that the top surfaces of the first fin-shaped structure and the second fin-shaped structure are different.
    Type: Grant
    Filed: July 5, 2021
    Date of Patent: January 16, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Hao Lin, Hsin-Yu Chen, Shou-Wei Hsieh
  • Publication number: 20230401420
    Abstract: A system receives a neural network model that includes asymmetric operations. Each asymmetric operation includes one or more fixed-point operands that are asymmetrically-quantized from corresponding floating-point operands. The system compiles a given asymmetric operation of the neural network model into a symmetric operation that includes a combined bias value. A compiler computes the combined bias value is a constant by merging at least zero points of input and output of the given asymmetric operation. The system then generates a symmetric neural network model including the symmetric operation for inference hardware to execute in fixed-point arithmetic.
    Type: Application
    Filed: June 12, 2022
    Publication date: December 14, 2023
    Inventors: Chih-Wen Goo, Pei-Kuei Tsung, Chih-Wei Chen, Mingen Shih, Shu-Hsin Chang, Po-Hua Huang, Ping-Yuan Tsai, Shih-Wei Hsieh, You Yu Nian
  • Patent number: 11837713
    Abstract: A preparation method of a cathode material for a secondary battery is provided. First, a lithium metal phosphate material and a first conductive carbon are provided. The lithium metal phosphate material is made of a plurality of secondary particles. Each of the secondary particles is formed by the aggregation of a plurality of primary particles. An interparticle space is formed between the plurality of primary particles. Next, the lithium metal phosphate material and the first conductive carbon are mixed by a mechanical method, and a composite material is prepared. The first conductive carbon is uniformly arranged in the interparticle space. After that, a second conductive carbon, a binder and a solvent are provided. Finally, the composite material, the second conductive carbon, the binder and the solvent are mixed, and a cathode material for preparing a positive plate is prepared.
    Type: Grant
    Filed: August 26, 2021
    Date of Patent: December 5, 2023
    Assignee: ADVANCED LITHIUM ELECTROCHEMISTRY CO., LTD.
    Inventors: Chen-Yi Huang, Han-Wei Hsieh, Yuan-Kai Lin, Chueh-Han Wang
  • Publication number: 20230369188
    Abstract: A semiconductor package structure is provided. The semiconductor package structure includes a substrate, a first electronic component, and an electronic device. The first electronic component is disposed over the substrate. The electronic device is at least partially embedded in the substrate. The electronic device includes a second electronic component and a reinforcement. The second electronic component is configured for providing a regulated voltage to the first electronic component. The reinforcement supports the second electronic component.
    Type: Application
    Filed: May 13, 2022
    Publication date: November 16, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Meng-Wei HSIEH
  • Patent number: 11811131
    Abstract: The present disclosure provides an antenna module. The antenna module includes an antenna layer, a ground layer, and an electronic component. The ground layer is disposed over the antenna layer. The electronic component is disposed between the antenna layer and the ground layer.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: November 7, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Cheng-Yu Ho, Meng-Wei Hsieh
  • Patent number: 11798858
    Abstract: A semiconductor package structure and a method of manufacturing the same are provided. The semiconductor package structure includes a first electronic component, a second electronic component, and a reinforcement component. The reinforcement component is disposed above the first electronic component and the second electronic component. The reinforcement component is configured to reduce warpage.
    Type: Grant
    Filed: July 15, 2021
    Date of Patent: October 24, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Meng-Wei Hsieh, Hsiu-Chi Liu
  • Patent number: 11797068
    Abstract: A connector controller controls a connector with a power pin, a communication pin, and a ground pin. The connector detects the voltage at the communication pin at least twice to generate first and second voltages respectively. A bus power is supplied at the power pin. The first voltage is detected when a bus current to/from the bus power is about zero. The connector controller controls the bus power in response to a difference between the first and second voltage.
    Type: Grant
    Filed: October 28, 2021
    Date of Patent: October 24, 2023
    Assignee: LEADTREND TECHNOLOGY CORPORATION
    Inventors: Yao-Wei Hsieh, Hung Kuang Liu, Hsien-Te Huang, Ming-Chang Tsou
  • Patent number: 11781905
    Abstract: An optical sensing device includes a substrate, a sensing element layer, a light-shielding layer, and a light absorbing layer. The substrate has a first surface and a second surface opposite to each other. The sensing element layer is disposed on the first surface and includes multiple sensing elements. The light-shielding layer is disposed on the sensing element layer and has multiple openings. An orthogonal projection of the opening on the substrate overlaps an orthogonal projection of the sensing element on the substrate. The light absorbing layer is disposed on the second surface. An electronic apparatus including the optical sensing device is also provided.
    Type: Grant
    Filed: April 1, 2022
    Date of Patent: October 10, 2023
    Assignee: Au Optronics Corporation
    Inventors: Shih-Hua Lu, Shang-Wei Hsieh, Chao-Chien Chiu
  • Patent number: 11776613
    Abstract: A training method for a memory system is provided. The memory system includes a memory controller and a memory. The memory controller is connected with the memory. The training method includes the following steps. Firstly, the memory samples n command/address signals according to a first signal edge and a second signal edge of a clock signal to acquire a first sampled content and a second sampled content. The memory selectively outputting one of the first sampled content and the second sampled content through m data signals to the memory controller in response to a control signal. Moreover, m is larger than n and smaller than 2n.
    Type: Grant
    Filed: April 22, 2021
    Date of Patent: October 3, 2023
    Assignee: MediaTek Inc.
    Inventors: Bo-Wei Hsieh, Ching-Yeh Hsuan, Shang-Pin Chen
  • Publication number: 20230289063
    Abstract: An electronic system is provided. A memory device includes a plurality of bank groups. A controller is coupled to the memory device and includes a request queue. The request queue is configured to store a plurality of requests. When the requests correspond to the different bank groups, the controller is configured to access data of the memory device according to a plurality of long burst commands corresponding to the requests. When the requests correspond to the same bank group, the controller is configured to access the data of the memory device according to a plurality of short burst commands corresponding to the requests. The short burst commands correspond to a short burst length, and the long burst commands correspond to a long burst length. The long burst length is twice the short burst length. The memory device is a low-power double data rate synchronous dynamic random access memory.
    Type: Application
    Filed: February 16, 2023
    Publication date: September 14, 2023
    Inventors: Bo-Wei HSIEH, Chen-Chieh WANG, Szu-Ying CHENG, Jou-Ling CHEN
  • Patent number: 11756896
    Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes an electronic component, a conductive contact, and a first shielding layer. The electronic component has a first surface, a lateral surface angled with the first surface, and a second surface opposite to the first surface. The conductive contact is connected to the first surface of the electronic component. The first shielding layer is disposed on the lateral surface of the electronic component and a portion of the first surface of the electronic component. The first shielding layer contacts the conductive contact.
    Type: Grant
    Filed: December 3, 2020
    Date of Patent: September 12, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Cheng-Yuan Kung, Meng-Wei Hsieh
  • Publication number: 20230268638
    Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes a first antenna pattern disposed at a first elevation and a second antenna pattern disposed at a second elevation different from the first elevation. The first antenna pattern and the second antenna pattern define an air cavity. The semiconductor device package also includes a circuit layer. The air cavity is between the first antenna pattern, the second antenna pattern, and the circuit layer.
    Type: Application
    Filed: February 18, 2022
    Publication date: August 24, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Yu HO, Meng-Wei HSIEH
  • Patent number: 11728170
    Abstract: A semiconductor device includes: a fin structure disposed on a substrate; a gate feature that traverses the fin structure to overlay a central portion of the fin structure; a pair of source/drain features, along the fin structure, that are disposed at respective sides of the gate feature; and a plurality of contact structures that are formed of tungsten, wherein a gate electrode of the gate feature and the pair of source/drain features are each directly coupled to a respective one of the plurality of contact structures.
    Type: Grant
    Filed: July 8, 2021
    Date of Patent: August 15, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hong-Ying Lin, Cheng-Yi Wu, Alan Tu, Chung-Liang Cheng, Li-Hsuan Chu, Ethan Hsiao, Hui-Lin Sung, Sz-Yuan Hung, Sheng-Yung Lo, C. W. Chiu, Chih-Wei Hsieh, Chin-Szu Lee
  • Publication number: 20230233184
    Abstract: A multifunctional probe includes a hand-held housing, a signal detector and an array probe. The signal detector is flexibly disposed on the hand-held housing or at its first end. The array probe is disposed at one end (e.g., second end) of the hand-held housing and electrically coupled to the signal detector. The first contact time of the signal detector in contact with the living body may at least partially overlap with the second contact time of the array probe in contact with the living body. The signal detector and the array probe generate the first electronic signal. The multifunctional probe includes a flexibly-connected signal detector and an array probe, which can contact and/or detect the living body at the same time. Thus, the detection efficiency and accuracy are effectively increased. A detection method applied to the multifunctional probe is also provided.
    Type: Application
    Filed: April 15, 2022
    Publication date: July 27, 2023
    Inventors: Fu Sheng Jiang, Hsiang Wei Hsieh, YI HSIANG CHAN
  • Publication number: 20230215822
    Abstract: An electronic package is provided. The electronic package includes an amplifier component, a control component, and a first circuit layer. The control component is disposed above the amplifier component. The first circuit layer is disposed between the amplifier component and the control component. The control component is configured to transmit a first signal to the amplifier component and to output a second signal amplified by the amplifier component.
    Type: Application
    Filed: December 30, 2021
    Publication date: July 6, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Meng-Wei HSIEH, Hung-Yi LIN, Hsu-Chiang SHIH, Cheng-Yuan KUNG
  • Publication number: 20230207783
    Abstract: A carbon-coated cathode material and a preparation method thereof. The carbon-coated cathode material includes a lithium metal phosphate particle and a carbon coating layer. The carbon coating layer is coated on the lithium metal phosphate particle. The carbon coating layer is formed by a first heat treatment and a second heat treatment. A first carbon source is added in the first heat treatment, and a second carbon source is added in the second heat treatment. The first carbon source has a first weight percentage relative to the lithium metal phosphate particle. The second carbon source has a second weight percentage relative to the lithium metal phosphate particle. The first weight percentage of the first carbon source is equal to or less than the second weight percentage of the second carbon source.
    Type: Application
    Filed: January 18, 2022
    Publication date: June 29, 2023
    Inventors: Han-Wei Hsieh, Yi-Ting Li, Yuan-Kai Lin
  • Publication number: 20230207729
    Abstract: A semiconductor device package includes a carrier, an emitting element and a first package body. The carrier includes a first surface and a second surface opposite to the first surface. The emitting element is disposed on the first surface of the carrier. The first package body is disposed over the first surface of the carrier and spaced apart from the first surface of the carrier.
    Type: Application
    Filed: February 28, 2023
    Publication date: June 29, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Tang-Yuan CHEN, Meng-Wei HSIEH, Cheng-Yuan KUNG
  • Publication number: 20230169796
    Abstract: An image analysis method includes the flowing steps. Firstly, an image stream is received. Then, a to-be-analyzed frame of the image stream is analyzed to obtain a scene type of the to-be-analyzed frame. Then, whether the scene type of the to-be-analyzed frame is a classification of needing posture analysis is determined. Then, a human body posture of a human body image of the to-be-analyzed frame is obtained when the scene type of the to-be-analyzed frame is the classification of needing posture analysis. Then, an event type of the to-be-analyzed frame according to the scene type and the human body posture is determined.
    Type: Application
    Filed: December 27, 2021
    Publication date: June 1, 2023
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Sanket Nagnath YERULE, Wei-Cheng SUN, Chung-Wei HSIEH, Ting-Wei FAN
  • Patent number: 11656980
    Abstract: Disclosed herein is an extensible memory subsystem comprising a dual in-line memory module (DIMM) that includes a dynamic random-access memory (DRAM) having a basic memory space, a DIMM memory controller coupled to the DRAM, a memory interface configured to couple the DIMM to a DIMM connector of a computing device, and a first extension interface configured to couple the DIMM to a first remote memory module having a first remote memory space, wherein the DIMM memory controller is configured to map a DIMM memory space comprising the basic memory space of the DRAM and the first remote memory space of the first remote memory module, the DIMM memory space being accessible by the computing device upon the DIMM being coupled to the computing device via the memory interface, and a first remote memory module coupled to the DIMM via the first extension interface of the DIMM.
    Type: Grant
    Filed: October 9, 2020
    Date of Patent: May 23, 2023
    Assignee: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.
    Inventors: Yu-Wei Hsieh, Po Chia Chen, Li-Ping Zhang, Tai Wei Hsia
  • Publication number: 20230143927
    Abstract: A semiconductor device includes a gate isolation structure on a shallow trench isolation (STI), a first epitaxial layer on one side of the gate isolation structure, a second epitaxial layer on another side of the gate isolation structure, first fin-shaped structures directly under the first epitaxial layer, and second fin-shaped structures directly under the second epitaxial layer, in which the STI surrounds the first fin-shaped structures and the second fin-shaped structures.
    Type: Application
    Filed: January 5, 2023
    Publication date: May 11, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Hao Lin, Hsin-Yu Chen, Shou-Wei Hsieh