Patents by Inventor Wei Chan
Wei Chan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11924705Abstract: An antenna device, a positioning system and a positioning method are provided. The positioning method includes: dispersedly arranging a plurality of receivers to form a target area, in which each of the receivers includes the antenna device; receiving a wireless signal from the target area through the antenna device, and generating a difference signal strength and a sum signal strength; calculating, for each of the receivers, a sum-difference ratio between the difference signal strength and the sum signal strength, and estimating a corresponding one of estimated incident angles according to the sum-difference ratio and a comparison table; executing, in response to obtaining the estimated incident angles corresponding to the receivers, a positioning algorithm according to the estimated incident angles, so as to generate a plurality of possible positions; and executing an optimization algorithm to calculate a best estimated position of the possible positions.Type: GrantFiled: January 20, 2022Date of Patent: March 5, 2024Assignee: PSJ INTERNATIONAL LTD.Inventors: Shih-Yi Huang, Hao-Wei Chan, Ruey-Beei Wu
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Patent number: 11923205Abstract: A method for manufacturing a semiconductor device includes: providing a wafer-bonding stack structure having a sidewall layer and an exposed first component layer; forming a photoresist layer on the first component layer; performing an edge trimming process to at least remove the sidewall layer; and removing the photoresist layer. In this way, contaminant particles generated from the blade during the edge trimming process may fall on the photoresist layer but not fall on the first component layer, so as to protect the first component layer from being contaminated.Type: GrantFiled: December 17, 2021Date of Patent: March 5, 2024Assignee: UNITED MICROELECTRONICS CORPORATIONInventors: Kun-Ju Li, Ang Chan, Hsin-Jung Liu, Wei-Xin Gao, Jhih-Yuan Chen, Chun-Han Chen, Zong-Sian Wu, Chau-Chung Hou, I-Ming Lai, Fu-Shou Tsai
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Publication number: 20240071988Abstract: A method for manufacturing a semiconductor structure is provided. The method includes: providing a substrate and a dielectric layer on the substrate; forming a hole in the dielectric layer; forming an initial barrier material layer and a conductive layer on an upper surface of the dielectric layer and in the hole; removing part of the initial barrier material layer and part of the conductive layer to form a barrier material layer and a via element in the hole respectively and expose the upper surface of the dielectric layer. An upper surface of the barrier material layer is higher than the upper surface of the dielectric layer.Type: ApplicationFiled: October 11, 2022Publication date: February 29, 2024Inventors: Kun-Ju LI, Hsin-Jung LIU, Wei-Xin GAO, Jhih-Yuan CHEN, Ang CHAN, Chau-Chung HOU
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Publication number: 20240071822Abstract: A method for manufacturing a semiconductor structure includes forming a first interconnect feature in a first dielectric feature, the first interconnect feature including a first conductive element exposed from the first dielectric feature; forming a first cap feature over the first conductive element, the first cap feature including a first cap element which includes a two-dimensional material; forming a second dielectric feature with a first opening that exposes the first cap element; forming a barrier layer over the second dielectric feature while exposing the first cap element from the barrier layer; removing a portion of the first cap element exposed from the barrier layer; and forming a second conductive element in the first opening.Type: ApplicationFiled: August 31, 2022Publication date: February 29, 2024Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chin-Lung CHUNG, Shin-Yi YANG, Yu-Chen CHAN, Han-Tang HUNG, Shu-Wei LI, Ming-Han LEE
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Patent number: 11908829Abstract: In an embodiment, a method includes performing a first plasma deposition to form a buffer layer over a first side of a first integrated circuit device, the first integrated circuit device comprising a first substrate and a first interconnect structure; performing a second plasma deposition to form a first bonding layer over the buffer layer, wherein a plasma power applied during the second plasma deposition is greater than a plasma power applied during the first plasma deposition; planarizing the first bonding layer; forming a second bonding layer over a second substrate; pressing the second bonding layer onto the first bonding layer; and removing the first substrate.Type: GrantFiled: June 17, 2021Date of Patent: February 20, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yao-Te Huang, Hong-Wei Chan, Yung-Shih Cheng
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Publication number: 20240057295Abstract: A heat dissipation structure includes a housing, a heat conduction sheet and a thin film. The housing includes a wall surface, which includes an accommodating groove, a supporting surface and an inclined surface. The accommodating groove is recessed on the supporting surface. The inclined surface is connected to the supporting surface, and is located on one side of the accommodating groove. The heat conduction sheet is accommodated in the accommodating groove, and a surface of the heat conduction sheet is in aligned with a surface of the supporting surface. The thin film covers the supporting surface, the heat conduction sheet and the inclined surface. An electronic device including the above housing and heat conduction sheet is further provided.Type: ApplicationFiled: August 10, 2022Publication date: February 15, 2024Inventor: HAO-WEI CHAN
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Publication number: 20240032236Abstract: A heat dissipation assembly is disclosed and includes a fan, a vapor chamber and a heat dissipation fin set. The fan includes a fan frame, an impeller and a fan cover. The impeller is disposed on the fan frame and accommodated in an accommodation space. The impeller includes plural metal blades and a hub, and the plural metal blades are radially arranged on the periphery of the hub to form a dense-metal-blade impeller. The fan cover is assembled with the fan frame to form an outlet, and the fan cover includes an inlet. The vapor chamber includes an upper plate and a lower plate assembled with each other. The upper plate or the lower plate is connected to the fan cover, and the vapor chamber and the fan cover are coplanar. The heat dissipation fin set is connected to the lower plate and spatially corresponding to the outlet.Type: ApplicationFiled: November 7, 2022Publication date: January 25, 2024Inventors: Chin-Ting Chen, Chih-Wei Yang, Shu-Cheng Yang, Che-Wei Chang, Wen-Cheng Huang, Chin-Hung Lee, Chih-Wei Chan
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Patent number: 11876443Abstract: A power converter is provided. The power converter includes a switched-capacitor conversion circuit and an inductor buck circuit. The switched-capacitor conversion circuit receives an input voltage at an input terminal and performs a switching operation to convert the input voltage to an intermediate voltage. The inductor buck circuit is coupled to an output terminal of the switched-capacitor conversion circuit to receive the intermediate voltage and operates at a constant on-time to generate an output voltage at a conversion output terminal according to the intermediate voltage. The inductor buck circuit includes an inductor. In response to that a state of an inductor current used for charging the inductor corresponds to a predetermined condition, a switching action of the switching operation is enabled, so that the switched-capacitor conversion circuit is switched from a first turned-on state to a second turned-on state.Type: GrantFiled: December 16, 2021Date of Patent: January 16, 2024Assignee: NUVOTON TECHNOLOGY CORPORATIONInventors: Po-Hsun Huang, Wei-Chan Hsu
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Publication number: 20230417258Abstract: A centrifugal fan is disclosed and includes a housing, a fan wheel, a first throat portion and a second throat portion. The housing includes a lower cover connected to an upper cover through a peripheral wall to form an accommodation space and an outlet. The upper cover includes an inlet communicated with the outlet. The fan wheel is disposed on the lower cover and accommodated in the accommodation space. The fan wheel is rotated along a rotation direction. The first throat portion is disposed adjacent to a lateral end of the outlet and protrudes from the peripheral wall toward the accommodation space. The second throat portion is disposed adjacent to another lateral end of the outlet, and protrudes from the peripheral wall toward the accommodation space. When the fan wheel is rotated along the rotational direction, an airflow is guided from the first throat portion to the second throat portion.Type: ApplicationFiled: September 7, 2023Publication date: December 28, 2023Inventors: Chin-Hung Lee, Chih-Wei Chan, Ya-Ting Chang
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Publication number: 20230420328Abstract: A semiconductor device includes: a substrate; a seed layer disposed on the substrate; a compound semiconductor stack layer disposed on the seed layer; and a source metal layer and a drain metal layer disposed on the compound semiconductor stack layer. The semiconductor device further includes a conductive layer at least partially covering the source metal layer and the drain metal layer, and covering opposing side surfaces of the seed layer and opposing side surfaces of the compound semiconductor stack layer. The conductive layer electrically connects the seed layer and the source metal layer.Type: ApplicationFiled: June 23, 2022Publication date: December 28, 2023Applicant: Vanguard International Semiconductor CorporationInventors: Hsiu-Mei YU, Guang-Yuan JIANG, Cheng-Yi HSIEH, Wei-Chan CHANG, Chang-Sheng LIN
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Publication number: 20230403024Abstract: An embodiment of the present disclosure provides a conversion circuit for converting a single-ended input to a differential input, which has fewer switches and fewer capacitors. This conversion circuit increases the signal-to-noise ratio (SNR), and the conversion circuit directly uses the higher supply voltage AVDD without being bucked by the regulator, wherein the common mode voltage is AVDD/2N, and N is greater than 1. Overall, not only the circuit area is smaller and the SNR is higher, but also the manufacturing cost is reduced. In addition, compared with the prior art, the conversion circuit of the embodiment of the present disclosure has only three operation periods, so the control is simpler and the operation speed is faster.Type: ApplicationFiled: February 10, 2023Publication date: December 14, 2023Inventors: YEH-TAI HUNG, WEI-CHAN HSU, CHUNG MING HSIEH
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Patent number: 11835363Abstract: An optical module includes: a carrier; an optical element disposed on the upper side of the carrier; and a housing disposed on the upper side of the carrier, the housing defining an aperture exposing at least a portion of the optical element, an outer sidewall of the housing including at least one singulation portion disposed on the upper side of the carrier, wherein the singulation portion of the housing is a first portion of the housing, and wherein the housing further includes a second portion and a surface of the singulation portion of the housing is rougher than a surface of the second portion of the housing.Type: GrantFiled: March 1, 2022Date of Patent: December 5, 2023Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Ying-Chung Chen, Hsun-Wei Chan, Lu-Ming Lai, Kuang-Hsiung Chen
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Publication number: 20230381049Abstract: A muscle tone assessment device includes a pedal, a front force sensor and a back force sensor arranged at the pedal, and a judgment unit connected to the sensors. The judgment unit obtains a front force standard deviation, a back force standard deviation, a front force deviation and a back force deviation from the sensing results, and obtains a first and a second threshold value from the front force standard deviation and the back force standard deviation. The front force standard deviation and the back force standard deviation are the standard deviations of the front force signal and the back force signal within a first time interval. The front force deviation and the back force deviation represent the deviation of the front force signal and the back force signal in a second time interval. In addition, the present invention further provides a muscle tone assessment method.Type: ApplicationFiled: May 26, 2022Publication date: November 30, 2023Inventors: Jia-Wei LAI, Che-Wei CHAN
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Patent number: 11829476Abstract: A model parameters security protection method is implemented in a computing device in communication connection with at least one security protection device. The method includes training a data model based on an artificial neural network using a number of images and obtaining parameter information of the data model, encrypting the parameter information and generating a configuration file comprising the encrypted parameter information, and sending the configuration file to the at least one security protection device. The parameter information includes at least one of a weight of neuron and an offset value of the neuron of the artificial neural network.Type: GrantFiled: March 9, 2021Date of Patent: November 28, 2023Assignee: HON HAI PRECISION INDUSTRY CO., LTD.Inventors: Chien-Wen Hung, Ta-Wei Chan
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Publication number: 20230369285Abstract: A method of fabricating a semiconductor chip includes the following steps. A bonding material layer is formed on a first wafer substrate and is patterned to form a first bonding layer having a strength adjustment pattern. A semiconductor component layer and a first interconnect structure layer are formed on a second wafer substrate. The first interconnect structure layer is located. A second bonding layer is formed on the first interconnect structure layer. The second wafer substrate is bonded to the first wafer substrate by contacting the second bonding layer with the first bonding layer. A bonding interface of the second bonding layer and the first bonding layer is smaller than an area of the second bonding layer. A second interconnect structure layer is formed on the semiconductor component layer. A conductor terminal is formed on the second interconnect structure layer.Type: ApplicationFiled: July 26, 2023Publication date: November 16, 2023Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hong-Wei Chan, Jiing-Feng Yang, Yung-Shih Cheng, Yao-Te Huang, Hui Lee
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Patent number: 11810804Abstract: A method of forming dice includes the following steps. First, a wafer structure is provides, which includes a substrate and a stack of semiconductor layers disposed in die regions and a scribe line region. Then, the substrate and the stack of the semiconductor layers in the scribe line region are removed to form a groove in the substrate. After the formation of the groove, the substrate is further thinned to obtain the substrate with a reduced thickness. Finally, a separation process is performed on the substrate with the reduced thickness.Type: GrantFiled: March 9, 2022Date of Patent: November 7, 2023Assignee: Vanguard International Semiconductor CorporationInventors: Hsiu-Mei Yu, Wei-Chan Chang, Chang-Sheng Lin, Chun-Yi Wu
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Publication number: 20230323779Abstract: A fan includes a hub and a plurality of fan blades. The hub has an axle center. The fan blades are disposed around the hub. Each of the fan blades has a bent portion, and the bent portions of the fan blades are extended along a surrounding direction surrounding the axle center. The hub is welded with the bent portion of each of the fan blades along the surrounding direction. As a result, the number of fan blades is maximized, the strength is simultaneously ensured to be enough, and the advantages of effectively enhancing the fan characteristics are achieved.Type: ApplicationFiled: June 13, 2023Publication date: October 12, 2023Inventors: Ching-Hsien Yeh, Chih-Wei Chan
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Patent number: 11781567Abstract: A centrifugal fan is disclosed and includes a housing, a fan wheel, a first throat portion and a second throat portion. The housing includes a lower cover connected to an upper cover through a peripheral wall to form an accommodation space and an outlet. The upper cover includes an inlet communicated with the outlet. The fan wheel is disposed on the lower cover and accommodated in the accommodation space. The fan wheel is rotated along a rotation direction. The first throat portion is disposed adjacent to a lateral end of the outlet and protrudes from the peripheral wall toward the accommodation space. The second throat portion is disposed adjacent to another lateral end of the outlet, and protrudes from the peripheral wall toward the accommodation space. When the fan wheel is rotated along the rotational direction, an airflow is guided from the first throat portion to the second throat portion.Type: GrantFiled: September 22, 2022Date of Patent: October 10, 2023Assignee: DELTA ELECTRONICS, INC.Inventors: Chin-Hung Lee, Chih-Wei Chan, Ya-Ting Chang
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Patent number: D1013547Type: GrantFiled: March 30, 2020Date of Patent: February 6, 2024Assignee: Amazon Technologies, Inc.Inventors: Michael Edward James Paterson, Chia-Wei Chan, Mei Hsuan Chen, Benjamin Wild, Matthew J. England, Wen-Yo Lu, James Siminoff, Mark Siminoff, Yen-Chi Tsai
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Patent number: D1014073Type: GrantFiled: March 30, 2020Date of Patent: February 13, 2024Assignee: Amazon Technologies, Inc.Inventors: Michael Edward James Paterson, Chia-Wei Chan, Mei Hsuan Chen, Benjamin Wild, Matthew J. England, Wen-Yo Lu, James Siminoff, Mark Siminoff, Yen-Chi Tsai