Patents by Inventor Wei Chan

Wei Chan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11265357
    Abstract: Techniques are described for encapsulating AV1 encoded video data within NAL units. For example, the NAL units can be H.264 or HEVC NAL units. Encapsulation can comprise using a reserved NAL unit type. For example, an open bitstream unit comprising AV1 encoded video data can be encapsulated within a NAL unit using a reserved NAL unit type. The NAL unit can be packetized for delivery to another computing device via a computer network.
    Type: Grant
    Filed: November 1, 2019
    Date of Patent: March 1, 2022
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Mei-Hsuan Lu, Satya Sasikanth Bendapudi, Chun-Wei Chan, Ming-Chieh Lee
  • Patent number: 11262197
    Abstract: An optical module includes: a carrier; an optical element disposed on the upper side of the carrier; and a housing disposed on the upper side of the carrier, the housing defining an aperture exposing at least a portion of the optical element, an outer sidewall of the housing including at least one singulation portion disposed on the upper side of the carrier, wherein the singulation portion of the housing is a first portion of the housing, and wherein the housing further includes a second portion and a surface of the singulation portion of the housing is rougher than a surface of the second portion of the housing.
    Type: Grant
    Filed: November 13, 2019
    Date of Patent: March 1, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Ying-Chung Chen, Hsun-Wei Chan, Lu-Ming Lai, Kuang-Hsiung Chen
  • Publication number: 20220036490
    Abstract: A method of validating learning outcomes of a student is disclosed. In the method, a teaching application includes a validation program to determine an execution score and a completion rate for the student's execution result, the teaching application includes a task database storing task packages which are teaching contents previously taught to the student, and the task package include a sub-task package for the student to execute tasks, the sub-task package includes a validation program for acceptance of the execution result and statistics of an execution score and a completion rate. According to the insufficiency of the student in response to the student's execution score and the completion rate displayed on the teaching application, the teaching application automatically assigns the student to challenge the failed task again or assigns a remedial task to the student, so as to improve the student in knowledge or skills learned in course.
    Type: Application
    Filed: May 5, 2021
    Publication date: February 3, 2022
    Inventors: Chih-Wei CHAN, Tzu-Yi LIN
  • Publication number: 20210397928
    Abstract: A device, a method and a storage medium for accelerating activation function in relation to data processing by artificial neural network provides a register for storing a storage table, a matching unit including a plurality of comparators, a logic unit, and a selection unit. The comparators compare an input variable of the activation function with the variable intervals of the activation function to obtain a comparison output result, the logic unit performs a logical operation according to the comparison output result to obtain a logic output result and determines a variable interval to be calculated according to the logic output. The selection unit queries the storage table according to the variable interval to be calculated and obtains parameters of fitted quadratic function. A calculation unit performs calculations on the input variable according to the parameters.
    Type: Application
    Filed: June 22, 2021
    Publication date: December 23, 2021
    Inventors: TA-WEI CHAN, HUNG-WEN LIN
  • Publication number: 20210374271
    Abstract: A model parameters security protection method is implemented in a computing device in communication connection with at least one security protection device. The method includes training a data model based on an artificial neural network using a number of images and obtaining parameter information of the data model, encrypting the parameter information and generating a configuration file comprising the encrypted parameter information, and sending the configuration file to the at least one security protection device. The parameter information includes at least one of a weight of neuron and an offset value of the neuron of the artificial neural network.
    Type: Application
    Filed: March 9, 2021
    Publication date: December 2, 2021
    Inventors: CHIEN-WEN HUNG, TA-WEI CHAN
  • Publication number: 20210364009
    Abstract: A thin fan includes a frame and a driving device. The driving device includes a stator structure and a rotor structure corresponding to the stator structure. The stator structure includes a stator magnetic pole group and a base body The rotor structure includes a rotor shell, a magnetic structure and an impeller connected to the rotor shell. The rotor shell includes a top plate, an outer sidewall, an oil seal and a protruding structure. A center of the rotor shell is formed with a cylindrical shaft. The rotor shell and the shaft are a single component manufactured by processing a single material workpiece. The stator magnetic pole group magnetically drives the magnetic structure as well as the rotor shell to rotate. Wherein an inner surface of the rotor shell facing the stator structure and corresponding to the base body is formed with an oil repellent layer.
    Type: Application
    Filed: August 5, 2021
    Publication date: November 25, 2021
    Inventors: CHENG-HSIEN YEH, CHIH-WEI CHAN
  • Publication number: 20210358786
    Abstract: A method of forming dice includes the following steps. First, a wafer structure is provides, which includes a substrate and a stack of semiconductor layers disposed in die regions and a scribe line region. Then, the substrate and the stack of the semiconductor layers in the scribe line region are removed to forma groove in the substrate. After the formation of the groove, the substrate is further thinned to obtain the substrate with a reduced thickness. Finally, a separation process is performed on the substrate with the reduced thickness.
    Type: Application
    Filed: May 14, 2020
    Publication date: November 18, 2021
    Inventors: Hsiu-Mei Yu, Wei-Chan Chang, Chang-Sheng Lin, Chun-Yi Wu
  • Publication number: 20210313879
    Abstract: A voltage regulation system is provided. In the voltage regulation system, a frequency of a clock signal is adjusted and a pulse generator is controlled to output a pulse signal to a switch power stage circuit, to enable the switch power stage circuit to adjust an output voltage and output the adjusted output voltage to the load element. Through the aforementioned configuration, the switch power stage circuit adjusts the output voltage according to the situation of the load element, thus decreasing the power loss of the switch power stage circuit.
    Type: Application
    Filed: September 17, 2020
    Publication date: October 7, 2021
    Inventors: Chung-Ming Hsieh, Wei-Chan Hsu
  • Publication number: 20210305143
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a base, a seed layer, a compound semiconductor layer, a gate structure, a source structure, a drain structure, and a conductive paste. The seed layer is disposed on the base. The compound semiconductor layer is disposed on the seed layer. The gate structure is disposed on the compound semiconductor layer. The source structure and the drain structure are disposed on both sides of the gate structure. In addition, the conductive paste is disposed between the base and a lead frame, and the conductive paste extends to the side surface of the base.
    Type: Application
    Filed: March 24, 2020
    Publication date: September 30, 2021
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Chih-Yen CHEN, Hsin-Chang TSAI, Chun-Yi WU, Chia-Ching HUANG, Chih-Jen HSIAO, Wei-Chan CHANG, Francois HEBERT
  • Patent number: 11133246
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a base, a seed layer, a compound semiconductor layer, a gate structure, a source structure, a drain structure, and a conductive paste. The seed layer is disposed on the base. The compound semiconductor layer is disposed on the seed layer. The gate structure is disposed on the compound semiconductor layer. The source structure and the drain structure are disposed on both sides of the gate structure. In addition, the conductive paste is disposed between the base and a lead frame, and the conductive paste extends to the side surface of the base.
    Type: Grant
    Filed: March 24, 2020
    Date of Patent: September 28, 2021
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Chih-Yen Chen, Hsin-Chang Tsai, Chun-Yi Wu, Chia-Ching Huang, Chih-Jen Hsiao, Wei-Chan Chang, Francois Hebert
  • Publication number: 20210280755
    Abstract: A semiconductor device package includes a light-emitting device, a diffuser structure, a first optical sensor, and a second optical sensor. The light-emitting device has a light-emitting surface. The diffuser structure is above the light-emitting surface of the light-emitting device. The first optical sensor is disposed below the diffuser structure, and the first optical sensor is configured to detect a first reflected light reflected by the diffuser structure. The second optical sensor is disposed below the diffuser structure, and the second optical sensor is configured to detect a second reflected light reflected by the diffuser structure.
    Type: Application
    Filed: March 4, 2020
    Publication date: September 9, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hsin-Ying HO, Hsun-Wei CHAN, Shih-Chieh TANG, Lu-Ming LAI
  • Patent number: 11106086
    Abstract: An optical plate with protrusions, an optical structure, a backlight module and a display device are provided. The optical plate includes a main body and several protrusions. The main body has a first surface. The protrusions are formed on and projected from the first surface. An area ratio of the protrusions to the first surface is in a range of 0.03˜35%. The protrusions have a pitch in a range of 0.5˜10 mm, and a portion of the first surface other than the protrusions has a first center line mean roughness Ra in a range of 0.01˜0.1 ?m.
    Type: Grant
    Filed: April 18, 2019
    Date of Patent: August 31, 2021
    Assignee: CHIMEI CORPORATION
    Inventors: Hsin-Hung Chen, Wei-Chan Tseng, Chung-Hao Wang
  • Publication number: 20210257296
    Abstract: A method of forming a semiconductor device includes forming a conductive feature and a first punch stop layer, where the conductive feature has a first top surface, and where the first punch stop layer has a second top surface that is substantially level with the first top surface. The method further includes forming a resistive element over the first punch stop layer. The method further includes etching through a first portion of the resistive element to form a first trench that exposes both the second top surface of the first punch stop layer and a first sidewall surface of the resistive element. The method further includes forming a first conductive via within the first trench, where the first conductive via contacts the first sidewall surface of the resistive element.
    Type: Application
    Filed: December 3, 2020
    Publication date: August 19, 2021
    Inventors: Hong-Wei CHAN, Yung-Shih CHENG, Wen-Sheh HUANG
  • Publication number: 20210257295
    Abstract: A semiconductor structure includes a first dielectric layer over a first conductive line and a second conductive line, a high resistance layer over a portion of the first dielectric layer, a low-k dielectric layer over the second dielectric layer, a second dielectric layer on the high resistance layer, a first conductive via extending through the low-k dielectric layer and the second dielectric layer, and a second conductive via extending through the low-k dielectric layer and the first dielectric layer to the first conductive line. The first conductive via extends into the high resistance layer.
    Type: Application
    Filed: June 19, 2020
    Publication date: August 19, 2021
    Inventors: Hong-Wei Chan, Yung-Shih Cheng, Wen-Sheh Huang, Yu-Hsiang Chen
  • Publication number: 20210210662
    Abstract: A semiconductor device package includes a carrier, a die, an encapsulation layer and a thickness controlling component. The die is disposed on the carrier, wherein the die includes a first surface. The encapsulation layer is disposed on the carrier, and encapsulates a portion of the first surface of the die. The encapsulation layer defines a space exposing another portion of the first surface of the die. The thickness controlling component is disposed in the space.
    Type: Application
    Filed: January 3, 2020
    Publication date: July 8, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yi Wen CHIANG, Kuang-Hsiung CHEN, Lu-Ming LAI, Hsun-Wei CHAN, Hsin-Ying HO, Shih-Chieh TANG
  • Publication number: 20210207624
    Abstract: The present invention relates to a fluid control device and a connector for the same. The connector includes a first unit and a second unit to form a connector in a particular shape. Thus, the connector and an adjacent connector can be stacked upon each other to allow simple disassembling. The present invention also provides a fluid control device including the connector.
    Type: Application
    Filed: March 19, 2021
    Publication date: July 8, 2021
    Inventor: Chee-Wei CHAN
  • Publication number: 20210207623
    Abstract: The present invention relates to a fluid control device and a connector for the same. The connector includes a first unit and a second unit to form a connector in a particular shape. Thus, the connector and an adjacent connector can be stacked upon each other to allow simple disassembling. The present invention also provides a fluid control device including the connector.
    Type: Application
    Filed: March 19, 2021
    Publication date: July 8, 2021
    Inventor: Chee-Wei CHAN
  • Publication number: 20210201057
    Abstract: A traffic light recognition system including a map, a localization module, at least one image capturing device and an image processing module is provided. The map is configured to provide an information relevant to a traffic light. The localization module is configured to provide a positioning information relevant to the traffic light. At least one image capturing device is configured to capture a real-time road image relevant to the traffic light. The image processing module is configured to combine the map and the positioning information of the traffic light provided by the localization module to generate a region of interest in the real-time road image captured by the image capturing device, and to recognize the traffic light in the region of interest, wherein the traffic light includes a light box and at least one light signal.
    Type: Application
    Filed: December 27, 2019
    Publication date: July 1, 2021
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yan-Yu LIN, Sheng-Wei CHAN
  • Publication number: 20210121823
    Abstract: The invention provides a device and system for decomposing and oxidizing of gaseous pollutants. A novel reaction portion reduces particle formation in fluids during treatment, thereby improving the defect of particle accumulation in a reaction portion. Also, the system includes the device, wherein a modular design enables the system to have the advantage of easy repair and maintenance.
    Type: Application
    Filed: January 4, 2021
    Publication date: April 29, 2021
    Inventor: Chee-Wei CHAN
  • Patent number: D925384
    Type: Grant
    Filed: December 13, 2019
    Date of Patent: July 20, 2021
    Assignee: Amazon Technologies, Inc.
    Inventors: Matthew J. England, Chia-Wei Chan, Mikhail Donskoi, Wen-Yo Lu, Quynh Anh Nguyen