Patents by Inventor Wei Fang

Wei Fang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210015094
    Abstract: By determining the lethality rate to Meloidogyne incognita and Caenorhabditis elegans, it was found that the methylmalonic acid has a better nematicidal effect on the Caenorhabditis elegans, with the LC50 being 13.11 and 1.20 for the Meloidogyne incognita and the Caenorhabditis elegans, respectively. After compounding the methylmalonic acid with betaine, the LC50 was 2.85 and 0.27 for the Meloidogyne incognita and the Caenorhabditis elegans, respectively. Meanwhile, the methylmalonic acid also has an inhibiting effect on Pseudomonas solanacearum and Erwinia carotovora. The preparation of the methylmalonic acid provides a new choice for preparing novel biocontrol agents against the root-knot nematodes.
    Type: Application
    Filed: September 30, 2020
    Publication date: January 21, 2021
    Inventors: Xiaoyan LIU, Wei FANG, Yong MIN, Daye HUANG, Ronghua ZHOU, Guangyang ZHANG, Ben RAO, Xianqing LIAO, Fang LIU, Wei CHEN, Kaimei WANG, Ziwen YANG, Liqiao SHI
  • Patent number: 10895587
    Abstract: A wafer probe station includes a first shielding box, a chuck, a stage, a second shielding box, an electronic testing instrument, a manipulator and a cable. The first shielding box has a first chamber. The chuck is located in the first chamber to hold a device under test. The stage connects to the chuck to move the chuck. The second shielding box is outside the first shielding box and forms a second chamber with the first shielding box. The first and the second shielding boxes shield against an electromagnetic field. The electronic testing instrument is inside the second chamber. The manipulator is outside the first shielding box and has a probe arm penetrating into the first chamber. The probe arm is movable by the manipulator to hold a probe to contact the device under test. The cable connects between the electronic testing instrument and the probe.
    Type: Grant
    Filed: December 26, 2018
    Date of Patent: January 19, 2021
    Assignee: MPI Corporation
    Inventors: Yu-Hsun Hsu, Jhih-Wei Fang, Stojan Kanev, Sebastian Giessmann
  • Publication number: 20210008730
    Abstract: The present disclosure provides a pose determining method for a mobile robot as well as an apparatus and a mobile robot thereof. The method includes: obtaining a first position of a mobile robot in each local map after building an initial local map corresponding to a current environment and rotating; determining first environmental contour points of each of the local maps and corresponding first gradient directions, and obtaining a relative position of each of the first environmental contour points and the corresponding first position; building an angle histogram in each of the local maps; determining a second position of second environmental contour points of a global map and corresponding second gradient directions; and predicting a third position in the global map of the mobile robot, counting an appearance amount of the third positions, and determining a target pose of the mobile robot in the global map.
    Type: Application
    Filed: September 5, 2019
    Publication date: January 14, 2021
    Inventors: XU HU, Peng Nie, Wei Fang, Jiawen Hu, Youjun Xiong
  • Patent number: 10879135
    Abstract: A method for inline inspection during semiconductor wafer fabrication is provided. The method includes forming a plurality of test structures on a semiconductor wafer along two opposite directions. An offset distance between a sample feature and a target feature of each of the test structures increases gradually along the two opposite directions. The method further includes producing an image of the test structures. The method also includes performing image analysis of the image to recognize a position with an extreme of a gray level. In addition, the method includes calculating an overlay error according to the recognized position.
    Type: Grant
    Filed: December 16, 2019
    Date of Patent: December 29, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
    Inventors: Shang-Wei Fang, Jing-Sen Wang, Yuan-Yao Chang, Wei-Ray Lin, Ting-Hua Hsieh, Pei-Hsuan Lee, Yu-Hsuan Huang
  • Patent number: 10860247
    Abstract: A data writing method is provided. The method includes receiving a first write command and first data corresponding to the first write command from a host system, wherein the first write command instructs to store the first data into a first logical address; copying the first data into a register, responding to the host system that the first write command is completed, and starting to execute a first program operation to program the first data into a first physical page; and in response to determining that the first program operation is failed, reading the first data from the register according to a logical to physical addresses mapping table and mandatorily programming the first data into a second physical page.
    Type: Grant
    Filed: September 20, 2018
    Date of Patent: December 8, 2020
    Assignee: Shenzhen EpoStar Electronics Limited CO.
    Inventors: Heng-Lin Yen, Hung-Chih Hsieh, Tzu-Wei Fang, Yu-Hua Hsiao
  • Publication number: 20200381184
    Abstract: A perovskite solar cell and a method of manufacturing the same are provided. The perovskite solar cell includes a first electrode, a second electrode, an active layer, a hole transporting layer, electron transporting layer, and a passivation layer. The second electrode is disposed opposite to the first electrode. The active layer is disposed between the first electrode and the second electrode, and the active layer includes a perovskite layer. The hole transporting layer is disposed between the first electrode and the active layer. The electron transporting layer is disposed between the second electrode and the active layer. The passivation layer is disposed between the active layer and the electron transporting layer, and the passivation layer includes a dipolar ion having a heteroaryl group.
    Type: Application
    Filed: October 22, 2019
    Publication date: December 3, 2020
    Inventors: Wei-Fang SU, Kai-Chi HSIAO
  • Publication number: 20200374582
    Abstract: The present disclosure relates to systems and methods for synchronizing audio and video. The systems and methods may perform operations including: obtaining a data stream including a sequence of video frames and a sequence of audio samples; inputting the sequence of video frames into a video channel, the sequence of video frames being processed and outputted from the video channel; inputting, for processing, the sequence of audio samples into an audio channel, the audio channel including a data buffer configured to buffer processed audio samples, a volume threshold of the data buffer being determined according to a time for processing one or more successive video frames; determining that a data volume of audio samples buffered in the data buffer exceeds the volume threshold; and in response to a determination that the data volume of buffered audio samples exceeds the volume threshold, outputting the buffered audio samples from the audio channel.
    Type: Application
    Filed: August 11, 2020
    Publication date: November 26, 2020
    Applicant: ZHEJIANG XINSHENG ELECTRONIC TECHNOLOGY CO., LTD.
    Inventors: Guojian ZHENG, Huimin ZHENG, Genqiang CUI, Bingyun LYU, Wei FANG
  • Patent number: 10847389
    Abstract: Systems and methods are provided for annealing a semiconductor structure. In one embodiment, the method includes providing an energy-converting structure proximate a semiconductor structure, the energy-converting structure comprising a material having a loss tangent larger than that of the semiconductor structure; providing a heat reflecting structure between the semiconductor structure and the energy-converting structure; and providing microwave radiation to the energy-converting structure and the semiconductor structure. The semiconductor structure may include at least one material selected from the group consisting of boron-doped silicon germanium, silicon phosphide, titanium, nickel, silicon nitride, silicon dioxide, silicon carbide, n-type doped silicon, and aluminum capped silicon carbide. The heat reflecting structure may include a material substantially transparent to microwave radiation and having substantial reflectivity with respect to infrared radiation.
    Type: Grant
    Filed: October 21, 2019
    Date of Patent: November 24, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Chun-Hsiung Tsai, Zi-Wei Fang, Chao-Hsiung Wang
  • Patent number: 10840350
    Abstract: The present disclosure provides a method of forming a nanolaminate structure. First, a pre-treatment is performed on a semiconductor substrate, in which the semiconductor substrate includes SiGe. Then, a first metal oxide layer is formed on the semiconductor substrate. Then, at least one second metal oxide layer and at least one third metal oxide layer are alternately stacked on the first metal oxide layer, thereby forming a nanolaminate structure. And, a conductive gate layer is formed on the nanolaminate structure.
    Type: Grant
    Filed: August 22, 2017
    Date of Patent: November 17, 2020
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Zi-Wei Fang, Hong-Fa Luan, Wilman Tsai, Kasra Sardashti, Maximillian Clemons, Scott Ueda, Mahmut Kavrik, Iljo Kwak, Andrew Kummel, Hsiang-Pi Chang
  • Patent number: 10817416
    Abstract: A Memory management method for a storage device having a rewritable non-volatile memory module is provided. The rewritable non-volatile memory module has a plurality of physical blocks divided into a plurality of block stripes. The method includes: scanning the physical blocks to identify one or more bad physical blocks among the physical blocks; calculating a plurality of effective weight values corresponding to the block stripes according to a plurality of data accessing time parameters of the rewritable non-volatile memory module, a plurality of valid data counts, and the identified one or more bad physical blocks; and selecting a target block stripe from the block stripes according to the effective weight values to perform a garbage collection operation.
    Type: Grant
    Filed: July 17, 2018
    Date of Patent: October 27, 2020
    Assignee: Shenzhen EpoStar Electronics Limited CO.
    Inventors: Yu-Hua Hsiao, Hung-Chih Hsieh, Tzu-Wei Fang
  • Publication number: 20200335608
    Abstract: A semiconductor includes a substrate, a semiconductor fin, an STI structure, a fin sidewall spacer, and a doped silicon layer. The semiconductor fin extends from the substrate. The STI structure laterally surrounds a lower portion of the semiconductor fin. The fin sidewall spacer extends along a middle portion of the semiconductor fin that is above the lower portion of the semiconductor fin. The doped silicon layer wraps around three sides of an upper portion of the semiconductor fin that is above the middle portion of the semiconductor fin.
    Type: Application
    Filed: July 2, 2020
    Publication date: October 22, 2020
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yao-Sheng HUANG, Hung-Chang SUN, I-Ming CHANG, Zi-Wei FANG
  • Publication number: 20200333714
    Abstract: Systems and methods for conducting critical dimension metrology are disclosed. According to certain embodiments, a charged particle beam apparatus generates a beam for imaging a first area and a second area. Measurements are acquired corresponding to a first feature in the first area, and measurements are acquired corresponding to a second feature in the second area. The first area and the second area are at separate locations on a sample. A combined measurement is calculated based on the measurements of the first feature and the measurements of the second feature.
    Type: Application
    Filed: October 5, 2018
    Publication date: October 22, 2020
    Inventors: Fei WANG, Wei FANG, Kuo-Shih LIU
  • Publication number: 20200334446
    Abstract: Systems and methods for detecting defects are disclosed. According to certain embodiments, a method of performing image processing includes acquiring one or more images of a sample, performing first image analysis on the one or more images, identifying a plurality of first features in the one or more images, determining pattern data corresponding to the plurality of first features, selecting at least one of the plurality of first features based on the pattern data, and performing second image analysis of the at least one of the plurality of first features. Methods may also include determining defect probability of the plurality of first features based on the pattern data. Selecting the at least one of the plurality of first features may be based on the defect probability.
    Type: Application
    Filed: December 19, 2018
    Publication date: October 22, 2020
    Inventor: Wei FANG
  • Publication number: 20200326632
    Abstract: A method for determining corrections to features of a mask. The method includes obtaining (i) a pattern group for a design layout, and (ii) defect inspection data of a substrate imaged using the mask used in the patterning process for the design layout; determining, based on the defect inspection data, a defect map associated with the pattern group, wherein the defect map comprises locations of assist features having a relatively higher probability of being printed on the substrate compared to other patterns of the design layout; and determining, via simulating an optical proximity correction process using data associated with the defect map, corrections to the features of the mask.
    Type: Application
    Filed: April 14, 2020
    Publication date: October 15, 2020
    Applicant: ASML NETHERLANDS B.V.
    Inventors: Wei Fang, Lingling Pu, Zhichao Chen, Haili Zhang, Pengcheng Zhang
  • Publication number: 20200328119
    Abstract: A semiconductor device includes a semiconductor substrate, first gate structure, a first metal layer, a first protective layer, and a first contact plug. The first gate structure includes a plurality of first U-shaped layers stacked one another between the first gate spacers in a cross-sectional view and first gate spacers on opposite sides of the first U-shaped layers. The first metal layer is over the first U-shaped layers and has a different shape than the first U-shaped layers in the cross-sectional view. The first protective layer is over the first metal layer and between the first gate spacers. The first contact plug extends through the first protective layer and the first metal layer, and is in contact with the first gate structure.
    Type: Application
    Filed: June 27, 2020
    Publication date: October 15, 2020
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Peng-Soon LIM, Zi-Wei FANG
  • Patent number: 10801943
    Abstract: The present application provides an apparatus and a method for measuring apparent permeability of a tight rock core, the apparatus comprises: a rock core holder, a first high-pressure injection pump, a second high-pressure injection pump, a micro-differential pressure meter, a micro-flow meter, a first pressure control unit, a second pressure control unit, a first valve, a second valve, a third valve, and a fourth valve; the first pressure control unit comprises: a first pressure-resistant piston container and a second pressure-resistant piston container, both of which are divided into an upper cavity and a lower cavity by a piston, the upper cavities of the first pressure-resistant piston container and the second pressure-resistant piston container are filled with gases and communicate with each other, and the lower cavity of the first pressure-resistant piston container is filled with pump pressure-transmission liquids, and the lower cavity of the second pressure-resistant piston container is filled with ex
    Type: Grant
    Filed: June 22, 2018
    Date of Patent: October 13, 2020
    Assignees: CHINA UNIVERSITY OF PETROLEUM-BEIJING, BEIJING SHIDA RONGZHI SCI. AND TECH. LTD. CO.
    Inventors: Xiang'an Yue, Weiqing An, Xuegang Feng, Lijuan Zhang, Jirui Zou, Xin Fang, Youjun Fu, Wei Fang, Junbin Zhang, Wenhao Tian, Jueshun Zhao, Bin Kong, Shengxu Zhao
  • Publication number: 20200319930
    Abstract: Embodiments regard client-side memory management in component-driven console applications. An embodiment of one or more storage mediums include instructions for performing processing of a console application on an apparatus, including downloading records from a server for a set of one or more of multiple workspaces and opening the set of workspaces in response to request by a user, and switching an active workspace from a first workspace to a second workspace of the plurality of workspaces in response to a request from the user; monitoring memory usage for the plurality of workspaces and monitoring a state of the console application; and managing the memory allocation for the console application based at least in part on the monitored memory usage and console application state.
    Type: Application
    Filed: April 8, 2019
    Publication date: October 8, 2020
    Inventors: Ashraya Raj Mathur, Wei Fang
  • Publication number: 20200311581
    Abstract: Disclosed is a high quality pattern mining model and method based on an improved Multi-Objective Evolutionary Algorithm (MOEA), which belongs to the technical field of data mining. By applying a three-objective pattern mining model to item management, and in combination with a comprehensive consideration on support, occupancy, and utility, an itemset easily purchased together by clients and having a high utility value may be mined, which is convenient for a supermarket manager to make a reasonable marketing strategy.
    Type: Application
    Filed: May 28, 2020
    Publication date: October 1, 2020
    Inventors: Wei FANG, Qiang ZHANG, Jun SUN, Xiaojun WU
  • Publication number: 20200302587
    Abstract: An inspection method includes the following steps: identifying a plurality of patterns within an image; and comparing the plurality of patterns with each other for measurement values thereof. The above-mentioned inspection method uses the pattern within the image as a basis for comparison; therefore, measurement values of the plurality of pixels constructing the pattern can be processed with statistical methods and then compared, and the false rate caused by variation of a few pixels is decreased significantly. An inspection system implementing the above-mentioned method is also disclosed.
    Type: Application
    Filed: June 8, 2020
    Publication date: September 24, 2020
    Inventors: Wei FANG, Zhao-li Zhang, Jack Jau
  • Publication number: 20200294851
    Abstract: A semiconductor structure includes a semiconductor substrate, a gate structure, an etch stop layer, a dielectric structure, and a conductive material. The gate structure is on the semiconductor substrate. The etch stop layer is over the gate structure. The dielectric structure is over the etch stop layer, in which the dielectric structure has a ratio of silicon to nitrogen varying from a middle layer of the dielectric structure to a bottom layer of the dielectric structure. The conductive material extends through the dielectric structure.
    Type: Application
    Filed: June 1, 2020
    Publication date: September 17, 2020
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hung-Chang SUN, Po-Chin CHANG, Akira MINEJI, Zi-Wei FANG, Pinyen LIN