Patents by Inventor Wei Fang

Wei Fang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11658182
    Abstract: An integrated circuit device includes: a first fin structure disposed on a substrate in a first direction; a second fin structure disposed on the substrate and aligned in the first direction; a third fin structure disposed on the substrate and aligned in the first direction; and a first conductive line aligned in a second direction arranged to wrap a first portion, a second portion, and a third portion of the first fin structure, the second fin structure and the third fin structure, respectively. Each of the first fin structure, the second fin structure and the third fin structure has a same type dopant. A first distance between the first fin structure and the second fin structure is different from a second distance between the second fin structure and the third fin structure.
    Type: Grant
    Filed: March 23, 2021
    Date of Patent: May 23, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Kam-Tou Sio, Shang-Wei Fang, Jiann-Tyng Tzeng, Chew-Yuen Young
  • Patent number: 11658820
    Abstract: A distributed system, such as a distributed storage system in a virtualized computing environment and having storage nodes arranged in a cluster, is provided by management server with a transition period between non-encryption and encryption modes of operation. The transition period enables all of the nodes to complete a transition from the non-encryption mode of operation to the encryption mode of operation, without loss of data-in-transit (DIT). An auto-remediation feature is provided by the management server to the cluster, so as to fix inconsistent state(s) of one or more nodes in the cluster.
    Type: Grant
    Filed: November 23, 2020
    Date of Patent: May 23, 2023
    Assignee: VMWARE, INC.
    Inventors: Wei Fang, Haoran Zheng, Tao Xie, Yun Zhou, YangYang Zhang
  • Publication number: 20230152084
    Abstract: A height measurement method includes obtaining an image including a target object and a pose of a camera used when the image is photographed, obtaining pixel coordinates of at least two key skeleton points of the target object in the image, obtaining three-dimensional coordinates of the key skeleton points based on the pose of the camera and the pixel coordinates of the key skeleton points, and determining height data of the target object based on the three-dimensional coordinates of the at least two key skeleton points.
    Type: Application
    Filed: January 13, 2023
    Publication date: May 18, 2023
    Inventors: Wei Fang, Qi Su, Yafei Wu
  • Publication number: 20230153236
    Abstract: Data writing methods and computing devices are provided. An example data writing method is applied to a computer system, and the computer system includes a file system and a flash memory-based storage system. The example data writing method includes obtaining a target logical address, where the target logical address is an address allocated from a first logical block to target data to be written into the flash memory-based storage system, the first logical block is one of multiple logical blocks in the file system, and the flash memory-based storage system includes multiple physical blocks. It is determined that the target logical address belongs to the first logical block. The target data is written into a first physical block based on a correspondence between the first logical block and the first physical block, where the first physical block is one of the multiple physical blocks.
    Type: Application
    Filed: December 28, 2022
    Publication date: May 18, 2023
    Inventors: Wei FANG, Xie MIAO, Tao HOU
  • Patent number: 11650576
    Abstract: A server for knowledge recommendation for defect review. The server includes a processor electronically coupled to an electronic storage device storing a plurality of knowledge files related to wafer defects. The processor is configured to execute a set of instruction to cause the server to: receive a request for knowledge recommendation for inspecting an inspection image from a defect classification server; search for a knowledge file in the electronic storage device that matches the inspection image; and transmit the search result to the defect classification server.
    Type: Grant
    Filed: January 15, 2018
    Date of Patent: May 16, 2023
    Assignee: ASML Netherlands B.V.
    Inventors: Wei Fang, Cho Huak Teh, Robeter Jian, Yi-Ying Wang, Shih-Tsung Chen, Jian-Min Liao, Chuan Li, Zhaohui Guo, Pang-Hsuan Huang, Shao-Wei Lai, Shih-Tsung Hsu
  • Publication number: 20230145593
    Abstract: Disclosed is an intelligent anti-seismic device for a shallow foundation ancient building, which may include a land, a foundation base and an ancient building body, foundation pit is excavated on a surface of the land, a plurality of piles are arranged on an inner wall of the foundation pit, a foundation side beam is integrally formed by pouring on tops of the plurality of piles, a first earthquake proof mechanism capable of being lifted and lowered is fixed on a top of the foundation side beam, a well-shaped base is integrally formed on the inner wall of the foundation pit, a second earthquake proof mechanism is fixed on a surface of the well-shaped base, a frame is fixed on both tops of the first earthquake proof mechanism and the second earthquake proof mechanism, a grillage beam is integrally formed on an inner wall of the frame.
    Type: Application
    Filed: September 14, 2021
    Publication date: May 11, 2023
    Inventors: Xiang Li, Yihong Zhang, Hongli Zheng, Tuo Pang, Wei Fang
  • Publication number: 20230117237
    Abstract: An improved apparatus and method for extracting pattern contour information from an inspection image in a multiple charged-particle beam inspection system are disclosed. An improved method for extracting pattern contour information from an inspection image comprises identifying, from an inspection image obtained from a charged-particle beam inspection system, a first pattern and a second pattern that partially overlap in the inspection image. The method also comprises generating a first separation image by removing an image area corresponding to the second pattern from the inspection image. The first separation image includes the first pattern of which a first part is removed when removing the image area corresponding to the second pattern. The method also comprises updating the first separation image to include image data representing the removed first part of the first pattern based on a first reference image corresponding to the first pattern.
    Type: Application
    Filed: January 27, 2021
    Publication date: April 20, 2023
    Applicant: ASML Netherlands B.V.
    Inventors: Lingling PU, Wei FANG
  • Publication number: 20230110241
    Abstract: A device includes a semiconductor channel region and a gate structure. The semiconductor channel region is on a substrate. The gate structure is over the semiconductor channel region and comprises a gate dielectric layer, a first gate conductor layer, and a second gate conductor layer. The first gate conductor layer is over the gate dielectric layer. The first gate conductor layer includes oxygen. The second gate conductor layer is over the first gate conductor layer.
    Type: Application
    Filed: December 13, 2022
    Publication date: April 13, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Cheng-Ming Lin, Peng-Soon Lim, Zi-Wei Fang
  • Patent number: 11619786
    Abstract: Embodiments of this application provide an optical fiber ferrule, where n rows of optical fiber holes are symmetrically distributed on a mating end face of the ferrule, n>=3, and n is an odd number. Based on the layout design of optical fiber holes on the optical fiber ferrule, this application provides an optical fiber connector that includes a plurality of rows of optical fiber holes and that is compatible with one row and a relatively small number of rows of optical fiber holes, so that an optical fiber connector with a large number of cores can be forward compatible with an optical fiber connector with a small number of cores, thereby improving expandability and compatibility of the optical fiber ferrule.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: April 4, 2023
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Hualiang Shi, Banghong Hu, Wei Fang, Chungang Li, Yiguo Qi, Juanjuan Cao
  • Patent number: 11620816
    Abstract: An apparatus including a memory and a circuit. The memory may comprise three buffers. The circuit may be configured to allocate the three buffers in the memory based on a size of a full resolution feature map, receive a plurality of regions of interest ranked based on a feature map pyramid, generate a plurality of levels of the feature map pyramid starting from the full resolution feature map and store the levels in the buffers. The circuit may store the levels that are used by at least one of the plurality of regions of interest or do have a dependent level, the levels that are generated may be stored in the buffers in a pattern that ensures the level is stored until no longer needed to create the dependent level and enables the level to be discarded when no longer needed to create the dependent level.
    Type: Grant
    Filed: June 29, 2022
    Date of Patent: April 4, 2023
    Assignee: Ambarella International LP
    Inventors: Xuejiao Liang, Wei Fang
  • Patent number: 11603846
    Abstract: A pump mechanism is provided, including a housing, a first impeller, a second impeller, and two driving modules. The housing includes a first recess, a second recess, a plate, a channel, an input pipe, a first output pipe, and a second output pipe. The plate is disposed between the first recess and the second recess. The channel passes through the plate and communicated with the first recess and the second recess. The input pipe is connected to the channel and passes through the housing and the plate. The first output pipe and the second output pipe are respectively communicated with the first recess and the second recess.
    Type: Grant
    Filed: July 13, 2020
    Date of Patent: March 14, 2023
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Wei-Fang Wu, Chia-Ying Hsu, Chia-Yu Yeh, Chi-Chang Teng
  • Publication number: 20230076943
    Abstract: Systems and methods for in-die metrology using target design patterns are provided. These systems and methods include selecting a target design pattern based on design data representing the design of an integrated circuit, providing design data indicative of the target design pattern to enable design data derived from the target design pattern to he added to second design data, wherein the second design data is based on the first design data. Systems and methods can further include causing structures derived from the second design data to be printed on a wafer, inspecting the structures on the wafer using a charged-particle beam tool, and identifying metrology data or process defects based on the inspection. In some embodiments the systems and methods further include causing the charged-particle beam tool, the second design data, a scanner, or photolithography equipment to be adjusted based on the identified metrology data or process defects.
    Type: Application
    Filed: November 10, 2022
    Publication date: March 9, 2023
    Applicant: ASML Netherlands B.V.
    Inventors: Lingling PU, Wei FANG, Zhong-wei CHEN
  • Publication number: 20230044723
    Abstract: The present invention relates to a transfer platform for a biological sample analyzer, comprising a movable carrier plate and an object stage which is placed on the carrier plate and separable from the carrier plate. The side of the carrier plate facing the object stage is an upper surface, and the reverse side is a lower surface. The side of the object stage facing the carrier plate is a lower surface, and the reverse side is an upper surface. The object stage and the carrier plate are respectively provided with magnetic blocks that magnetically attract each other. When the object stage is placed in a predetermined area on the carrier plate, the suction of the magnetic blocks automatically positions the object stage relative to the carrier plate, thereby achieving the technical effect of blind positioning. The present invention can be applied to test analyzers for specific proteins, cholesterol, heme, routine urine test, dry biochemical test, etc.
    Type: Application
    Filed: March 16, 2021
    Publication date: February 9, 2023
    Applicant: LEADWAY (HK) LIMITED
    Inventors: Wei FANG, Linyong TANG, Tao SHANG, Zhongping WANG
  • Patent number: 11565934
    Abstract: A semiconductor package structure includes a die paddle, a plurality of leads, an electronic component and a package body. Each of the plurality of leads is separated from the die paddle and has an inner side surface facing the die paddle. The electronic component is disposed on the die paddle. The package body covers the die paddle, the plurality of leads and the electronic component. The package body is in direct contact with a bottom surface of the die paddle and the inner side surface of the plurality of leads.
    Type: Grant
    Filed: January 3, 2020
    Date of Patent: January 31, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Yu-Hsuan Tsai, Lu-Ming Lai, Chien-Wei Fang, Ching-Han Huang
  • Publication number: 20230028799
    Abstract: Apparatuses, methods, and systems for ultra-fast beam current adjustment for a charged-particle inspection system include an charged-particle source configured to emit charged particles for scanning a sample; and an emission booster configured to configured to irradiate electromagnetic radiation onto the charged-particle source for boosting charged-particle emission in a first cycle of a scanning operation of the charged-particle inspection system, and to stop irradiating the electromagnetic radiation in a second cycle of the scanning operation.
    Type: Application
    Filed: December 17, 2020
    Publication date: January 26, 2023
    Applicant: ASML NETHERLANDS B.V.
    Inventors: Wei FANG, Zhong-wei CHEN
  • Publication number: 20230012946
    Abstract: A system and method for defect inspection using voltage contrast in a charged particle system are provided. Some embodiments of the system and method include positioning the stage at a first position to enable a first beam of the plurality of beams to scan a first surface area of the wafer at a first time to generate a first image associated with the first surface area; positioning the stage at a second position to enable a second beam of the plurality of beams to scan the first surface area at a second time to generate a second image associated with the first surface area; and comparing the first image with the second image to enable detecting whether a defect is identified in the first surface area of the wafer.
    Type: Application
    Filed: December 17, 2020
    Publication date: January 19, 2023
    Applicant: ASML NETHERLANDS B.V.
    Inventors: Wei FANG, Zhengwei ZHOU, Lingling PU
  • Patent number: 11549760
    Abstract: A heat dissipation assembly includes a condenser, an evaporator, a vapor conduit, and a liquid conduit. The condenser has a condensing chamber therein. Two ends of the vapor conduit are respectively connected to the condenser and the evaporator. Two ends of the liquid conduit are respectively connected to the condenser and the evaporator. A geometric center of the liquid conduit in the condensing chamber is lower than or equal to a geometric center of the condensing chamber.
    Type: Grant
    Filed: December 28, 2021
    Date of Patent: January 10, 2023
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Wei-Fang Wu, Li-Kuang Tan
  • Patent number: 11527405
    Abstract: Systems and methods for in-die metrology using target design patterns are provided. These systems and methods include selecting a target design pattern based on design data representing the design of an integrated circuit, providing design data indicative of the target design pattern to enable design data derived from the target design pattern to be added to second design data, wherein the second design data is based on the first design data. Systems and methods can further include causing structures derived from the second design data to be printed on a wafer, inspecting the structures on the wafer using a charged-particle beam tool, and identifying metrology data or process defects based on the inspection. In some embodiments the systems and methods further include causing the charged-particle beam tool, the second design data, a scanner, or photolithography equipment to be adjusted based on the identified metrology data or process defects.
    Type: Grant
    Filed: December 30, 2019
    Date of Patent: December 13, 2022
    Assignee: ASML Netherlands B.V.
    Inventors: Lingling Pu, Wei Fang, Zhong-wei Chen
  • Patent number: D973621
    Type: Grant
    Filed: February 26, 2021
    Date of Patent: December 27, 2022
    Assignee: Beijing Xiaomi Mobile Software Co., Ltd.
    Inventors: Yake Hao, Wei Fang, Shengyu Gong, Xu Wei, Yin Zhu
  • Patent number: D983988
    Type: Grant
    Filed: September 24, 2021
    Date of Patent: April 18, 2023
    Inventor: Wei Fang