Patents by Inventor Wei Fang

Wei Fang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11410035
    Abstract: Disclosed is a real-time object detection method deployed on a platform with limited computing resources, which belongs to the field of deep learning and image processing. In the present invention, YOLO-v3-tiny neural network is improved, Tinier-YOLO reserves the front five convolutional layers and pooling layers of YOLO-v3-tiny and makes prediction at two different scales. Fire modules in SqueezeNet, 1×1 bottleneck layers, and dense connection are introduced, so that the structure is used to achieve smaller, faster, and more lightweight network that can be run in real time on an embedded AI platform. The model size of Tinier-YOLO in the present invention is only 7.9 MB, which is only ¼ of 34.9 MB of YOLO-v3-tiny, and ? of YOLO-v2-tiny. The reduction in the model size of Tinier-YOLO does not affect real-time performance and accuracy of Tinier-YOLO. Real-time performance of Tinier-YOLO in the present invention is 21.8% higher than that of YOLO-v3-tiny and 70.8% higher than that of YOLO-v2-tiny.
    Type: Grant
    Filed: May 28, 2020
    Date of Patent: August 9, 2022
    Assignee: Jiangnan University
    Inventors: Wei Fang, Peiming Ren, Lin Wang, Jun Sun, Xiaojun Wu
  • Publication number: 20220245780
    Abstract: An inspection method includes the following steps: identifying a plurality of patterns within an image; and comparing the plurality of patterns with each other for measurement values thereof. The above-mentioned inspection method uses the pattern within the image as a basis for comparison; therefore, measurement values of the plurality of pixels constructing the pattern can be processed with statistical methods and then compared, and the false rate caused by variation of a few pixels is decreased significantly. An inspection system implementing the above-mentioned method is also disclosed.
    Type: Application
    Filed: February 14, 2022
    Publication date: August 4, 2022
    Applicant: ASML Netherlands B.V.
    Inventors: Wei FANG, Zhao-Li ZHANG, Jack JAU
  • Publication number: 20220245787
    Abstract: A defect inspection system is disclosed. According to certain embodiments, the system includes a memory storing instructions implemented as a plurality of modules. Each of the plurality of modules is configured to detect defects having a different property. The system also includes a controller configured to cause the computer system to: receive inspection data representing an image of a wafer; input the inspection data to a first module of the plurality of modules, the first module outputs a first set of points of interests (POIs) having a first property; input the first set of POIs to a second module of the plurality of modules, the second module output a second set of POIs having the second property; and report that the second set of POIs as defects having both the first property and the second property.
    Type: Application
    Filed: April 18, 2022
    Publication date: August 4, 2022
    Applicant: ASML Netherlands B.V.
    Inventors: Zhichao CHEN, Wei FANG
  • Publication number: 20220245840
    Abstract: A method for aligning a wafer image with a reference image, comprising: searching for a targeted reference position on the wafer image for aligning the wafer image with the reference image; and in response to a determination that the targeted reference position does not exist: defining a current lock position and an area that encloses the current lock position on the wafer image; computing an alignment score of the current lock position; comparing the alignment score of the current lock position with stored alignment scores of positions previously selected in relation to aligning the wafer image with the reference image; and aligning the wafer image with the reference image based on the comparison.
    Type: Application
    Filed: April 15, 2022
    Publication date: August 4, 2022
    Inventors: Wei FANG, Lingling PU
  • Publication number: 20220237759
    Abstract: Systems and methods for optimal electron beam metrology guidance are disclosed. According to certain embodiments, the method may include receiving an acquired image of a sample, determining a set of image parameters based on an analysis of the acquired image, determining a set of model parameters based on the set of image parameters, generating a set of simulated images based on the set of model parameters. The method may further comprise performing measurement of critical dimensions on the set of simulated images and comparing critical dimension measurements with the set of model parameters to provide a set of guidance parameters based on comparison of information from the set of simulated images and the set of model parameters. The method may further comprise receiving auxiliary information associated with target parameters including critical dimension uniformity.
    Type: Application
    Filed: January 3, 2022
    Publication date: July 28, 2022
    Applicant: ASML Netherlands B.V.
    Inventors: Lingling PU, Wei FANG, Nan ZHAO, Wentian ZHOU, Teng WANG, Ming XU
  • Publication number: 20220238515
    Abstract: An integrated circuit is provided, including a first conductive pattern, at least one first conductive segment, and a first via. The first conductive pattern is disposed in a first layer and configured as a terminal of an inverter. The at least one first conductive segment is disposed in a second layer above the first layer and configured to transmit an output signal output from the inverter. The first via contacts the first conductive pattern and the at least one first conductive segment to transmit the output signal. An area, contacting the first conductive pattern, of the first via is smaller than an area, contacting the at least one first conductive segment, of the first via.
    Type: Application
    Filed: April 13, 2022
    Publication date: July 28, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Po-Chia LAI, Shang-Wei FANG, Meng-Hung SHEN, Jiann-Tyng TZENG, Ting-Wei CHIANG, Jung-Chan YANG, Stefan RUSU
  • Patent number: 11399167
    Abstract: A system and a method for processing images are provided. The method may include one or more of the following operations. An image including a plurality of channels and a plurality of pixels may be obtained, each pixel having a pixel value corresponding to one of the plurality of channels. One of the plurality of pixels may be selected as a pixel of interest, and the corresponding channel of the pixel value of the pixel of interest may be designated as a target channel. A plurality of pixels proximate to the pixel of interest may include at least two first reference pixels. For each first reference pixel, a pseudo pixel value for the target channel of the first reference pixel may be determined. Whether the image is a deteriorated image may be determined at least based on the pixel value of the pixel of interest and the determined pseudo pixel values.
    Type: Grant
    Filed: April 20, 2020
    Date of Patent: July 26, 2022
    Assignee: ZHEJIANG DAHUA TECHNOLOGY CO., LTD.
    Inventors: Chen Ling, Dan Zhang, Xin Ma, Wei Fang
  • Publication number: 20220216318
    Abstract: A method includes forming a semiconductor fin; forming a gate dielectric layer over the semiconductor fin; depositing a first work function metal layer over the gate dielectric layer, the first work function metal layer having a first concentration of a work function material; depositing a second work function metal layer over the first work function metal layer, the second work function metal layer having a second concentration of the work function material, wherein the first concentration is higher than the second concentration; and forming a gate electrode over the second work function metal layer.
    Type: Application
    Filed: March 21, 2022
    Publication date: July 7, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Peng-Soon LIM, Zi-Wei FANG, Cheng-Ming LIN
  • Patent number: 11373902
    Abstract: A semiconductor structure includes a semiconductor substrate, a gate structure, an etch stop layer, a dielectric structure, and a conductive material. The gate structure is on the semiconductor substrate. The etch stop layer is over the gate structure. The dielectric structure is over the etch stop layer, in which the dielectric structure has a ratio of silicon to nitrogen varying from a middle layer of the dielectric structure to a bottom layer of the dielectric structure. The conductive material extends through the dielectric structure.
    Type: Grant
    Filed: June 1, 2020
    Date of Patent: June 28, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hung-Chang Sun, Po-Chin Chang, Akira Mineji, Zi-Wei Fang, Pinyen Lin
  • Publication number: 20220175393
    Abstract: Provided is a tourniquet device including a belt body and a timer, wherein the timer includes: a housing having a plurality of bulges; a connecting component arranged on the outside of the housing to connect the belt body to the timer; and a timing unit and a warning unit, which are arranged inside the housing, wherein the belt body is clamped between the bulges and the connecting component. In the tourniquet device, the timer is small, simple to operate, and not easy to fall off from the belt body. In addition, the tourniquet device is suitable for users' conventional operation without undue difficulties in use.
    Type: Application
    Filed: November 17, 2021
    Publication date: June 9, 2022
    Inventors: Wei-Fang Wang, Yueh-Ju Liao, Ying-Ju Chang
  • Patent number: 11348837
    Abstract: A semiconductor device includes a semiconductor substrate, first gate structure, a first metal layer, a first protective layer, and a first contact plug. The first gate structure includes a plurality of first U-shaped layers stacked one another between the first gate spacers in a cross-sectional view and first gate spacers on opposite sides of the first U-shaped layers. The first metal layer is over the first U-shaped layers and has a different shape than the first U-shaped layers in the cross-sectional view. The first protective layer is over the first metal layer and between the first gate spacers. The first contact plug extends through the first protective layer and the first metal layer, and is in contact with the first gate structure.
    Type: Grant
    Filed: June 27, 2020
    Date of Patent: May 31, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Peng-Soon Lim, Zi-Wei Fang
  • Patent number: 11343560
    Abstract: The present disclosure relates to systems and methods for synchronizing audio and video. The systems and methods may perform operations including: obtaining a data stream including a sequence of video frames and a sequence of audio samples; inputting the sequence of video frames into a video channel, the sequence of video frames being processed and outputted from the video channel; inputting, for processing, the sequence of audio samples into an audio channel, the audio channel including a data buffer configured to buffer processed audio samples, a volume threshold of the data buffer being determined according to a time for processing one or more successive video frames; determining that a data volume of audio samples buffered in the data buffer exceeds the volume threshold; and in response to a determination that the data volume of buffered audio samples exceeds the volume threshold, outputting the buffered audio samples from the audio channel.
    Type: Grant
    Filed: August 11, 2020
    Date of Patent: May 24, 2022
    Assignee: ZHEJIANG XINSHENG ELECTRONIC TECHNOLOGY CO., LTD.
    Inventors: Guojian Zheng, Huimin Zheng, Genqiang Cui, Bingyun Lyu, Wei Fang
  • Publication number: 20220156968
    Abstract: This application provides a visual feature database construction method, including: obtaining a database creation image; performing feature extraction on the database creation image to obtain a feature point of the database creation image and a descriptor of the feature point of the database creation image; intersecting a ray corresponding to the feature point of the database creation image with a 3D model, to determine the 3D position of the intersection point at which the ray intersects with the 3D model as the 3D position of the feature point of the database creation image; and writing the descriptor of the feature point of the database creation image and the database creation image into a visual feature database, to construct the visual feature database.
    Type: Application
    Filed: February 7, 2022
    Publication date: May 19, 2022
    Applicant: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Siliang DU, Zehui KANG, Wei FANG
  • Patent number: 11334517
    Abstract: An electronic device is provided. The electronic device includes a board, a first latch mechanism, and an expansion card. A controller is disposed on the board. The first latch mechanism is disposed on the board. The first latch mechanism is electrically connected to the controller. The expansion card is plugged in the first latch mechanism and disposed over the board. The expansion card is electrically connected to the controller through the first latch mechanism. The controller determines a connecting condition of the first latch mechanism according to a connecting signal provided by the expansion card.
    Type: Grant
    Filed: December 21, 2020
    Date of Patent: May 17, 2022
    Assignee: Wiwynn Corporation
    Inventors: Wei-Fang Chang, Yu-Chun Chen, Pei-Zhen Tsai, Chung-Hui Yen
  • Publication number: 20220129405
    Abstract: An electronic device is provided. The electronic device includes a board, a first latch mechanism, and an expansion card. A controller is disposed on the board. The first latch mechanism is disposed on the board. The first latch mechanism is electrically connected to the controller. The expansion card is plugged in the first latch mechanism and disposed over the board. The expansion card is electrically connected to the controller through the first latch mechanism. The controller determines a connecting condition of the first latch mechanism according to a connecting signal provided by the expansion card.
    Type: Application
    Filed: December 21, 2020
    Publication date: April 28, 2022
    Applicant: Wiwynn Corporation
    Inventors: Wei-Fang Chang, Yu-Chun Chen, Pei-Zhen Tsai, Chung-Hui Yen
  • Publication number: 20220130822
    Abstract: Disclosed are semiconductor devices including a substrate, a first transistor formed over a first portion of the substrate, wherein the first transistor comprises a first nanosheet stack including N nanosheets and a second transistor over a second portion of the substrate, wherein the second transistor comprises a second nanosheet stack including M nanosheets, wherein N is different from M in which the first and second nanosheet stacks are formed on first and second substrate regions that are vertically offset from one another.
    Type: Application
    Filed: June 11, 2021
    Publication date: April 28, 2022
    Inventors: Te-Hsin CHIU, Kam-Tou SIO, Shang-Wei FANG, Wei-Cheng LIN, Jiann-Tyng TZENG
  • Publication number: 20220130151
    Abstract: The present disclosure relates to surveillance systems and methods. The surveillance methods may include converting first digital multimedia data from a first initial format into a first target format and a second target format; obtaining first intelligent data based on the first digital multimedia data of the first target format; generating first analog multimedia data by performing mixing, encoding and digital-analog conversion on the first digital multimedia data of the second target format and the first intelligent data; and transmitting the first analog multimedia data via a coaxial cable.
    Type: Application
    Filed: December 29, 2021
    Publication date: April 28, 2022
    Applicant: ZHEJIANG XINSHENG ELECTRONIC TECHNOLOGY CO., LTD.
    Inventors: Bingyun LYU, Wei FANG, Yinchang YANG
  • Patent number: 11315237
    Abstract: An image is obtained by using a charged particle beam, and a design layout information is generated to select patterns of interest. Grey levels among patterns can be compared with each other to identify abnormal, or grey levels within one pattern can be compared to a determined threshold grey level to identify abnormal.
    Type: Grant
    Filed: November 25, 2015
    Date of Patent: April 26, 2022
    Assignee: ASML Netherlands B.V.
    Inventor: Wei Fang
  • Patent number: 11313883
    Abstract: A probe station includes a base, a adaptor, a probe holder and a probe. The adaptor has a first portion and a second portion away from the first portion towards a first direction by a first length. The first portion connects to the base. A probe holder connects to the second portion and extends towards a second direction opposite to the first direction by a second length. The probe connects to an end of the probe holder away from the second portion and extends towards the second direction by a third length. A product of a thermal coefficient of the adaptor and the first length is equal to a sum of a product of a thermal coefficient of the probe holder and the second length and a product of a thermal coefficient of the probe and the third length.
    Type: Grant
    Filed: September 10, 2020
    Date of Patent: April 26, 2022
    Assignee: MPI CORPORATION
    Inventors: Yu-Hsun Hsu, Jhih-Wei Fang, Sebastian Giessmann
  • Publication number: 20220120510
    Abstract: A heat dissipation assembly includes a condenser, an evaporator, a vapor conduit, and a liquid conduit. The condenser has a condensing chamber therein. Two ends of the vapor conduit are respectively connected to the condenser and the evaporator. Two ends of the liquid conduit are respectively connected to the condenser and the evaporator. A geometric center of the liquid conduit in the condensing chamber is lower than or equal to a geometric center of the condensing chamber.
    Type: Application
    Filed: December 28, 2021
    Publication date: April 21, 2022
    Inventors: Wei-Fang WU, Li-Kuang TAN