Patents by Inventor Wei Jiang

Wei Jiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230397426
    Abstract: A 3D memory array including multiple memory cells and a method of manufacturing the same are provided. Each memory cell includes a first isolation structure, source and drain electrodes, a gate layer, a channel layer and a memory layer. The source and drain electrodes are disposed on opposite sides of the first isolation structure, and the source and drain electrodes comprise kink portions. The gate layer is disposed beside the source and drain electrodes and the first isolation structure. The channel layer is disposed between the gate layer and the source electrode, the first isolation structure and the drain electrode, and the channel layer extends between the source and drain electrodes and covers the kink portions of the source and drain electrodes. The memory layer is disposed between the gate layer and the channel layer and extends beside the gate layer and extends beyond the channel layer.
    Type: Application
    Filed: June 5, 2022
    Publication date: December 7, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Wei Jiang, TsuChing Yang, Sheng-Chih Lai, Feng-Cheng Yang, Chung-Te Lin
  • Publication number: 20230395543
    Abstract: A package structure includes an isolation layer with multiple vias, N first pads, N Redistribution Layers (RDLs), and a first insulating layer. Each via exposes a respective part of an interconnection layer arranged on a surface of a semiconductor functional structure. Each first pad is formed by a respective part of the interconnection layer exposed by the corresponding via, N is a positive integer greater than 1. Each RDL covers the isolation layer and is electrically connected to a corresponding one of the N first pads. The first insulating layer is formed on the RDLs and exposes a part area of each RDL. The exposed part areas of at least some of the RDLs includes second pads and third pads. The center point of each second pad has the same offset direction and the same offset distance with respect to the center point of the corresponding first pad.
    Type: Application
    Filed: January 10, 2023
    Publication date: December 7, 2023
    Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Kai TIAN, Hongwen LI, Liang CHEN, Wei JIANG
  • Patent number: 11838803
    Abstract: The embodiments of this application disclose a resource reserving method and a device and relate to the field of communications technologies. The method includes: obtaining target information, where the target information includes at least one of first information and second information, the first information is used to indicate a resource reserving priority of first data, the second information is used to indicate a resource reserving priority of second data, the first data is data that occupies a first resource, and the second data is to-be-transmitted data; and according to the target information, determining whether to use the first resource as a candidate resource for transmitting the second data. The embodiments of this application are applied to a scenario where UE reserves a resource for to-be-transmitted data.
    Type: Grant
    Filed: June 28, 2021
    Date of Patent: December 5, 2023
    Assignee: VIVO MOBILE COMMUNICATION CO., LTD.
    Inventors: Shuyan Peng, Zichao Ji, Wei Jiang
  • Publication number: 20230389340
    Abstract: A method of forming a semiconductor memory device includes: forming a stack structure on a substrate, the stack structure including a plurality of dielectric layers and a plurality of sacrificial layers alternatingly stacked in a Z direction substantially perpendicular to the substrate; forming a plurality of source/drain trenches in the stack structure; conformally forming a barrier layer in the source/drain trenches, and then filling the source/drain trenches with a plurality of sacrificial segments; forming a protection layer over the stack structure to cover the barrier layer and the sacrificial segments; removing the sacrificial layers of the stack structure to form a plurality of spaces among the dielectric layers; forming a plurality of conductive layers in the spaces; sequentially removing the protection layer, the sacrificial segments and the barrier layer; and forming a plurality of memory structures in the source/drain trenches.
    Type: Application
    Filed: May 26, 2022
    Publication date: November 30, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wei-Chih WEN, Yu-Wei JIANG, Han-Jong CHIA
  • Publication number: 20230385516
    Abstract: A method and an apparatus for checking a signal line are provided. The method includes: obtaining custom design information of a target signal line in a circuit schematic, and generating a layout design rule corresponding to the target signal line based on the custom design information; checking whether the target signal line meets the layout design rule in a circuit layout corresponding to the circuit schematic; and adding a first label to a position of the target signal line in the circuit layout when the target signal line in the circuit layout does not meet the layout design rule. The first label is configured to indicate that the target signal line does not meet the layout design rule.
    Type: Application
    Filed: August 30, 2022
    Publication date: November 30, 2023
    Inventors: Min MIN, Wei JIANG, Li BAI, Chuanjiang CHEN
  • Publication number: 20230376303
    Abstract: Implementations of the present specification provide a method of generating a regular expression for a parameter of an application system and a method and an apparatus of checking validity of a parameter of an application system. To generate a regular expression for a parameter of the application system, parameter values of each parameter in each method code block are obtained from a historical implementation of the application system. Common information is extracted from the corresponding parameter values for each parameter in each method code block. Then a corresponding regular expression is generated for each parameter in each method code block based on the extracted common information.
    Type: Application
    Filed: May 16, 2023
    Publication date: November 23, 2023
    Inventors: Bingxu CHAI, Wei JIANG, Jianguo LI, Haoxuan YU
  • Patent number: 11825130
    Abstract: A method of three-dimensional (3D)-Tree coding for neural network model compression, is performed by at least one processor, and includes reshaping a four-dimensional (4D) parameter tensor of a neural network into a 3D parameter tensor of the neural network, the 3D parameter tensor comprising a convolution kernel size, an input feature size, and an output feature size, partitioning the 3D parameter tensor along a plane that is formed by the input feature size and the output feature size into 3D coding tree units (CTU3Ds), partitioning each of the CTU3Ds into a plurality of 3D coding units (CU3Ds) recursively until a predetermined depth, using a quad-tree, and constructing a 3D tree for each of the plurality of CU3Ds, wherein the 3D tree for each of the plurality of CU3Ds is a 3D-Unitree.
    Type: Grant
    Filed: January 13, 2023
    Date of Patent: November 21, 2023
    Assignee: TENCENT AMERICA LLC
    Inventors: Wei Wang, Wei Jiang, Shan Liu
  • Publication number: 20230371258
    Abstract: A memory device includes a multi-layer stack disposed on a substrate and including conductive layers and dielectric layers stacked alternately, a channel layer penetrating through the conductive layers and the dielectric layers, a charge storage layer disposed between the conductive layers and the channel layer, an insulating layer penetrating through the conductive layers and the dielectric layers and disposed between the charge storage layer and the multi-layer stack, and a first conductive pillar and a second conductive pillar enclosed by the channel layer.
    Type: Application
    Filed: July 28, 2023
    Publication date: November 16, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Chang Sun, Yu-Wei Jiang, TsuChing Yang, Kuo-Chang Chiang, Sheng-Chih Lai
  • Publication number: 20230367280
    Abstract: Disclosed is an optimal scheduling method for peak regulation of a cascade hydro-photovoltaic complementary power generation system. The method includes: establishing an objective function of optimal scheduling for peak regulation of the cascade hydro-photovoltaic complementary power generation system; establishing a photovoltaic power station output constraint condition considering uncertainty; optimizing a mixed integer linear model by performing linear processing on the constraint condition; and obtaining a scheduling solution by solving the mixed integer linear model. According to the present disclosure, a unit commitment of a hydro-power station and an operational solution of a reservoir are considered, so that photovoltaic output can be consumed by fully using a characteristic that the hydro-power unit is easy to regulate, and a demand for peak regulation of a power grid can be satisfied.
    Type: Application
    Filed: June 9, 2023
    Publication date: November 16, 2023
    Inventors: Jian Zhou, Yang Li, Dacheng Li, Wei Jiang, Feng Wu, Huawei Xiang, Yun Tian, Yifan Bao, Di Wu, Xu Li, Linjun Shi, Wenbo Huang, Xinglin Duan, Keman Lin, Yanqing Zhang
  • Patent number: 11818424
    Abstract: Disclosed in the embodiments of the present disclosure are a method and apparatus used for generating a video, and an electronic device. The method comprises: while displaying an original video, acquiring audio material by means of background music of the original video, and acquiring image material, determining music points of the audio material, the music points being used for dividing the audio material into a plurality of audio clips; using the image material to generate a video clip for each music clip in the audio material so as to obtain a plurality of video clips, corresponding music clips and video clips having the same duration; and according to the times at which the music clips corresponding to the plurality of video clips appear in the audio material, splicing the plurality of video clips together, and adding the audio material as a video audio track to obtain a synthesized video.
    Type: Grant
    Filed: May 13, 2022
    Date of Patent: November 14, 2023
    Assignee: BEIJING BYTEDANCE NETWORK TECHNOLOGY CO., LTD.
    Inventors: Ya Wang, Pingfei Fu, Wei Jiang, Qifan Zheng
  • Patent number: 11818399
    Abstract: There is included a method and apparatus comprising computer code configured to cause a processor or processors to perform obtaining a video bitstream, coding the video bitstream at least partly by a neural network, determining topology information and parameters of the neural network, signaling the determined topology information and the parameters of the neural network in a plurality of syntax elements associated with the coded video bitstream.
    Type: Grant
    Filed: September 16, 2021
    Date of Patent: November 14, 2023
    Assignee: TENCENT AMERICA LLC
    Inventors: Byeongdoo Choi, Zeqiang Li, Wei Jiang, Wei Wang, Xiaozhong Xu, Stephan Wenger, Shan Liu
  • Publication number: 20230363175
    Abstract: The present disclosure provides a semiconductor structure. The semiconductor structure includes a substrate and a stacked structure disposed on the substrate. The stacked structure includes multiple alternately stacked insulating layers and gate members. A core structure is disposed in the stacked structure. The core structure includes a memory layer, a channel member, a contact member, and a liner member. The channel member is disposed on the memory layer. The contact member is disposed on the channel member. The liner member surrounds a portion of the core structure. The present disclosure also provides a method for fabricating the semiconductor structure.
    Type: Application
    Filed: July 18, 2023
    Publication date: November 9, 2023
    Inventors: Yu-Wei Jiang, Sheng-Chih Lai, Feng-Cheng Yang, Chung-Te Lin
  • Patent number: 11810331
    Abstract: A method of decoding an image with latent feature-domain intra-prediction is performed by at least one processor and includes receiving a set of latent blocks and for each of the blocks in the set of latent blocks: predicting a block, based on a set of previously recovered blocks; receiving a selection signal indicating a currently recovered block, based on the selection signal performing one of (1) and (2): (1) generating a compact residual, a set of residual context parameters, a decoded residual, and generating a first decoded block; (2) generating a second decoded block, based on a compact representation block and a set of context parameters. The method further includes generating a set of recovered blocks comprising each of the currently recovered blocks; generating a recovered latent image by merging all the blocks in the set of recovered blocks; and decoding the recovered latent image, to obtain a reconstructed image.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: November 7, 2023
    Assignee: TENCENT AMERICA LLC
    Inventors: Wei Jiang, Wei Wang, Ding Ding, Shan Liu, Xiaozhong Xu
  • Patent number: 11811429
    Abstract: A method, computer program, and computer system is provided for compressing a deep neural network model. Weight coefficients associated with a deep neural network are quantize and entropy-coded. The quantized and entropy-coded weight coefficients are locally smoothed. The smoothed weight coefficients are compressed based on applying a variational dropout to the weight coefficients.
    Type: Grant
    Filed: September 28, 2020
    Date of Patent: November 7, 2023
    Assignee: TENCENT AMERICA LLC
    Inventors: Wei Jiang, Wei Wang, Shan Liu
  • Publication number: 20230346499
    Abstract: An interventional instrument manipulation accessory (100) is configured to position an interventional instrument (200). The interventional instrument manipulation accessory (100) includes a support frame (10) and at least one sliding assembly (20). The interventional instrument (200) is detachably connected to the sliding assembly (20). The support frame (10) includes a guiding rod (13). The guiding rod (13) is provided with at least one rack (131) in a length direction of the guiding rod (13). The sliding assembly (20) includes a sliding block (21) and an adjusting mechanism (23) detachably disposed at the sliding block (21). The adjusting mechanism (23) includes a limiting portion (235) and a gear (234) fixedly connected to the limiting portion (235). In the case where the sliding assembly (20) is mounted at the guiding rod (13), the sliding block (21) is sleeved on the guiding rod (13).
    Type: Application
    Filed: June 21, 2023
    Publication date: November 2, 2023
    Inventors: Tingchao ZHANG, Yang LI, Zehan ZHANG, Wei JIANG
  • Patent number: 11803689
    Abstract: A method (and system) includes retrieving a dataset from a database, creating, on a first platform, a report including a visual representation of the dataset, automatically formatting the report to a second platform and displaying the report on a graphical user interface of the second platform. The first platform is a desktop computer or a laptop computer and the second platform is a tablet device or a handheld mobile device. The visualization of the dataset includes data containers in a first arrangement. The data containers are automatically formatted into a second arrangement to fit the graphical user interface of the second platform.
    Type: Grant
    Filed: August 5, 2020
    Date of Patent: October 31, 2023
    Assignee: MICROSTRATEGY INCORPORATED
    Inventors: Yiqi Zhang, Wei Jiang, Mengyuan Guan
  • Patent number: 11803988
    Abstract: A method of adaptive neural image compression with a hyperprior model by meta-learning is performed by at least one processor and includes generating a statistic feature, based on an input image and a hyperparameter, and generating a first shared feature and an estimated adaptive encoding parameter, encoding the input image to obtain a signal encoded image, based on the generated first shared feature and the generated estimated adaptive encoding parameter, generating a second shared feature and an estimated adaptive hyper encoding parameter, generating a hyper feature, based on the signal encoded image, the generated second shared feature, and the generated estimated adaptive hyper encoding parameter, and compressing the obtained signal encoded image, the generated statistic feature, and the generated hyper feature.
    Type: Grant
    Filed: June 29, 2021
    Date of Patent: October 31, 2023
    Assignee: TENCENT AMERICA LLC
    Inventors: Wei Jiang, Wei Wang, Shan Liu, Xiaozhong Xu
  • Publication number: 20230345731
    Abstract: A memory device includes a multi-layer stack, a channel layer, a memory material layer and a memory material layer. The multi-layer stack includes a plurality of conductive layers and a plurality of dielectric layers stacked alternately along a first direction. The memory material layer is disposed between the channel layer and each of the conductive layers and the dielectric layers. The conductive pillars extend in the first direction, wherein the at least three conductive pillars are aligned along a second direction substantially perpendicular to the first direction.
    Type: Application
    Filed: June 27, 2023
    Publication date: October 26, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Wei Jiang, Sheng-Chih Lai, TsuChing Yang, Hung-Chang Sun, Kuo-Chang Chiang
  • Publication number: 20230336762
    Abstract: A pruning method of neural network based video coding of a current block of a picture of a video sequence is performed by at least one processor and includes categorizing parameters of a neural network into groups, setting a first index to indicate that a first group of the groups is to be pruned, and a second index to indicate that a second group of the groups is not to be pruned, and transmitting, to a decoder, the set first index and the set second index. Based on the transmitted first index and the transmitted second index, the current block is processed using the parameters of which the first group of the groups is pruned.
    Type: Application
    Filed: June 20, 2023
    Publication date: October 19, 2023
    Applicant: TENCENT AMERICA LLC
    Inventors: Xiaozhong Xu, Wei Jiang, Shan Liu, Wei Wang
  • Publication number: 20230330020
    Abstract: An orally administered antibiotic encapsulated in nanospheres, as well as its preparation method and application. The antibiotic encapsulated in the nanospheres includes an antibiotic and a degradable biocompatible polymer that encapsulates the antibiotic, wherein biocompatible polymer includes monosaccharide-modified poly (ethylene glycol)-poly(lactic-co-glycolic acid) (PEG-PLGA), which can significantly improves the damage caused by oral antibiotics to the intestinal microbiota, avoids destruction of the microbial community, thereby preventing chronic diseases associated with intestinal microbial imbalance, and a good biocompatibility and long-term safety.
    Type: Application
    Filed: November 13, 2020
    Publication date: October 19, 2023
    Applicant: UNIVERSITY OF SCIENCE AND TECHNOLOGY OF CHINA
    Inventors: Shu ZHU, Yucai WANG, Guorong ZHANG, Qin WANG, Wanyin TAO, Wei JIANG