Patents by Inventor Wen Cheng

Wen Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200357900
    Abstract: Stress memorization techniques (SMTs) for fin-like field effect transistors (FinFETs) are disclosed herein. An exemplary method includes forming a capping layer over a fin structure; forming an amorphous region within the fin structure while the capping layer is disposed over the fin structure; and performing an annealing process to recrystallize the amorphous region. The capping layer enables the fin structure to retain stress effects induced by forming the amorphous region and/or performing the annealing process.
    Type: Application
    Filed: July 27, 2020
    Publication date: November 12, 2020
    Inventors: Wen-Cheng Lo, Sun-Jay Chang
  • Publication number: 20200346925
    Abstract: An integrated circuit (IC) with an integrated microelectromechanical systems (MEMS) structure is provided. In some embodiments, the IC comprises a semiconductor substrate, a back-end-of-line (BEOL) interconnect structure, the integrated MEMS structure, and a cavity. The BEOL interconnect structure is over the semiconductor substrate, and comprises wiring layers stacked in a dielectric region. Further, an upper surface of the BEOL interconnect structure is planar or substantially planar. The integrated MEMS structure overlies and directly contacts the upper surface of the BEOL interconnect structure, and comprises an electrode layer. The cavity is under the upper surface of the BEOL interconnect structure, between the MEMS structure and the BEOL interconnect structure.
    Type: Application
    Filed: July 21, 2020
    Publication date: November 5, 2020
    Inventors: Chun-Wen Cheng, Chia-Hua Chu
  • Publication number: 20200346195
    Abstract: A catalyst for preparing chloroethylene by cracking 1,2-dichloroethane and a preparation and regeneration method thereof are disclosed in the present application. A catalyst for preparing chloroethylene by cracking 1,2-dichloroethane includes a carrier and a nitrogen-containing carbon as an active component of the catalyst with the nitrogen-containing carbon being loaded on the carrier. The method for preparing the catalyst includes: supporting an organic matter on an inorganic porous carrier and then performing a carbonization-nitridation process by pyrolysis in an atmosphere containing the nitrogen-containing compound. The method for regenerating the catalyst includes: calcinating the catalyst with deactivated carbon deposit in an oxidizing atmosphere to remove all the carbonaceous portions on the surface, and repeating the above preparation process of the catalyst.
    Type: Application
    Filed: April 30, 2019
    Publication date: November 5, 2020
    Applicants: DALIAN INSTITUTE OF CHEMICAL PHYSICS, CHINESE ACADEMY OF SCIENCES, FORMOSA PLASTICS CORPORATION
    Inventors: Jinming XU, Sisi FAN, Yanqiang HUANG, Tao ZHANG, Chin Lien HUANG, Wan Tun HUNG, Yu Cheng CHEN, Chien Hui WU, Ya Wen CHENG, Ming Hsien WEN, Chao Chin CHANG, Tsao Cheng HUANG
  • Patent number: 10823696
    Abstract: The present disclosure provides a bio-field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device includes a substrate, a transistor structure, an isolation layer, an interface layer in an opening of the isolation layer, and a metal crown structure over the interface layer. The interface layer and the metal crown structure are disposed on opposite side of the transistor from a gate structure.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: November 3, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun-Wen Cheng, Yi-Shao Liu, Fei-Lung Lai
  • Publication number: 20200340496
    Abstract: In example implementations, an apparatus is provided. The apparatus includes an accelerometer, a plurality of fan blades, a coil magnet and a processor. The accelerometer is coupled to a motor to measure an amount of vibration. The plurality of fan blades is coupled to the motor. Each one of the plurality of fan blades comprises a magnet. The coil magnet is coupled to a fan housing that encloses the motor, the plurality of fan blades and the accelerometer. The processor is communicatively coupled to the motor, the accelerometer, and the coil magnet. The processor activates the coil magnet to control a balance of the plurality of fan blades in response to an amount of vibration measured by the accelerometer that exceeds a threshold.
    Type: Application
    Filed: January 19, 2018
    Publication date: October 29, 2020
    Inventors: AI-TSUNG LI, CHAO-WEN CHENG
  • Publication number: 20200339412
    Abstract: An embodiment is a MEMS device including a first MEMS die having a first cavity at a first pressure, a second MEMS die having a second cavity at a second pressure, the second pressure being different from the first pressure, and a molding material surrounding the first MEMS die and the second MEMS die, the molding material having a first surface over the first and the second MEMS dies. The device further includes a first set of electrical connectors in the molding material, each of the first set of electrical connectors coupling at least one of the first and the second MEMS dies to the first surface of the molding material, and a second set of electrical connectors over the first surface of the molding material, each of the second set of electrical connectors being coupled to at least one of the first set of electrical connectors.
    Type: Application
    Filed: July 8, 2020
    Publication date: October 29, 2020
    Inventors: Chun-Wen Cheng, Jung-Huei Peng, Shang-Ying Tsai, Hung-Chia Tsai, Yi-Chuan Teng
  • Patent number: 10818794
    Abstract: A semiconductor structure and a method of fabricating the semiconductor structure are provided. The semiconductor structure includes a substrate; a metal gate structure on the substrate; and a spacer next to the metal gate structure having a skirting part extending into the metal gate structure and contacting the substrate. The metal gate structure includes a high-k dielectric layer and a metal gate electrode on the high-k dielectric layer.
    Type: Grant
    Filed: July 15, 2019
    Date of Patent: October 27, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Che-Cheng Chang, Tung-Wen Cheng, Chang-Yin Chen, Mu-Tsang Lin
  • Patent number: 10811075
    Abstract: A method for performing access control regarding quality of service (QoS) optimization of a memory device with aid of machine learning an associated apparatus (e.g. the memory device and a controller thereof) are provided. The method may include: performing background scan on the NV memory to collect valley information of voltage distribution of memory cells within the NV memory, and performing machine learning based on a reinforcement learning model according to the valley information, in order to prepare a plurality of tables through the machine learning based on the reinforcement learning model in advance, for use of reading data from the NV memory; during a first time interval, writing first data and read the first data using a first table within the plurality of tables; and during a second time interval, reading the first data using a second table within the plurality of tables.
    Type: Grant
    Filed: August 19, 2019
    Date of Patent: October 20, 2020
    Assignee: Silicon Motion, Inc.
    Inventors: Chiao-Wen Cheng, Zhen-U Liu
  • Patent number: 10811263
    Abstract: A method for forming a semiconductor device structure is provided. The method includes disposing a semiconductor substrate in a physical vapor deposition (PVD) chamber and introducing a plasma-forming gas into the PVD chamber. The plasma-forming gas is an oxygen-containing gas. The method also includes applying a radio frequency (RF) power by a power source to a metal target in the PVD chamber to excite the plasma-forming gas to generate plasma. The metal target is directly electrically coupled to the power source. The method further includes directing the plasma towards the metal target positioned in the PVD chamber such that an etch stop layer is formed over the semiconductor substrate.
    Type: Grant
    Filed: December 30, 2019
    Date of Patent: October 20, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ya-Ling Lee, Shing-Chyang Pan, Keng-Chu Lin, Wen-Cheng Yang, Chih-Tsung Lee, Victor Y. Lu
  • Patent number: 10811285
    Abstract: A multi-shield plate includes a plate having a substantially flat upper surface and a substantially flat lower surface, a plurality of first windows formed in the plate and extending through the plate from the upper surface to the lower surface, and a plurality of vapor shields mounted to the plate, each vapor shield of the plurality of vapor shields configured to prevent passage of a vapor through a corresponding window of the plurality of windows. The multi-shield plate includes an aperture formed in the plate, the aperture aligned with a first window of the plurality of windows along an axis corresponding to the upper surface.
    Type: Grant
    Filed: October 31, 2017
    Date of Patent: October 20, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ping-Tse Lin, Chun-Chih Lin, Wen-Cheng Lien, Monica Ho
  • Patent number: 10811516
    Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a semiconductor substrate and a gate electrode over the semiconductor substrate. The semiconductor device structure also includes a source/drain structure adjacent to the gate electrode. The semiconductor device structure further includes a spacer element over a sidewall of the gate electrode, and the spacer element has an upper portion having a first exterior surface and a lower portion having a second exterior surface. Lateral distances between the first exterior surface and the sidewall of the gate electrode are substantially the same. Lateral distances between the second exterior surface and the sidewall of the gate electrode increase along a direction from a top of the lower portion towards the semiconductor substrate.
    Type: Grant
    Filed: December 21, 2018
    Date of Patent: October 20, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Bo-Feng Young, Che-Cheng Chang, Mu-Tsang Lin, Tung-Wen Cheng, Zhe-Hao Zhang
  • Patent number: 10804396
    Abstract: In some embodiments, a field effect transistor (FET) structure comprises a body structure, dielectric structures, a gate structure and a source or drain region. The gate structure is formed over the body structure. The source or drain region is embedded in the body structure beside the gate structure, and abuts and is extended beyond the dielectric structure. The source or drain region contains stressor material with a lattice constant different from that of the body structure. The source or drain region comprises a first region formed above a first level at a top of the dielectric structures and a second region that comprises downward tapered side walls formed under the first level and abutting the corresponding dielectric structures.
    Type: Grant
    Filed: June 25, 2019
    Date of Patent: October 13, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Che-Cheng Chang, Tung-Wen Cheng, Zhe-Hao Zhang, Yung Jung Chang
  • Patent number: 10802126
    Abstract: An electronic device including a sound receiver and a processor is provided. The sound receiver receives a sound signal provided by a sound generator. When the processor determines that an obstacle is blocked between the electronic device and the fixed device, the processor estimates a virtual position of the electronic device at a current time according to previous movement information and a previous position of the electronic device. The virtual position has a shortest path between a boundary position of the obstacle and the sound generator. The processor obtains a first relative distance between the electronic device and the boundary position according to the sound signal received by the sound receiver and the boundary position. The processor calculates a relative velocity and a relative acceleration of the electronic device relative to the fixed device at the current time according to the sound signal and the first relative distance.
    Type: Grant
    Filed: May 21, 2018
    Date of Patent: October 13, 2020
    Assignee: Acer Incorporated
    Inventors: Po-Jen Tu, Jia-Ren Chang, Kai-Meng Tzeng, Wen-Cheng Hsu, Hsing-Chu Wu
  • Publication number: 20200322733
    Abstract: AMEMS microphone includes a backplate that has a plurality of open areas, and a diaphragm spaced apart from the backplate. The diaphragm is deformable by sound waves to cause gaps between the backplate and the diaphragm being changed at multiple locations on the diaphragm. The diaphragm includes a plurality of anchor areas, located near a boundary of the diaphragm, which is fixed relative to the backplate. The diaphragm also includes multiple vent valves. Examples of the vent valve include a wing vent valve and a vortex vent valve.
    Type: Application
    Filed: June 22, 2020
    Publication date: October 8, 2020
    Inventors: Chun-Wen Cheng, Chia-Hua Chu, Chun Yin Tsai
  • Publication number: 20200317506
    Abstract: Representative methods for sealing MEMS devices include depositing insulating material over a substrate, forming conductive vias in a first set of layers of the insulating material, and forming metal structures in a second set of layers of the insulating material. The first and second sets of layers are interleaved in alternation. A dummy insulating layer is provided as an upper-most layer of the first set of layers. Portions of the first and second set of layers are etched to form void regions in the insulating material. A conductive pad is formed on and in a top surface of the insulating material. The void regions are sealed with an encapsulating structure. At least a portion of the encapsulating structure is laterally adjacent the dummy insulating layer, and above a top surface of the conductive pad. An etch is performed to remove at least a portion of the dummy insulating layer.
    Type: Application
    Filed: June 22, 2020
    Publication date: October 8, 2020
    Inventors: Yu-Chia Liu, Chia-Hua Chu, Chun-Wen Cheng
  • Publication number: 20200320157
    Abstract: A Chromebook computer and a web virtual reality (WebVR) execution method thereof are provided. The WebVR execution method of Chromebook computer includes the following steps. A Chrome Extension informs a WebVR website that the Chromebook computer has a WebVR execution capability. A Chrome APP obtains an inertial measurement unit (IMU) data of a head-mounted display (HMD). The Chrome APP transmits the IMU data to the Chrome Extension. The Chrome Extension transmits the IMU data to the WebVR website through a WebVR application programming interface (API). The Chrome Extension captures a left eye frame and a right eye frame from the WebVR website through the WebVR API. The Chrome Extension projects the left eye frame and the right eye frame to the HMD.
    Type: Application
    Filed: March 27, 2020
    Publication date: October 8, 2020
    Applicant: Acer Incorporated
    Inventors: Shih-Hao LIN, Chao-Kuang YANG, Wen-Cheng HSU
  • Publication number: 20200318144
    Abstract: Disclosures of the present invention describe a method and device for stimulating biological fermentation. In the present invention, a light source is particularly used for stimulating a biological fermentation by supplying an illumination light with a color temperature in a range between 1600K and 4300K. Moreover, a variety of experimental data have proved that, the illumination light is indeed helpful in stimulating the biological fermentation occurring in an object under fermentation so as to enhance a rate of ethanol fermentation. It is worth further explaining that, the method and the device for stimulating biological fermentation can be applied in any one type of fermentation apparatus.
    Type: Application
    Filed: April 25, 2019
    Publication date: October 8, 2020
    Inventors: JWO-HUEI JOU, CHENG-CHIEH LO, MING-RUEI JIANG, YU-CHEN LAI, CHUN-HO CHENG, TING-WEN CHENG
  • Publication number: 20200321196
    Abstract: A dry etching apparatus includes a process chamber, a stage, a gas supply device and a plasma generating device. The stage is in the process chamber and is configured to support a wafer, wherein the wafer has a center region and a periphery region surrounding the center region. The gas supply device is configured to supply a first flow of an etching gas to the center region and supply a second flow of the etching gas to the periphery region. The plasma generating device is configured to generate plasma from the etching gas.
    Type: Application
    Filed: June 22, 2020
    Publication date: October 8, 2020
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chang-Yin CHEN, Tung-Wen CHENG, Che-Cheng CHANG, Jr-Jung LIN, Chih-Han LIN
  • Patent number: 10796109
    Abstract: A card insertion structure suited for a portable electronic device is provided. The portable electronic device includes a housing. The card insertion structure includes a base disposed in the housing, a pressing member movably disposed on the base, and a plastic spring strip disposed on the base. A portion of the pressing member is exposed out of the housing. The plastic spring strip leans against the pressing member and the base. A force supplied via an insertion of an electronic card drives the pressing member to deform the plastic spring strip, and after the electronic card passing by the pressing member and being inserted into the card insertion structure between the base and the housing, the pressing member is released and is restored by resilience of the plastic spring strip, and the electronic card is fixed with the housing by the pressing member.
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: October 6, 2020
    Assignee: PEGATRON CORPORATION
    Inventors: Guo-Long Guo, Ho-Ching Huang, Wen-Cheng Tsai
  • Patent number: 10797176
    Abstract: An improved conductive feature for a semiconductor device and a technique for forming the feature are provided. In an exemplary embodiment, the semiconductor device includes a substrate having a gate structure formed thereupon. The gate structure includes a gate dielectric layer disposed on the substrate, a growth control material disposed on a side surface of the gate structure, and a gate electrode fill material disposed on the growth control material. The gate electrode fill material is also disposed on a bottom surface of the gate structure that is free of the growth control material. In some such embodiments, the gate electrode fill material contacts a first surface and a second surface that are different in composition.
    Type: Grant
    Filed: October 22, 2018
    Date of Patent: October 6, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Nan Wu, Shiu-Ko JangJian, Chun Che Lin, Wen-Cheng Hsuku