Abstract: A fan module includes a casing, a fan, and two vibration absorption assemblies. The casing has an accommodating space. The fan is located in the accommodating space and keeps a distance from the casing. Each of the two vibration absorption assemblies includes two first vibration absorption components and a second vibration absorption component. The two first vibration absorption components are respectively in contact with the fan and separated from the casing, respectively. The second vibration absorption component is connected with two first vibration absorption components and the casing, respectively. The first vibration absorption components and the second vibration absorption components are adapted for absorbing the vibration waves having different frequency ranges.

Abstract: One method includes forming an anti-ferromagnetic layer on a substrate. A ferromagnetic layer may be formed on the anti-ferromagnetic layer. The ferromagnetic layer includes a first, second and third portions where the second portion is located between the first and third portions. A first ion irradiation is performed to only one portion of the ferromagnetic layer. A second ion irradiation is performed to another portion of the ferromagnetic layer.

Abstract: A device is described in one embodiment that includes a micro-electro-mechanical systems (MEMS) device disposed on a first substrate and a semiconductor device disposed on a second substrate. A bond electrically connects the MEMS device and the semiconductor device. The bond includes an interface between a first bonding layer including silicon on the first substrate and a second bonding layer including aluminum on the second substrate. The physical interface between the aluminum and silicon (e.g., amorphous silicon) can provide an electrical connection.

Abstract: In an exemplary RGBW display apparatus, a plurality of four-color image output signals and a plurality of mapping scale ratios are generated according to a plurality of three-color image input signals. Furthermore, a backlight output intensity outputted from a backlight module is dynamically adjusted according to the mapping scale ratios and a white color signal adjust ratio is generated. In addition, a white color signal in each of the four-color image output signals is adjusted to be an updated white color signal according to the white color signal adjust ratio.

Abstract: A device includes a Micro-Electro-Mechanical System (MEMS) wafer having a MEMS device therein. The MEMS device includes a movable element, and first openings in the MEMS wafer. The movable element is disposed in the first openings. A carrier wafer is bonded to the MEMS wafer. The carrier wafer includes a second opening connected to the first openings, wherein the second opening includes an entry portion extending from a surface of the carrier wafer into the carrier wafer, and an inner portion wider than the entry portion, wherein the inner portion is deeper in the carrier wafer than the entry portion.

Abstract: The present disclosure provides a bio-field effect transistor (BioFET) device and methods of fabricating a BioFET and a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device includes a gate structure disposed on a first surface of a substrate and an interface layer formed on a second surface of the substrate. The substrate is thinned from the second surface to expose a channel region before forming the interface layer.

Abstract: An audio processing apparatus is provided. A microphone array includes microphone units. Amplifier modules each receives and amplifies an input signal from one microphone unit to generate amplified signals. A compensation module receives adjusted gains corresponding to the amplifier modules, obtains a gain difference between the adjusted gains, and adjusts one amplified signal according to the gain difference to obtain a compensated signal.

Abstract: The present disclosure provides a biological field effect transistor (BioFET) device testing and processing methods, system and apparatus. A wafer-level bio-sensor processing tool includes a wafer stage, an integrated electro-microfluidic probe card, and a fluid supply and return. The integrated electro-microfluidic probe card includes a fluidic mount that may be transparent, a microfluidic channels in the fluidic mount, at least one microfluidic probe and a number of electronic probe tips at the bottom of the fluidic mount, fluidic and electronic input and output ports on the sides of the fluidic mount, and at least one handle lug on the fluidic mount. The method includes aligning a wafer, mounting the integrated electro-microfluidic probe card, flowing a test fluid, and measuring electrical properties. The tool may also be used for stamping or printing a fluid in the device area on the wafer.

Abstract: An exemplary cooling fan includes a housing having an air inlet and an air outlet opposite to the air inlet, a rotor received in the housing, and a stator received in the housing and rotatably supporting the rotor. The rotor includes a hub, blades extending outwardly from an outer periphery of the hub, and flanges slantwise extending from top edges of end portions of the blades. In operation of the cooling fan, air located at an outside of the cooling fan enters the air inlet and flows towards the blades and along the flanges thereby pressing the rotor towards a bottom of the stator along an axial direction of the cooling fan, and the air subsequently flows out of the cooling fan via the air outlet.

Abstract: MEMS devices and methods for utilizing sacrificial layers are provided. An embodiment comprises forming a first sacrificial layer and a second sacrificial layer over a substrate, wherein the second sacrificial layer acts as an adhesion layer. Once formed, the first sacrificial layer and the second sacrificial layer are patterned such that the second sacrificial layer is undercut to form a step between the first sacrificial layer and the second sacrificial layer. A top capacitor electrode is formed over the second sacrificial layer, and the first sacrificial layer and the second sacrificial layer are removed in order to free the top capacitor electrode.

Abstract: A carrying assembly which may be detachably secured to a housing of an electronic device is disclosed. The carrying assembly includes a body and a positioning member. The body includes an opening and a first positioning portion positioned on a first surface of the body. The positioning member includes a second positioning portion and a top portion connected thereto. The second positioning portion detachably engages with the first positioning portion. The top portion protrudes from a second surface of the body through the opening, the second surface being opposite the first surface. When the top portion is pressed, the second positioning portion is separated from the first positioning portion, and a relative position between the body and the positioning member may be adjusted, thereby adjusting the length of the belt.

Abstract: A light detector includes a first light sensor and a second light sensor to detect incident light. A Ge film is disposed over the first light sensor to pass infra-red (IR) wavelength light and to block visible wavelength light. The Ge film does not cover the second light sensor.

Abstract: A submount and a manufacturing method thereof are provided. The submount, on which at least a semiconductor die is disposed, is mounted on a circuit board. The submount includes a substrate made of a conductive material or a semiconducting material, a plurality of conductive film patterns, and an insulating film pattern. A surface of the substrate includes a die-bonding area and a plurality of conductive areas. The conductive film patterns are individually distributed in the respective conductive areas. The insulating film pattern is disposed between the conductive film pattern and the insulating film pattern, but is not disposed in the die-bonding area. Furthermore, the semiconductor die is disposed in the die-bonding area and is electrically connected with the conductive film patterns. Because the insulating film pattern is not being disposed in the die-bonding area of the submount, the submount structure has improved heat transfer efficiency.

Abstract: A semiconductor device is provided. The device includes a semiconductor substrate and a gate structure thereon. A well region is formed in the semiconductor substrate. A drain region and a source region are respectively formed in the semiconductor substrate inside and outside of the well region. At least one set of the first and second heavily doped regions is formed in the well region between the drain region and the source region, wherein the first and second heavily doped regions are stacked vertically from bottom to top and have a doping concentration which is larger than that of the well region. The semiconductor substrate and the first heavily doped region have a first conductivity type and the well region and the second heavily doped region have a second conductivity type. A method for fabricating a semiconductor device is also disclosed.

Abstract: A semiconductor device including a semiconductor substrate of a first conductivity type and an epitaxial structure of the first conductivity type disposed thereon is disclosed. A well region of a second conductivity type is formed in the epitaxial structure and the semiconductor substrate. A drain region and a source region are respectively formed in the epitaxial structure inside and outside of the well region. At least one set of the first and second heavily doped regions is formed in the well region between the drain region and the source region, wherein the first and second heavily doped regions of the first and second conductivity type, respectively, are stacked vertically from bottom to top and have a doping concentration which is larger than that of the well region. A gate structure is disposed on the epitaxial structure. A method for fabricating a semiconductor device is also disclosed.

Abstract: An embodiment includes a low-latency mechanism for performing a checkpoint on a distributed application. More specifically, an embodiment of the invention includes processing a first application on a compute node, which is included in a cluster, to produce first computed data and then storing the first computed data in volatile memory included locally in the compute node; halting the processing of the first application, based on an initiated checkpoint, and storing first state data corresponding to the halted first application in the volatile memory; storing the first state information and the first computed data in non-volatile memory included locally in the compute node; and resuming processing of the halted first application and then continuing the processing the first application to produce second computed data while simultaneously pulling the first state information and the first computed data from the non-volatile memory to an input/output (IO) node.

Abstract: A semiconductor device is provided. The device includes a semiconductor substrate and a gate structure thereon. A well region is formed in the semiconductor substrate. A drain region and a source region are respectively formed in the semiconductor substrate inside and outside of the well region. At least one set of the first and second heavily doped regions is formed in the well region between the drain region and the source region, wherein the first and second heavily doped regions are stacked vertically from bottom to top and have a doping concentration which is larger than that of the well region. The semiconductor substrate and the first heavily doped region have a first conductivity type and the well region and the second heavily doped region have a second conductivity type. A method for fabricating a semiconductor device is also disclosed.

Abstract: The present disclosure provides a method of fabricating a micro-electro-mechanical systems (MEMS) device. In an embodiment, a method includes providing a substrate including a first sacrificial layer, forming a micro-electro-mechanical systems (MEMS) structure above the first sacrificial layer, and forming a release aperture at substantially a same level above the first sacrificial layer as the MEMS structure. The method further includes forming a second sacrificial layer above the MEMS structure and within the release aperture, and forming a first cap over the second sacrificial layer and the MEMS structure, wherein a leg of the first cap is disposed between the MEMS structure and the release aperture. The method further includes removing the first sacrificial layer, removing the second sacrificial layer through the release aperture, and plugging the release aperture. A MEMS device formed by such a method is also provided.

Abstract: A fan structure includes a casing, a fan, and two elastic members. The casing has an accommodation space. The fan is located in the accommodation space. The fan has a first side and a second side opposite to each other. One of the two elastic members is sandwiched between the casing and the first side of the fan. The other one of the two elastic members is sandwiched between the casing and the second side of the fan. The two elastic members normally keep the fan away from the casing, so as to make the fan contact the casing through the two elastic members, thereby achieving a damping effect.

Abstract: A power-on reset circuit is disclosed. The power-on reset circuit includes a first resistor; a first transistor, including a first terminal coupled to a second terminal of the first resistor, and a control terminal for receiving a reference voltage; a second resistor, including a first terminal coupled to a second terminal of the first transistor; a second transistor, including a first terminal coupled to a second terminal of the first resistor, and a control terminal coupled to a second terminal of the second transistor and utilized for receiving an input voltage; and a comparator, including a first input terminal for receiving a comparison voltage, and a second input terminal for receiving the reference voltage, for generating a power-on reset signal according to the comparison voltage and the reference voltage.