Abstract: A measuring device for measuring a response speed of a display panel is provided. The measuring device includes a microcontroller and at least one photo sensor. The microcontroller provides a control command, according to which a display controller of the display panel provides test pattern to the display panel. The photo sensor senses a test frame displayed corresponding to the test pattern by the display panel, and provides a corresponding sensing signal associated with brightness and a response signal. According to the response signal, the response speed of the display panel is calculated.

Abstract: The present disclosure provides one embodiment of a stacked semiconductor device. The stacked semiconductor device includes a first substrate; a first bond pad over the first substrate; a second substrate including a second electrical device fabricated thereon; a second bond pad over the second electrical device over the second substrate, the second bond pad electrically connecting to the second electrical device; a second insulation layer over the second bond pad having a top surface, the second insulation layer being bonded toward the first bond pad of the first substrate; and a through-substrate-via (“TSV”) extending from a surface opposite to the first bond pad through the first substrate and through the top surface of the second insulation layer to the second bond pad.

Abstract: A method for polishing Through-Silicon Via (TSV) wafers is provided. The method comprises a step of subjecting the surface of a TSV wafer to a polishing treatment with a polishing composition containing an organic alkaline compound, an oxidizing agent selected from sodium chlorite and/or potassium bromate, silicon oxide abrasive particles, and a solvent to simultaneously remove Si and conductive materials at their respective removal rates. By using the method of this invention, Si and conductive materials can be simultaneously polished at higher removal rates to significantly save the necessary working-hour costs for polishing TSV wafers. A polishing composition used in the above method is also provided.

Abstract: The present disclosure provides methods of fabricating a micro-electro-mechanical systems (MEMS) switch. The methods include providing a substrate, forming a first dielectric layer disposed above the substrate, forming a bump above the first dielectric layer, providing a movable member including a top actuation electrode, and forming at least one support member that includes the first dielectric layer and is directly below the top actuation electrode. The top actuation electrode is electrically coupled to the bump.

Abstract: The invention provides a chip package and a fabrication method thereof. In one embodiment, the chip package includes: a substrate having a semiconductor device and a conductive pad thereon; an insulator ring filling a trench formed in the substrate, wherein the insulator ring surrounds an intermediate layer below the conductive pad; and a conductive layer disposed below a backside of the substrate and electrically connected to the conductive pad.

Abstract: A method embodiment includes providing a MEMS wafer comprising an oxide layer, a MEMS substrate, a polysilicon layer. A carrier wafer comprising a first cavity formed using isotropic etching is bonded to the MEMS, wherein the first cavity is aligned with an exposed first portion of the polysilicon layer. The MEMS substrate is patterned, and portions of the sacrificial oxide layer are removed to form a first and second MEMS structure. A cap wafer including a second cavity is bonded to the MEMS wafer, wherein the bonding creates a first sealed cavity including the second cavity aligned to the first MEMS structure, and wherein the second MEMS structure is disposed between a second portion of the polysilicon layer and the cap wafer. Portions of the carrier wafer are removed so that first cavity acts as a channel to ambient pressure for the first MEMS structure.

Abstract: A semiconductor package structure and a manufacturing method thereof are provided. The semiconductor package structure includes a semiconductor die, a thermally conductive film, a substrate, a plurality of electrically conductive film patterns, and at least one insulator. The thermally conductive film is disposed on the bottom of the semiconductor die. The substrate is substantially comprised of the electrically conductive material or semiconductor material. Furthermore, a first hole is disposed on and passed all the way through the substrate, and the semiconductor die is disposed in the first hole. The electrically conductive film patterns are disposed on the substrate, and not contacting with each other. In addition, the insulator is connected between the semiconductor die and the substrate.

Abstract: An integrated semiconductor device for manipulating and processing bio-entity samples is disclosed. The device includes a microfluidic channel that is coupled to fluidic control circuitry, a photosensor array coupled to sensor control circuitry, an optical component aligned with the photosensor array to manipulate a light signal before the light signal reaches the photosensor array, and a microfluidic grid coupled to the microfluidic channel and providing for transport of bio-entity sample droplets by electrowetting. The device further includes logic circuitry coupled to the fluidic control circuitry and the sensor control circuitry, with the fluidic control circuitry, the sensor control circuitry, and the logic circuitry being formed on a first substrate.

Abstract: A smart alarm plug, socket, wall-mounted socket or connector includes a casing, a normally-open temperature control switch, a normally-closed temperature control switch and an alarm device. The casing is provided with a live wire pin, a neutral wire pin, an earth wire pin, and connecting core wires. The heat resistance value of the normally-closed temperature control switch is greater than the heat resistance value of the normally-open temperature control switch. When the temperature of the power wire is abnormal, the normally-open temperature control switch will be closed for the alarm device to connect with the power, such that the alarm device sends an alarm signal to warn the user to examine the circuit, providing a warning effect. When the temperature is over the preset value, the normally-closed temperature control switch will be opened to cut off power supply, achieving a fire alarm effect.

Abstract: A testing apparatus and a testing method are disclosed. The testing apparatus has a testing assembly. The testing assembly includes a first plate body, a testing paper, and a second plate body. The first plate body has a plurality of pins; the testing paper includes a plurality of first through holes whose locations correspond to the plurality of pins. The second plate body connects with the testing paper and has a plurality of second through holes whose locations correspond to the first through holes for allowing the plurality of pins to pass through the corresponding through holes. A sprayer is located, beneath the second plate body and sprays flux onto the inner wall of each second through hole, and a plurality of wet marks are left on the testing paper for interpretation of the coating quality.

Abstract: The present invention provides a material distribution system and method thereof, comprising first, second and third conveyors, first, second, third and fourth material distribution paths, first and second material distribution rockers, and a movable material-distributing guide plate. Material conveyed on the second conveyor is delivered to the first or second material distribution rocker by switching the movable material-distributing guide plate, material conveyed on the first or second conveyor is delivered to the first or second material distribution path by switching the first material distribution rocker, and material conveyed on the second or third conveyor is delivered to the third or fourth material distribution path by switching the second material distribution rocker.

Abstract: A magnetic assembly is formed by a Printed Circuit Board (PCB) and a cover. A plurality of magnetic elements is electrically disposed on the PCB, and the magnetic elements are connected to one another through an electric circuit on the PCB. An accommodation space is formed on the cover for receiving the magnetic elements. During the manufacturing of the magnetic assembly, a cover with an appropriate space is selected according to the size, quantity, and specification type of the magnetic elements. After the two components are assembled, adhesive is injected into the cover, so that the cover and the PCB are fixedly disposed, and the elements in the accommodation space are protected. Therefore, in a process of manufacturing the magnetic assembly, covers with different accommodation spaces are selected for collocation according to requirements of the assembled electrical elements.

Abstract: A dynamic hard disk mapping method and a server using the same are disclosed. The server includes a first motherboard, a second motherboard, a first disk group corresponding to the first motherboard, and a second disk group corresponding to the second motherboard. In the dynamic hard disk mapping method, at first, a disk redistributing instruction is received and stored. Thereafter, a reset instruction is received and performed. Then, the number of hard disks of the first disk group and the number of hard disks of the second disk group are summed up to obtain a total hard disk number N, wherein N is a positive integer greater than zero. Thereafter, the disk redistributing instruction is read, and a redistribution computation is performed in accordance with the disk redistributing instruction to obtain a third disk group corresponding to the first motherboard and a fourth disk group corresponding to the second motherboard.

Abstract: The present disclosure provides biochips and methods of fabricating biochips. The method includes combining three portions: a transparent substrate, a first substrate with microfluidic channels therein, and a second substrate. Through-holes for inlet and outlet are formed in the transparent substrate or the second substrate. Various non-organic landings with support medium for bio-materials to attach are formed on the first substrate and the second substrate before they are combined. In other embodiments, the microfluidic channel is formed of an adhesion layer between a transparent substrate and a second substrate with landings on the substrates.

Abstract: The present disclosure provides a method of fabricating a micro-electro-mechanical systems (MEMS) device. In an embodiment, a method includes providing a substrate including a first sacrificial layer, forming a micro-electro-mechanical systems (MEMS) structure above the first sacrificial layer, and forming a release aperture at substantially a same level above the first sacrificial layer as the MEMS structure. The method further includes forming a second sacrificial layer above the MEMS structure and within the release aperture, and forming a first cap over the second sacrificial layer and the MEMS structure, wherein a leg of the first cap is disposed between the MEMS structure and the release aperture. The method further includes removing the first sacrificial layer, removing the second sacrificial layer through the release aperture, and plugging the release aperture. A MEMS device formed by such a method is also provided.

Abstract: The present disclosure provides methods of fabricating a biochip. The biochip includes a fluidic part, having through-substrate holes as inlets and outlets, and a sensing part bonded together using a bonding material. One or both of the parts has microfluidic channel patterns and one or more patterned surface modification layers formed using different methods to provide surface property for binding bioreceptors and for flowing analytes. The patterning includes lithography, etching, washing, selective depositing using printing or self-assembly of surface chemistry.

Abstract: A method embodiment for forming a micro-electromechanical (MEMS) device includes providing a MEMS wafer, wherein a portion of the MEMS wafer is patterned to provide a first membrane for a microphone device and a second membrane for a pressure sensor device. A carrier wafer is bonded to the MEMS wafer, and the carrier wafer is etched to expose the first membrane for the microphone device to an ambient environment. A MEMS substrate is patterned and portions of a first sacrificial layer are removed of the MEMS wafer to form a MEMS structure. A cap wafer is bonded to a side of the MEMS wafer opposing the carrier wafer to form a first sealed cavity including the MEMS structure. A second sealed cavity and a cavity exposed to an ambient environment on opposing sides of the second membrane for the pressure sensor device are formed.

Abstract: A wireless intraocular pressure monitoring device includes reflecting and detecting modules. The reflecting module includes a soft contact lens having a curvature corresponding to that of a cornea while worn. A metal layer is embedded in and deformable with the soft contact lens. The detecting module includes two waveguides, an oscillator, and a converting unit. The oscillator is operable to generate oscillation signals having a frequency dependent on an equivalent impedance of the waveguides such that the equivalent impedance corresponds to intraocular pressure. The converting unit is operable for receiving and converting the oscillation signals into an output signal corresponding to the intraocular pressure.

Abstract: A method embodiment includes providing a micro-electromechanical (MEMS) wafer including a polysilicon layer having a first and a second portion. A carrier wafer is bonded to a first surface of the MEMS wafer. Bonding the carrier wafer creates a first cavity. A first surface of the first portion of the polysilicon layer is exposed to a pressure level of the first cavity. A cap wafer is bonded to a second surface of the MEMS wafer opposite the first surface of the MEMS wafer. The bonding the cap wafer creates a second cavity comprising the second portion of the polysilicon layer and a third cavity. A second surface of the first portion of the polysilicon layer is exposed to a pressure level of the third cavity. The first cavity or the third cavity is exposed to an ambient environment.

Abstract: A semiconductor element and a manufacturing method of the same are provided. The semiconductor element includes a substrate, a plurality of doping strips, a memory material layer, a plurality of conductive damascene structures, and a dielectric structure. The doping strips are formed in the substrate. The memory material layer is formed on the substrate, and the memory material layer comprises a memory area located on two sides of the doping strips. The conductive damascene structures are formed on the memory material layer. The dielectric structure is formed on the doping strips and between the conductive damascene structures. The conductive damascene structures are extended in a direction perpendicular to a direction which the doping strips are extended in.