Patents by Inventor Wen Cheng

Wen Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140269265
    Abstract: In an example embodiment, there is disclosed an apparatus comprising a plurality of ports and routing logic coupled with the plurality of ports. The routing logic obtains data representative of a first port configuration for the plurality of ports, the first port configuration comprises data representative of a status for individual ports selected from the plurality of ports, the status indicating whether an individual port selected from the plurality of ports is an open port, an alternate port, or a failed port. The routing logic forwards data in accordance with the first port configuration. The routing logic also obtains data representative of an alternate port configuration for the plurality of ports, the alternate port configuration is to be employed upon determining a predefined link has failed. The alternate configuration comprising a new status for individual ports selected from the plurality of ports.
    Type: Application
    Filed: May 29, 2014
    Publication date: September 18, 2014
    Applicant: Cisco Technology, Inc.
    Inventors: Linda Tin-Wen Cheng, Krishna Kumar Vavilala
  • Publication number: 20140267442
    Abstract: A method for converting input RGB data signals to output RGBW data signals for use in an OLED display is disclosed. In the OLED display, each pixel has three color sub-pixels in RGB and one W sub-pixel. Input RGB data signals in signal space are normalized and converted into input data in luminance space. A baseline adjustment level is determined from the input data and is used to compute baseline adjusted data in luminance space. After being converted from luminance space into signal space, baseline adjusted data in RGBW are represented by N binary bits presented to the four sub-pixels. To suit the color characteristics of the display, color-temperature correction to the output signals is also carried out. In luminance space, the maximum color-temperature corrected output data fall within the range of 0.4/k and 0.5/k, with k being the ratio of W sub-pixel area to the color sub-pixel area.
    Type: Application
    Filed: March 14, 2013
    Publication date: September 18, 2014
    Applicant: AU OPTRONICS CORPORATION
    Inventors: HUI-FENG LIN, SHENG-WEN CHENG, MING-SHENG LAI, LU-YAO WU
  • Publication number: 20140273281
    Abstract: The present disclosure provides biochips and methods of fabricating biochips. The method includes combining three portions: a transparent substrate, a first substrate with microfluidic channels therein, and a second substrate. Through-holes for inlet and outlet are formed in the transparent substrate or the second substrate. Various non-organic landings with support medium for bio-materials to attach are formed on the first substrate and the second substrate before they are combined. In other embodiments, the microfluidic channel is formed of an adhesion layer between a transparent substrate and a second substrate with landings on the substrates.
    Type: Application
    Filed: March 13, 2013
    Publication date: September 18, 2014
    Inventors: Chia-Hua Chu, Allen Timothy Chang, Ching-Ray Chen, Yi-Hsien Chang, Yi-Shao Liu, Chun-Ren Cheng, Chun-Wen Cheng
  • Publication number: 20140264474
    Abstract: A stacked semiconductor device includes a CMOS device and a MEMS device. The CMOS device includes a multilayer interconnect with metal elements disposed over the multilayer interconnect. The MEMS device includes metal sections with a first dielectric layer disposed over the metal sections. A cavity in the first dielectric layer exposes portions of the metal sections. A dielectric stop layer is disposed at least over the interior surface of the cavity. A movable structure is disposed over a front surface of the first dielectric layer and suspending over the cavity. The movable structure includes a second dielectric layer over the front surface of the first dielectric layer and suspending over the cavity, metal features over the second dielectric layer, and a flexible dielectric membrane over the metal features. The CMOS device is bonded to the MEMS device with the metal elements toward the flexible dielectric membrane.
    Type: Application
    Filed: May 30, 2013
    Publication date: September 18, 2014
    Inventors: Chia-Hua Chu, Chun-Wen Cheng
  • Publication number: 20140264653
    Abstract: A method embodiment includes providing a MEMS wafer. A portion of the MEMS wafer is patterned to provide a first membrane for a microphone device and a second membrane for a pressure sensor device. A carrier wafer is bonded to the MEMS wafer. The carrier wafer is etched to expose the first membrane and a first surface of the second membrane to an ambient environment. A MEMS structure is formed in the MEMS wafer. A cap wafer is bonded to a side of the MEMS wafer opposing the carrier wafer to form a first sealed cavity including the MEMS structure and a second sealed cavity including a second surface of the second membrane for the pressure sensor device. The cap wafer comprises an interconnect structure. A through-via electrically connected to the interconnect structure is formed in the cap wafer.
    Type: Application
    Filed: July 31, 2013
    Publication date: September 18, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Wen Cheng, Chia-Hua Chu
  • Publication number: 20140264467
    Abstract: The present disclosure provides a bio-field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device includes a substrate, a transistor structure having a treated layer adjacent to the channel region, an isolation layer, and a dielectric layer in an opening of the isolation layer on the treated layer. The dielectric layer and the treated layer are disposed on opposite side of the transistor from a gate structure. The treated layer may be a lightly doped channel layer or a depleted layer.
    Type: Application
    Filed: May 30, 2013
    Publication date: September 18, 2014
    Inventors: Chun-Wen Cheng, Yi-Shao Liu, Fei-Lung Lai, Wei-Cheng Lin, Ta-Chuan Liao, Chien-Kuo Yang
  • Publication number: 20140264468
    Abstract: The present disclosure provides a bio-field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device includes a substrate, a transistor structure, an isolation layer, an interface layer in an opening of the isolation layer, and a metal crown structure over the interface layer. The interface layer and the metal crown structure are disposed on opposite side of the transistor from a gate structure.
    Type: Application
    Filed: August 16, 2013
    Publication date: September 18, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Wen Cheng, Yi-Shao Liu, Fei-Lung Lai
  • Publication number: 20140270272
    Abstract: The present disclosure provides one embodiment of an integrated microphone structure. The integrated microphone structure includes a first silicon substrate patterned as a first plate; a silicon oxide layer formed on one side of the first silicon substrate; a second silicon substrate bonded to the first substrate through the silicon oxide layer such that the silicon oxide layer is sandwiched between the first and second silicon substrates; and a diaphragm secured on the silicon oxide layer and disposed between the first and second silicon substrates, wherein the first plate and the diaphragm are configured to form a capacitive microphone.
    Type: Application
    Filed: August 22, 2013
    Publication date: September 18, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jung-Huei Peng, Chia-Hua Chu, Yao-Te Huang, Chin-Yi Cho, Li-Min Hung, Chun-Wen Cheng
  • Publication number: 20140264744
    Abstract: A stacked semiconductor device includes a first substrate. A multilayer interconnect is disposed over the first substrate. Metal sections are disposed over the multilayer interconnect. First bonding features are over the metal sections. A second substrate has a front surface. A cavity extends from the front surface into a depth D in the second substrate. The cavity has an interior surface. A stop layer is disposed over the interior surface of the cavity. A movable structure is disposed over the front surface of the second substrate and suspending over the cavity. The movable structure includes a dielectric membrane, metal units over the dielectric membrane and a cap dielectric layer over the metal units. Second bonding features are over the cap dielectric layer and bonded to the first bonding features. The second bonding features extend through the cap dielectric layer and electrically coupled to the metal units.
    Type: Application
    Filed: June 12, 2013
    Publication date: September 18, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Hua Chu, Chun-Wen Cheng
  • Patent number: 8835894
    Abstract: The present invention discloses a resistive memory structure and a method for fabricating the same. The memory structure comprises a plurality of memory cells. Each memory cell further comprises two separate upper sub-electrodes fabricated from an upper electrode, two separate lower sub-electrodes fabricated from a lower electrode and intersecting the upper sub-electrodes, and a resistive layer arranged between the upper sub-electrodes and the lower sub-electrodes. Thereby, four sub-memory cells are formed in the intersections of the two upper sub-electrodes, the two lower sub-electrodes, and the resistive layer. Thus is increased the density of a memory structure in an identical area.
    Type: Grant
    Filed: April 20, 2012
    Date of Patent: September 16, 2014
    Assignee: National Applied Research Laboratories
    Inventors: Ming-Daou Lee, ChiaHua Ho, Cho-Lun Hsu, Wen-Cheng Chiu
  • Patent number: 8836630
    Abstract: A source driver including a controller, a plurality of flip-flops, a plurality of shift registers and a plurality of driving channels is provided. The controller extracts control information from an image data stream. Each of the flip-flops respectively receives a corresponding control bit of the control information, and output the corresponding control bit. The shift registers correspond to the flip-flops one by one, and sequentially transmit an enable pulse. Each of the shift registers determines whether to output the enable pulse according to the control bit outputted by the corresponding flip-flop. The driving channels correspond to the shift registers one by one. Each of the driving channels switches an operation state into an enable mode or a disable mode according to the enable pulse outputted by the corresponding shift register.
    Type: Grant
    Filed: January 11, 2013
    Date of Patent: September 16, 2014
    Assignee: Himax Technologies Limited
    Inventors: Jen-Wen Cheng, Chuan-Che Lee, Chin-Tien Chang
  • Publication number: 20140252421
    Abstract: The present disclosure provides a bio-field effect transistor (BioFET) device and methods of fabricating a BioFET and a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device includes a gate structure disposed on a first surface of a substrate and an interface layer formed on a second surface of the substrate. The substrate is thinned from the second surface to expose a channel region before forming the interface layer.
    Type: Application
    Filed: May 19, 2014
    Publication date: September 11, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yi-Shao Liu, Chun-Ren Cheng, Ching-Ray Chen, Yi-Hsien Chang, Fei-Lung Lai, Chun-Wen Cheng
  • Publication number: 20140252513
    Abstract: A Magnetoresistive Tunnel Junction (MTJ) device includes an elongated MTJ structure formed onto a substrate, the MTJ structure including a magnetic reference layer and a tunnel barrier layer. The MTJ device also includes a number of discrete free magnetic regions disposed onto the tunnel barrier layer. The ratio of length to width of the elongated MTJ structure is such that the magnetic field of the magnetic reference layer is pinned in a single direction.
    Type: Application
    Filed: March 9, 2013
    Publication date: September 11, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chwen Yu, Kai-Wen Cheng, Tien-Wei Chiang, Dong Cheng Chen
  • Publication number: 20140252457
    Abstract: A method for contacting MOS devices. First openings in a photosensitive material are formed over a substrate having a top dielectric in a first die area and a second opening over a gate stack in a second die area having the top dielectric, a hard mask, and a gate electrode. The top dielectric layer is etched to form a semiconductor contact while etching at least a portion the hard mask layer thickness over a gate contact area exposed by the second opening. An inter-layer dielectric (ILD) is deposited. A photosensitive material is patterned to generate a third opening in the photosensitive material over the semiconductor contact and a fourth opening inside the gate contact area. The ILD is etched through to reopen the semiconductor contact while etching through the ILD and residual hard mask if present to provide a gate contact to the gate electrode.
    Type: Application
    Filed: May 19, 2014
    Publication date: September 11, 2014
    Applicant: Texas Instruments Incorporated
    Inventors: Fei XIE, Wen Cheng TIEN, Ya Ping CHEN, Li Bin MAN, Kuo Jung CHEN, Yu LIU, Tian Yi ZHANG, Sisi XIE
  • Publication number: 20140252508
    Abstract: An integrated circuit device includes a dielectric layer disposed onto a first substrate, the dielectric layer having a sacrificial cavity formed therein. The circuit also includes a membrane layer formed onto the dielectric layer and suspended over the sacrificial cavity, and a capping substrate bonded to the membrane layer such that a second cavity is formed, the second cavity being connected to the sacrificial cavity though a via formed into the membrane layer.
    Type: Application
    Filed: March 11, 2013
    Publication date: September 11, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Wen Cheng, Chia-Huan Chu
  • Patent number: 8830252
    Abstract: A color-temperature-compensation (CTC) method and applications thereof are provided, and which includes determining intensities of weights of three colors in an inputted three-dimension color signal; if yes, performing a lookup table mechanism to find-out a first set of multi-primary-color (MPC) signal corresponding to the three colors with the same weights, and performing a digital-gamma-correction (DGC) to the first set of MPC signal for providing a first set of CTC signal accordingly; if no, performing the lookup table mechanism to find-out a second set of MPC signal corresponding to the three colors with different weights, and performing the DGC to the second set of MPC signal for providing a second set of CTC signal accordingly; and making at least one same color with the same intensity in the three colors with the same weights and in the three colors with different weights displaying on an MPC display have different brightness.
    Type: Grant
    Filed: December 8, 2010
    Date of Patent: September 9, 2014
    Assignee: Au Optronics Corporation
    Inventors: Yen-Tao Liao, Sheng-Wen Cheng
  • Publication number: 20140247585
    Abstract: A semiconductor lighting apparatus includes an illumination module and a power module. The illumination module includes a supporting member, a semiconductor light-emitting element, an electrode structure and a first connecting member. The semiconductor light-emitting element is mounted on the supporting member and electrically connected with the electrode structure. The first connecting member is mounted on a first side of the supporting member. The power module is configured to connect to the first side of the supporting member, and includes a second connecting member and a driving circuit member. The second connecting member is detachably connected with the first connecting member. The driving circuit member is electrically connected with the second connecting member and electrically connected with the electrode structure to provide a driving power to the semiconductor light-emitting element.
    Type: Application
    Filed: March 1, 2013
    Publication date: September 4, 2014
    Applicant: UNISTARS CORPORATION
    Inventors: Wen-Cheng CHIEN, Shang-Yi WU, Shin-Shien SHIE
  • Publication number: 20140249820
    Abstract: A voice control device has a speech command recognizer, a sensor data processor and a decision making circuit. The speech command recognizer is arranged for performing speech command recognition to output a recognized speech command. The sensor data processor is arranged for processing sensor data generated from at least one auxiliary sensor to generate a detection output. The decision making circuit is arranged for deciding a response of the voice control device according to the recognized speech command and the detection output. The same speech command is able to trigger difference responses according to the detection output (e.g., detected motion). Besides, an adaptive training process may be employed to improve the accuracy of the sensor data processor. Hence, the voice control device may have improved performance of the voice control feature due to a reduce occurrence probability of miss errors and false alarm errors.
    Type: Application
    Filed: November 13, 2013
    Publication date: September 4, 2014
    Applicant: MEDIATEK INC.
    Inventors: Chao-Ling Hsu, Yiou-Wen Cheng, Xin-Wei Shih, Jyh-Horng Lin
  • Patent number: 8823117
    Abstract: The present disclosure provides for magnetic devices and methods of fabricating such a device. In one embodiment, a magnetic device includes a first elliptical pillar of first material layers; a second elliptical pillar concentrically disposed over the first elliptical pillar, the second elliptical pillar includes second material layers. The second elliptical pillar is smaller than the first elliptical pillar in size.
    Type: Grant
    Filed: December 8, 2011
    Date of Patent: September 2, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chewn Yu, Tien-Wei Chiang, Kai-Wen Cheng
  • Patent number: 8823179
    Abstract: An embodiment of the present invention provides an electronic device package, which includes a chip having a first surface and an opposite second surface and a trench extending into a body of the chip along a direction from the second surface to the first surface, wherein a bottom portion of the trench includes at least two contact holes.
    Type: Grant
    Filed: June 13, 2008
    Date of Patent: September 2, 2014
    Inventors: Chia-Lun Tsai, Wen-Cheng Chien, Po-Han Lee, Wei-Ming Chen, Chien-Hung Liu, Ying-Nan Wen