Abstract: A method for operating a machine-to-machine (M2M) device communicating with a gateway includes determining, by the gateway, a timing parameter for synchronizing the machine-to-machine device with the gateway; inserting the timing parameter into a control signal; and transmitting the control signal from the gateway to the machine-to-machine device.

Abstract: A broadcasting system with auto programming and viewer number feedback is provided, which includes a data gathering device, a viewer number calculating device and a program auto-scheduling device. The data gathering device is used to gather a program list and a local viewer number data. The viewer number calculating device is used to calculate a local viewer number. The program auto-scheduling device is used to automatically determine whether to adjust a program schedule of the program list according to a comparison result between the local viewer number and a determined viewer number. Therefore, the broadcasting system of the invention can detect viewer and definitely calculate viewing efficiency within a predetermined status, and can precisely quantify the viewing efficiency using the caught data. Additionally, the broadcasting system of the invention can automatically evaluate whether to reschedule of a program according to the data feedback to conform the predetermined viewer status.

Abstract: The present disclosure provides methods and apparatus for sensor element isolation in a backside illuminated image sensor. In one embodiment, a method of fabricating a semiconductor device includes providing a sensor layer having a frontside surface and a backside surface, forming a plurality of frontside trenches in the frontside surface of the sensor layer, and implanting oxygen into the sensor layer through the plurality of frontside trenches. The method further includes annealing the implanted oxygen to form a plurality of first silicon oxide blocks in the sensor layer, wherein each first silicon oxide block is disposed substantially adjacent a respective frontside trench to form an isolation feature. A semiconductor device fabricated by such a method is also disclosed.

Abstract: The present disclosure uses aluminum residues to fabricate artificial stones. The aluminum residues are obtained from a recycle process of aluminum scrap. The aluminum residues is made into dross and baghouse dust as raw materials for the artificial stones. The artificial stones thus made are improved in characteristics of mechanical strength, hardness, abrasion resistance, flame resistance and anti-oxidation. Hence, the present disclosure reduces impacts to the nature; obtains derived products from recycled aluminum residues; increases commercial income; decreases cost for handling aluminum residues; and saves the use of aluminum oxide, aluminium hydroxide or silicon oxide on making artificial stones. The artificial stones thus made are fit to be used in fields of green material, green construction and green industry.

Abstract: A method for forming contact holes is applied in a transistor array substrate. The transistor array substrate includes first contact pads, second contact pads located over the first contact pads, a first insulation layer covering the first contact pads, and a second insulation layer covering the second contact pads. Firstly, a photoresist pattern layer having recesses and first openings is formed on the second insulation layer. The first openings expose the second insulation layer partially. Then, the first insulation layer and the second insulation layer inside the first openings are removed partially, to expose the first contact pads. Then, the thickness of the photoresist pattern layer is reduced, so that the recesses form a plurality of second openings which expose the second insulation layer partially. After that, a part of the second insulation layer which is located inside the second openings is removed, to expose the second contact pads.

Abstract: A semiconductor device and manufacturing method thereof are disclosed. The device comprises a semiconductor die, a passivation layer, a wiring redistribution layer (RDL), an Ni/Au layer, and a solder mask. The semiconductor die comprises a top metal exposed in an active surface thereof. The passivation layer overlies the active surface of the semiconductor die, and comprises a through passivation opening overlying the top metal. The wiring RDL, comprising an Al layer, overlies the passivation layer, and electrically connects to the top metal via the passivation opening. The solder mask overlies the passivation layer and the wiring RDL, exposing a terminal of the wiring RDL.

Abstract: A method for forming contact holes is applied in a transistor array substrate. The transistor array substrate includes first contact pads, second contact pads located over the first contact pads, a first insulation layer covering the first contact pads, and a second insulation layer covering the second contact pads. Firstly, a photoresist pattern layer having recesses and first openings is formed on the second insulation layer. The first openings expose the second insulation layer partially. Then, the first insulation layer and the second insulation layer inside the first openings are removed partially, to expose the first contact pads. Then, the thickness of the photoresist pattern layer is reduced, so that the recesses form a plurality of second openings which expose the second insulation layer partially. After that, a part of the second insulation layer which is located inside the second openings is removed, to expose the second contact pads.

Abstract: An embodiment of the invention provides a method for forming an electronic device package, which includes providing a carrier substrate having an upper surface and an opposite lower surface; forming a cavity from the upper surface of the carrier substrate; disposing an electronic device having a conducting electrode in the cavity; forming a filling layer in the cavity, wherein the filling layer surround the electronic device; thinning the carrier substrate from the lower surface to a predetermined thickness; forming at least a through-hole in the electronic device or the in the carrier substrate; and forming a conducting layer over a sidewall of the through-hole, wherein the conducting layer electrically connects to the conducting electrode.

Abstract: A driving apparatus includes a voltage transforming unit and a detector. The driving apparatus is used for supplying a drive voltage to a load. The voltage transforming unit is used for transforming a direct current (DC) voltage to the drive voltage. The detector is connected to the load for detecting a forward voltage across the load to generate a detecting voltage; wherein the detector compares the detecting voltage with a first reference voltage. If the detecting voltage is smaller than the first reference voltage, the detector generates a first feedback signal; the voltage transforming unit increases the drive voltage according to the first feedback signal, the detecting voltage is defined by subtraction of the forward voltage from the drive voltage.

Abstract: An electronic device with a power switch capable of regulating power dissipation includes a power supply device; a power switch, for providing an output voltage; and a current regulating circuit, which includes an adaptive control unit, for outputting a regulating signal, according to the voltage difference between the power supply device and the output voltage; and a switch control unit, for outputting a switch control signal to control the magnitude of the current through the power switch, according to the regulating signal.

Abstract: An electronic device includes a body, an electronic module, and an elastic element, wherein the body has at least an accommodating space and a first connector. The electronic module is accommodated in the accommodating space and has a plurality of connection ports and a second connector electrically connected to the plurality of connection ports. The second connector is electrically connected to the first connector, and the plurality of connection ports is exposed on the outer surface of the body. The elastic element surrounds the junction between the first connector and the second connector, wherein the electronic module presses the elastic element against the body.

Abstract: Methods for patterning material layers, which may be implemented in forming integrated circuit device features, are disclosed. In an example, a method includes forming a first resist layer over a material layer; forming a second resist layer over the first resist layer; forming an opening that extends through the second resist layer and the first resist layer to expose the material layer, wherein the opening has a substantially constant width in the second resist layer and a tapered width in the first resist layer; and performing a tilt-angle deposition process to form a feature over the exposed material layer.

Abstract: A multi-die semiconductor device is disclosed. The device may include one or more first-sized die on a substrate and one or more second-sized die affixed over the one or more first-sized die. The second-sized die may have a larger footprint than the first-sized die. An internal molding compound may be provided on the substrate having a footprint the same size as the second-sized die. The second-sized die may be supported on the internal molding compound. Thereafter, the first and second-sized die and the internal molding compound may be encapsulated in an external molding compound.

Abstract: A magnetoresistive random access memory (MRAM) cell includes a magnetic tunnel junction (MTJ), a top electrode disposed over the MTJ, a bottom electrode disposed below the MTJ, and an induction line disposed to one side of the MTJ. The induction line is configured to induce a perpendicular magnetic field at the MIJ.

Abstract: A reset circuit and a delay circuit are provided. The delay circuit includes a first resistor module, a second resistor module, a switch module and a capacitor module. First terminals of the first and the second resistor modules are coupled respectively to a first voltage and a second voltage. The switch module have a control terminal served as a input terminal of the delay circuit, a first terminal served as a output terminal of the delay circuit, a second terminal coupled to a second terminal of the first resistor module, and a third terminal coupled to a second terminal of the second resistor module. In the delay circuit, the first terminal selectively connected to the second terminal or the third terminal in accordance with the control terminal. The capacitor module couples between the first terminal of the switch module and the second voltage.

Abstract: A mainframe structure includes a housing having a detachable front cover, and a circuit module accommodated in the housing. The circuit module includes a main circuit board affixed to the back side of the detachable front cover in vertical and carrying first and second electrical connectors, a chip (or chips) and memory devices, a functional circuit board horizontally mounted in the housing at the bottom side and having a first connection port connected to the first electrical connector of the main circuit board, and a display circuit board vertically mounted in the housing at the top side and having a second connection port connected to the second electrical connector of the main circuit board. The detachable design of the circuit module minimizes the sizes of the main circuit board and facilitates maintenance of the main circuit board.

Abstract: A mainframe structure includes a housing having a front opening, flanges on one same plane around the front opening and stop members suspending on the inside corresponding to the flanges, a circuit module accommodated in the housing, and a cover detachably mounted in the front opening of the housing and stopped against the flanges and the stop member. The cover has two slots symmetrically disposed at two opposite lateral sides, two lugs respectively disposed adjacent to the slots and two handles respectively mounted in the slots and pivoted to the lugs in reversed directions. By means of biasing the two handles to stop against respective stop members, the user can detach the cover from the housing conveniently with the hands without any hand tools.

Abstract: An electronic device including at least one connecting member, a display unit and a host is provided in the present invention. The connecting member has a first fixing section, a second fixing section and a third fixing section. The display unit includes a front bezel and a panel, and the panel is fixed to the connecting member through the first fixing section. The host is fixed to the connecting member through the second fixing section or the third fixing section depending on the size of the display unit. The connecting member and the panel are disposed between the front bezel and the host. The assembling of the host and the display unit is flexible by using the connecting member.

Abstract: The present disclosure provides a system of fabricating a microstructure device with an improved anchor. A method of fabricating a microstructure device with an improved anchor includes providing a substrate and forming an oxide layer on the substrate. Then, a cavity is etched in the oxide layer, such that the cavity includes a sidewall in the oxide layer. A microstructure device layer is then bonded to the oxide layer over the cavity. Forming a microstructure device, a trench is etched in the device layer to define an outer boundary of the microstructure device. In an embodiment, the outer boundary is substantially outside of the sidewall of the cavity. Then, the sidewall of the cavity is etched away through the trench in the device layer, to thereby suspend the microstructure device over the cavity.

Abstract: The present disclosure provides for magnetic logic devices and methods of operating such a device. In one embodiment, the device includes a bottom electrode configured to receive a first input current and a second input current, a bottom magnetic layer disposed over the bottom electrode, a nonmagnetic layer disposed over the bottom magnetic layer, a top magnetic layer disposed over the nonmagnetic layer, and a top electrode disposed over the top magnetic layer, the top electrode and the bottom electrode configured to provide an output voltage which is dependent on the first and second input currents and which follows an AND gate logic or an OR gate logic.