Patents by Inventor Wen Chou

Wen Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100155929
    Abstract: A chip stacked package structure and applications are provided, wherein the chip stacked package structure comprises a substrate, a first chip, a patterned circuit layer and a second chip. The substrate has a first surface and an opposite second surface. The first chip with a first active area and an opposite first rear surface is electrically connected to first surface of substrate by a flip chip bonding process. The patterned circuit layer set on the dielectric layer is electrically connected to the substrate via a bonding wire. The second chip set on the patterned circuit layer has a second active area and a plurality of second pads formed on the second active area, wherein the second bonding pad is electrically connected to the patterned circuit layer.
    Type: Application
    Filed: February 26, 2010
    Publication date: June 24, 2010
    Applicant: CHIPMOS TECHNOLOGY INC.
    Inventors: Chun-Ying Lin, Yu-Tang Pan, Shih-Wen Chou, Geng-Shin Shen
  • Patent number: 7741160
    Abstract: Provided are semiconductor die flip chip packages and semiconductor die flip chip package components where certain properties of the packages/components are controlled to facilitate management of the package stresses. Also provided are fabrication methods for such packages and package components. For instance, the thickness of a die can be controlled such that the stress generated/experienced by the die is minimized. As such, the package stress is managed to suitable levels for incorporation of a low-K Si die and/or a thin package substrate. Further, a thin die can be attached to a heat spreader to increase the rigidity for easier handling during fabrication of the semiconductor die flip chip package.
    Type: Grant
    Filed: August 4, 2009
    Date of Patent: June 22, 2010
    Assignee: Altera Corporation
    Inventors: Wen-chou Vincent Wang, Yuan Li, Bruce Euzent, Vadali Mahadev
  • Publication number: 20100147350
    Abstract: A thermoelectric device is provided. The thermoelectric device includes a P-type thermoelectric component, an N-type thermoelectric component, and an electrically conductive layer. Each of the P-type thermoelectric component and the N-type thermoelectric component includes a substrate and a nanowire structure. The conductive layer connects the P-type thermoelectric component set with the N-type thermoelectric component set. The thermoelectric device is adapted for recycling heat generated by the heat source, and for effectively converting the heat into electrical energy.
    Type: Application
    Filed: August 17, 2009
    Publication date: June 17, 2010
    Applicant: Industrial Technology Research Institute
    Inventors: Ya-Wen Chou, Ming-Shan Jeng, Shih-Kuo Wu, Chang-Chung Yang, Kuei-Chien Chang
  • Patent number: 7728815
    Abstract: A multi-direction input device for computers includes a direction wheel, a toggle mechanism and a plurality of electrodes. The direction wheel has one-degree of rotational freedom and two-degree of freedom to perform clicking, forward rolling, backward rolling, leftward moving and rightward moving operations. Thereby mating electrodes are electrically connected to generate corresponding signals. In normal conditions, the toggle mechanism and a movable contact jointly support the direction wheel. When the direction wheel is depressed, the toggle mechanism drives and connects a corresponding electrode to generate a click signal.
    Type: Grant
    Filed: September 26, 2005
    Date of Patent: June 1, 2010
    Assignee: Zippy Technology Corp.
    Inventor: Chin-Wen Chou
  • Publication number: 20100127367
    Abstract: A chip package including a circuit substrate, a chip, a B-staged adhesive layer, a leadframe, a number of first bonding wires, a number of second bonding wires, and a number of third bonding wires. The chip is disposed on the circuit substrate. The B-staged adhesive layer is disposed on the circuit substrate. The leadframe is disposed on the circuit substrate and includes a number of leads. Portions of the leads are embedded in the B-staged adhesive layer, and an end of each of the leads is exposed by the B-staged adhesive layer. The first bonding wires are electrically connected between the chip and the circuit substrate. The second bonding wires are electrically connected between the chip and the leads. The third bonding wires are electrically connected between the leads and the circuit substrate. In addition, a manufacturing method of a chip package is also provided.
    Type: Application
    Filed: January 21, 2009
    Publication date: May 27, 2010
    Applicants: CHIPMOS TECHNOLOGIES INC., CHIPMOS TECHNOLOGIES (BERMUDA) LTD.
    Inventor: Shih-Wen Chou
  • Patent number: 7723853
    Abstract: A chip package including a base, a chip, a molding compound and a plurality of outer terminals is provided. The base is essentially consisted of a patterned circuit layer having a first surface and a second surface opposite to each other and a solder mask disposed on the second surface, wherein the solder mask has a plurality of first openings by which part of the patterned circuit layer is exposed. The chip is disposed on the first surface and is electrically connected to the patterned circuit layer. The molding compound covers the pattern circuit layer and fixes the chip onto the patterned circuit layer. The outer terminals are disposed in the first openings and electrically connected to the patterned circuit layer.
    Type: Grant
    Filed: August 22, 2008
    Date of Patent: May 25, 2010
    Assignees: ChipMOS Technologies Inc., ChipMOS Technologies (Bermuda) Ltd.
    Inventors: Yu-Tang Pan, Cheng-Ting Wu, Shih-Wen Chou, Hui-Ping Liu
  • Publication number: 20100123234
    Abstract: A multi-chip package includes a carrier, a first chip, a relay circuit substrate, a number of first bonding wires, a number of second bonding wires, a second chip, a number of third bonding wires, and an adhesive layer. The first chip is disposed on the carrier. The relay circuit substrate is disposed on the first chip. The first bonding wires are electrically connected between the first chip and the relay circuit substrate. The second bonding wires are electrically connected between the relay circuit substrate and the carrier. The second chip is disposed on the carrier and is stacked with the first chip. The third bonding wires are electrically connected between the second chip and the carrier. The adhesive layer is adhered between the first chip and the second chip. In addition, a manufacturing method of a multi-chip package is also provided.
    Type: Application
    Filed: January 9, 2009
    Publication date: May 20, 2010
    Applicants: CHIPMOS TECHNOLOGIES INC., CHIPMOS TECHNOLOGIES (BERMUDA) LTD.
    Inventor: Shih-Wen Chou
  • Publication number: 20100109717
    Abstract: A pixel circuit includes an LED having an anode that receives a driving current and a cathode that receives a scan signal, and a driving circuit including: a switch unit operable according to a voltage signal, and adapted for permitting transfer of a data signal when operating in an on state; a capacitor having a first end coupled to the switch unit, and a second end; a first transistor having a first terminal that is coupled to the second end of the capacitor, a second terminal that is coupled to the anode of the LED, and a control terminal that is coupled to the first end of the capacitor; and a second transistor having a first terminal that is adapted for coupling to the voltage source, a second terminal that is coupled to the first terminal of the first transistor, and a control terminal that is adapted for receiving a reference voltage.
    Type: Application
    Filed: October 30, 2008
    Publication date: May 6, 2010
    Inventors: Chih-Lung LIN, Kuan-Wen CHOU
  • Publication number: 20100096741
    Abstract: A chip stacked package structure and applications are provided. The chip-stacked package structure includes a main substrate, a baseboard substrate, and a molding compound. The main substrate has a substrate and a first chip. The substrate has a first surface and a second surface opposite to the first surface. The first chip is disposed on the first surface and electrically connected to the substrate via first bumps. The baseboard substrate has a third surface and a fourth surface faced towards the substrate. The baseboard substrate includes a core layer having a plurality of first through holes and a first accommodation space in which the first chip is received. The second chip is disposed on the third surface of the baseboard substrate. The molding compound is used to encapsulate the main substrate, and the baseboard substrate.
    Type: Application
    Filed: December 29, 2009
    Publication date: April 22, 2010
    Applicant: CHIPMOS TECHNOLOGY INC.
    Inventors: Yu-Tang Pan, Shih-Wen Chou
  • Publication number: 20100091250
    Abstract: The invention provides a light uniform device and a digital light processing (DLP) projection system applying the said light uniform device. The light uniform device comprises a light incident surface, a light emergent surface and a light uniform portion defined therebetween. The light incident surface and the light emergent surface have a first contour and a second contour, respectively. And a first projection image of the second contour that is projected onto a projection plane forms a rotational angle about a longitudinal axial direction corresponding to a second projection image of the first contour projected onto the projection plane. Thereby, the light sources may simply be disposed in the projection system to provide uniform light beams that entirely cover the DMD (digital micromirror device) after being uniformed by the light uniform device. Neither of the light sources need to be inclined following with the DMD, nor is additional relay lens needed in imaging.
    Type: Application
    Filed: September 30, 2009
    Publication date: April 15, 2010
    Applicant: DELTA ELECTRONICS, INC.
    Inventors: Ching-Wen CHOU, Douglas M. BOUDON, Tom HAVEN, Rolf VATNE
  • Patent number: 7696629
    Abstract: A chip stacked package structure and applications are provided, wherein the chip stacked package structure comprises a substrate, a first chip, a patterned circuit layer and a second chip. The substrate has a first surface and an opposite second surface. The first chip with a first active area and an opposite first rear surface is electrically connected to first surface of substrate by a flip chip bonding process. The patterned circuit layer set on the dielectric layer is electrically connected to the substrate via a bonding wire. The second chip set on the patterned circuit layer has a second active area and a plurality of second pads formed on the second active area, wherein the second bonding pad is electrically connected to the patterned circuit layer.
    Type: Grant
    Filed: October 15, 2007
    Date of Patent: April 13, 2010
    Assignee: Chipmos Technology Inc.
    Inventors: Chun-Ying Lin, Yu-Tang Pan, Shih-Wen Chou, Geng-Shin Shen
  • Publication number: 20100084099
    Abstract: A ladder drum for adjusting and regulating the angular orientation and closure of horizontal slats of a venetian blind, of the type incorporating ladder cords or tape ladders, having a polygonal profiled structure comprising a series of planar sidewalls defining a substantially hollow interior. The number of sidewalls defining the polygonal structure is greater than four sidewalls, and less than or equal to twelve sidewalls, with each adjacent plane sidewall having an internal angular orientation in the range of 90° to 150°. To enhance the uniform closure of the slats of a horizontal blind, the polygonal ladder drum is more preferably in the form of an uneven hexagon that is either formed from injection molded plastics or a metal die stamping. The opposing top and bottom sidewalls are greater in measurement than the remaining mediate sidewalls, with at least two opposing mediate sidewalls having attachment means to insert and retain ladder cords in a counter balanced relation.
    Type: Application
    Filed: February 9, 2009
    Publication date: April 8, 2010
    Inventor: Tser Wen CHOU
  • Patent number: 7683552
    Abstract: A circuit structure for a lamp set which includes a socket, a lamp assembly mounted onto the socket and an electrode portion. The lamp assembly surrounds a housing space inside to hold a power distribution dock connecting to the socket. The power distribution dock has a holding space to hold a power conversion element which is electrically connected to the electrode portion to receive external electric power and transform to starting power to drive the lamp assembly to generate light. The power distribution dock and the power conversion element are located in the housing space. Thus the total height of the socket is reduced and the lamp set can be shrunk to a smaller size.
    Type: Grant
    Filed: September 19, 2007
    Date of Patent: March 23, 2010
    Assignee: Zippy Technology Corp.
    Inventor: Chin-Wen Chou
  • Publication number: 20100068325
    Abstract: A pellet article forming apparatus includes a bottom mold and a top mold. The bottom mold has at least one forming cavity to hold polymer powder. The forming cavity has a first arched surface at the bottom that has an edge extended to form a first compression surface and an opening to hold a thrust member. The top mold is located above the bottom mold and has a second arched surface opposing the first arched surface. The second arched surface has another edge formed a second compression surface corresponding to the first compression surface. The top mold and the bottom mold are movable against each other to provide a compression force to the polymer powder held in the forming cavity to form a desired pellet article. The pellet article thus formed has a desired genuine spherical surface. Damage of the molds that might otherwise occur due to compression can be prevented.
    Type: Application
    Filed: September 15, 2008
    Publication date: March 18, 2010
    Inventor: Chin-Wen CHOU
  • Publication number: 20100061789
    Abstract: A self-luminous keyboard with brightness-enhanced keycaps of the present invention comprises a baseplate, a substrate arranged above the baseplate, a plurality of keycaps coupled to the substrate and able to move up and down, a circuit board triggered by the contact of the keycap to output a signal, and a light emitting element. The substrate has a plurality of via-holes each corresponding to one keycap. There is a light transmission path from the light emitting element through the via-hole to the keycap. In each light transmission path, there is a light concentration member, and the light emitted by the light emitting element is concentrated by the light concentration member and then transmitted to the keycap. Thereby, the brightness of the keycaps is enhanced to be higher than the brightness of the gap between the adjacent keycaps, and the recognizability thereof is promoted.
    Type: Application
    Filed: September 11, 2008
    Publication date: March 11, 2010
    Inventor: Chin-Wen CHOU
  • Publication number: 20100053077
    Abstract: A notebook computer with force feedback for gaming is provided. A vibrating plate is disposed on a host, and a vibration generating device is disposed at the bottom of the vibrating plate to generate vibration when a computer game is executed. Thus, a user playing the computer game may feel the force feedback. Additionally, to prevent vibration from affecting the normal operation of the host, a damper is disposed between the host and the vibrating plate to prevent vibration from being transmitted to the host.
    Type: Application
    Filed: August 10, 2009
    Publication date: March 4, 2010
    Inventors: Jih-Hung Huang, Yu-Chuan Shen, Chi-Yi Liu, Wen-Chou Liu
  • Patent number: 7672143
    Abstract: In a computer system, a card holder is removably attached to a bracket to hold an add-in card in an I/O connector. The card holder is capable of being slid onto the bracket and a side edge of the add-in card.
    Type: Grant
    Filed: May 30, 2007
    Date of Patent: March 2, 2010
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Chi-Wen Chou, Hsiu Hsien Wang
  • Publication number: 20100045606
    Abstract: A portable computer including a host and an input device is provided. The host has a accommodating space and a first wireless transmission unit. The input device is detachably disposed in the accommodating space and has a touch pad, a plurality of control buttons and a second wireless transmission unit. The touch pad and the control buttons are electrically connected to the second wireless transmission unit. The second wireless transmission unit is used for performing wireless transmission with the first wireless transmission unit.
    Type: Application
    Filed: May 27, 2009
    Publication date: February 25, 2010
    Applicant: ASUSTeK COMPUTER INC.
    Inventors: Chi-Yi Liu, Yu-Chuan Shen, Jih-Hung Huang, Wen-Chou Liu
  • Patent number: D611834
    Type: Grant
    Filed: July 19, 2008
    Date of Patent: March 16, 2010
    Inventor: Wen-An Chou Huang
  • Patent number: D611835
    Type: Grant
    Filed: July 19, 2008
    Date of Patent: March 16, 2010
    Inventor: Wen-An Chou Huang