Patents by Inventor Wen Chou

Wen Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7585702
    Abstract: Provided are semiconductor die flip chip packages and semiconductor die flip chip package components where certain properties of the packages/components are controlled to facilitate management of the package stresses. Also provided are fabrication methods for such packages and package components. For instance, the thickness of a die can be controlled such that the stress generated/experienced by the die is minimized. As such, the package stress is managed to suitable levels for incorporation of a low-K Si die and/or a thin package substrate. Further, a thin die can be attached to a heat spreader to increase the rigidity for easier handling during fabrication of the semiconductor die flip chip package.
    Type: Grant
    Filed: November 8, 2005
    Date of Patent: September 8, 2009
    Assignee: Altera Corporation
    Inventors: Wen-chou Vincent Wang, Yuan Li, Bruce Euzent, Vadali Mahadev
  • Publication number: 20090189852
    Abstract: An index wheel having notations adopted on an electronic device to be freely rotated to generate signal command output includes at least an inner axis layer and an operation layer encasing the inner axis layer in a coaxial manner and movable together at the same time. The operation layer is made from a ceramic material and formed integrally by molding and sintering. The operation layer also has a graphic notation zone on the surface that contains desired graphics or texts. Thus the profile of the index wheel is more versatile and provides a greater appeal to users.
    Type: Application
    Filed: January 25, 2008
    Publication date: July 30, 2009
    Inventor: Chin-Wen CHOU
  • Publication number: 20090183843
    Abstract: A Venetian blind includes a plurality of horizontal slats which are positioned at a predetermined distance vertically and a lifting and rotating control unit. Each of the slats includes a transversely extended central portion having a curved cross section, and two wing portions horizontally extended from and along two opposite transverse edges of the curved central portion. The lifting and rotating control unit includes a lift cord vertically extended through openings provided on the slats, two ladder cords vertically located at two transverse sides of the slats, and a plurality of cross rung cords separately located below the slats and connected at two ends to the two ladder cords, such that the cross rung cords each have two end portions in contact with lower sides of the two wing portions. With the above arrangements, the slats may be smoothly rotated in an effort-saving manner to overlap one another to provide effective light blocking function.
    Type: Application
    Filed: January 22, 2008
    Publication date: July 23, 2009
    Inventor: Tser-Wen Chou
  • Publication number: 20090176425
    Abstract: A flexible keyboard includes a first layer combined with a second layer. The first layer has a first base cloth, a hot melt film spread on the first base cloth, and at least a first metallic sheet fixed on the hot melt film. The first metallic sheet is connected with a conducting line. The second layer has a second base cloth, a hot melt film spread on the second base cloth, and at least a second metallic sheet fixed on the hot melt film to correspond to the first metallic sheet. The second metallic sheet is connected with a conducting line. A foamed layer is sandwiched between the first layer and the second layer, with at least a gap formed for being pressed. So, if the invention is installed in clothes, a user can just press on the clothes corresponding to the gaps to operate an electronic appliance.
    Type: Application
    Filed: January 8, 2008
    Publication date: July 9, 2009
    Inventors: Lung-Wen CHOU, Mei-Fang Chou, Hung-Tai Lin
  • Patent number: 7544623
    Abstract: A method for fabricating a contact hole is provided. A semiconductor substrate having thereon a conductive region is prepared. A dielectric layer is deposited on the semiconductor substrate and the conductive region. An etching resistive layer is coated on the dielectric layer. A silicon-containing hard mask bottom anti-reflection coating (SHB) layer is then coated on the etching resistive layer. A photoresist layer is then coated on the SHB layer. A lithographic process is performed to form a first opening in the photoresist layer. Using the photoresist layer as a hard mask, the SHB layer is etched through the first opening, thereby forming a shrunk, tapered second opening in the SHB layer. Using the etching resistive layer as an etching hard mask, etching the dielectric layer through the second opening to form a contact hole in the dielectric layer.
    Type: Grant
    Filed: September 11, 2006
    Date of Patent: June 9, 2009
    Assignee: United Microelectronics Corp.
    Inventors: Pei-Yu Chou, Wen-Chou Tsai, Jiunn-Hsiung Liao
  • Patent number: 7541241
    Abstract: A memory cell structure comprises a semiconductor substrate, two stack structures positioned on the semiconductor substrate, two conductive spacers positioned on sidewalls of the two stack structures, a gate oxide layer covering a portion of the semiconductor substrate between the two conductive spacers and a gate structure positioned at least on the gate oxide layer. Particularly, each of two stack structures includes a first oxide block, a conductive block and a second oxide block, and the two conductive spacers are positioned at on the sidewall of the two conductive blocks of the two stack structures. The two conductive spacers are preferably made of polysilicon, and have a top end lower than the bottom surface of the second oxide block. In addition, a dielectric spacer is positioned on each of the two conductive spacers.
    Type: Grant
    Filed: December 12, 2005
    Date of Patent: June 2, 2009
    Assignee: Promos Technologies, Inc.
    Inventors: Jai Hoon Sim, Jih Wen Chou
  • Patent number: 7531438
    Abstract: A method of fabricating a recess channel transistor is provided. First, a hard mask is formed on a doped-semiconductor layer and a substrate. The doped-semiconductor layer and the substrate are etched to form a trench and define a source/drain in the doped-semiconductor layer. An implantation process is performed with a tilt angle on sidewalls of the trench to form an implant area. A thermal oxidation process is performed to form an oxide layer. The oxide layer comprises a first thickness on the source/drain in the sidewalls of the trench and a second thickness on the other portion in the sidewalls of the trench.
    Type: Grant
    Filed: July 24, 2006
    Date of Patent: May 12, 2009
    Assignee: ProMOS Technologies Inc.
    Inventors: Jih-Wen Chou, Chih-Hsun Chu, Hsiu-Chuan Shu
  • Publication number: 20090107818
    Abstract: A light directing structure for instruction switches includes an instruction switch, a control element coupled on the perimeter of the instruction switch that is made from a light directing material and has an installation opening to hold the instruction switch, and a circuit board which is electrically connected to the instruction switch and has at least one lighting element to emit light to the control element to enable the control element to generate uniform illumination.
    Type: Application
    Filed: October 30, 2007
    Publication date: April 30, 2009
    Inventors: Chin-Wen Chou, Tsui-Jung Su
  • Publication number: 20090107825
    Abstract: The preset invention includes a circuit board wired to connect at least one common terminal and a plurality of signal terminals to form multiple instruction switches and an annular click member. Each of the instruction switches has an elastic contact element built with a return force. The circuit board has a plurality of displacement portions. The annular click member has actuating portions corresponding to and engageable with the displacement portions such that the annular click member is movable up and down relative to the circuit board to form a normal position and an instruction generating position. When the annular click member receives a force and is moved to the instruction generating position, a contact depresses the elastic contact element to store the return force When the force is released from the annular click member it is pushed by the return force of the elastic contact element to the normal position.
    Type: Application
    Filed: October 30, 2007
    Publication date: April 30, 2009
    Inventors: Chin-Wen Chou, Tsui-Jung Su
  • Publication number: 20090104573
    Abstract: A gas burner system includes a power supply device, one or a number of gas burners, one or a number of gas valve for controlling the fuel gas passage(s) of the gas burner(s), one or a number of control device each having an operating device for inputting a command signal, a microprocessor for receiving the command signal from the operating device and outputting a corresponding control signal, a valve control device for driving the gas valve(s) subject to the control signal from the microprocessor, an ignition induction electrode located on each gas burner at one side, and one or a number of igniter and inductor combination device for providing a high voltage current to the ignition induction electrode at each gas burner subject to the control signal from the microprocessor to cause the ignition induction electrode at each gas burner to discharge sparks for burning the discharged fuel mixture so that the igniter and inductor combination device stops from providing the high voltage current when received a feedb
    Type: Application
    Filed: May 12, 2008
    Publication date: April 23, 2009
    Inventor: Wen Chou Chen
  • Publication number: 20090096747
    Abstract: A method of rolling picture by using input device is disclosed. The input device has a housing and a rotatable component relative to the housing, and through rotating the component, an instruction signal for rolling picture being produced. The method includes steps of setting picture rolling, wherein the input device is set to have at least a first mode or a second mode for rolling the picture, in which each mode is set to have a picture rolling displacement which is corresponding to the driven picture rolling by the single instruction signal every time, and different modes have different displacements; and deciding the mode, wherein a standard value which is compared with the number of instruction signal generated per unit time for deciding the mode of the instruction signal is provided, and through the standard value, the instruction signal is decided to enter the first mode or the second mode.
    Type: Application
    Filed: October 10, 2007
    Publication date: April 16, 2009
    Inventor: Chin-Wen Chou
  • Patent number: 7518587
    Abstract: An impulse driving method and apparatus thereof for a liquid crystal display (LCD) are provided. The gate driver of the liquid crystal device generates first scan signals for controlling gate lines of the liquid crystal device according to the received first start vertical signal and first output enable signal. The scan signals are generated corresponding to the pixel data signals outputted from the data driver of the LCD. Moreover, the gate driver of the LCD generates second scan signals according to the received second start vertical signal and second output enable signals. The scan signals are generated corresponding to black data signals output from the data driver of the liquid crystal device. Therefore, the control signal scheme is simplified and the black insertion ratio is easily controlled.
    Type: Grant
    Filed: March 23, 2005
    Date of Patent: April 14, 2009
    Assignee: Hannstar Display Corporation
    Inventors: Ssu-Ming Lee, Seob Shin, Feng-Ting Pai, Hsien-Wen Chou
  • Patent number: 7518317
    Abstract: A backlight driving and control circuit with an isolated power factor correction structure includes a power stage for providing a power supply; a driver stage having a first power factor correction unit for correcting the power factor of the power supply and outputting DC power; an inverter for converting a middle-voltage DC power into a high-voltage power output and driving the operation of a backlight light emitting component; and a control/dimming stage having a second power factor correction unit, a DC transformer unit, and an AD board installed at a secondary winding of the DC transformer unit and grounded jointly with the inverter. With the invention, the power factor correction unit can be electrically isolated from the power stage, and the AD board can directly control/dim the inverter of the driver stage to change the operating status of the backlight light emitting component.
    Type: Grant
    Filed: August 3, 2006
    Date of Patent: April 14, 2009
    Assignee: Zippy Technology Corp.
    Inventors: Chin-Wen Chou, Ying-Nan Cheng, Chin-Biau Chung
  • Patent number: 7518839
    Abstract: An arc discharge protection apparatus operating in a current detection mode aims to prevent arc discharge caused by abnormal conditions in a high voltage output zone. The arc discharge protection apparatus has a current signal sampling unit to receive an arc discharge current signal generated in the high voltage output zone, an interpretation unit to provide a determination level to sift out an abnormal current frequency signal, a commutation unit to receive and rectify the abnormal current frequency signal and output an arc DC signal, and a touch control unit driven by the arc DC signal to output a trigger signal to stop operation of the high voltage output zone. Thereby sparking or burning caused by heat accumulation of the peripheral elements resulting from the arc discharge can be prevented.
    Type: Grant
    Filed: November 15, 2005
    Date of Patent: April 14, 2009
    Assignee: Zippy Technology Corp.
    Inventors: Chin-Wen Chou, Ying-Nan Cheng
  • Patent number: 7514299
    Abstract: A manufacturing method of a chip package structure is provided. A circuit substrate having a first surface, a second surface, and a through hole connecting the first surface and the second surface is provided. A chip having an active surface and bonding pads disposed on the active surface is provided. The chip is fixed on the circuit substrate, wherein the second surface is opposite to the active surface and the bonding pads are exposed to the through hole. Bonding wires connecting the bonding pads and the first surface are formed through the through hole. A film having an opening is formed on the first surface. The bonding wires, the bonding pads, the through hole, and part of the first surface are exposed by the opening. An encapsulant is formed to encapsulate part of the active surface, the bonding wires, and part of the first surface. The film is removed.
    Type: Grant
    Filed: September 8, 2006
    Date of Patent: April 7, 2009
    Assignees: ChipMOS Technologies Inc., ChipMOS Technologies (Bermuda) Ltd.
    Inventors: Chun-Hung Lin, Shih-Wen Chou, Yu-Tang Pan
  • Patent number: 7510889
    Abstract: A method for manufacturing a light emitting chip package includes bonding a patterned metal plate having at least a thermal enhanced plate and many contacts around the same to a substrate and bonding a film-like circuit layer to the patterned metal plate. Many conductive wires are formed to connect the film-like circuit layer and the contacts. Thereafter, at least a first molding is formed on the substrate to encapsulate the patterned metal plate, the conductive wires and a portion of the film-like circuit layer. At least one light emitting chip disposed on the film-like circuit layer exposed by the first molding has many bumps to which the light emitting chip and the film-like circuit layer are electrically connected. A cutting process is performed to form at least one light emitting chip package, and the substrate is removed. Therefore, heat dissipation efficiency of the light emitting chip package can be improved.
    Type: Grant
    Filed: June 13, 2007
    Date of Patent: March 31, 2009
    Assignee: ChipMOS Technologies Inc.
    Inventors: Yu-Tang Pan, Shih-Wen Chou, Men-Shew Liu
  • Publication number: 20090073699
    Abstract: A circuit structure for a lamp set which includes a socket, a lamp assembly mounted onto the socket and an electrode portion. The lamp assembly surrounds a housing space inside to hold a power distribution dock connecting to the socket. The power distribution dock has a holding space to hold a power conversion element which is electrically connected to the electrode portion to receive external electric power and transform to starting power to drive the lamp assembly to generate light. The power distribution dock and the power conversion element are located in the housing space. Thus the total height of the socket is reduced and the lamp set can be shrunk to a smaller size.
    Type: Application
    Filed: September 19, 2007
    Publication date: March 19, 2009
    Inventor: Chin-Wen Chou
  • Patent number: D591993
    Type: Grant
    Filed: November 6, 2008
    Date of Patent: May 12, 2009
  • Patent number: D592437
    Type: Grant
    Filed: December 4, 2008
    Date of Patent: May 19, 2009
    Inventor: Tser Wen Chou
  • Patent number: D599602
    Type: Grant
    Filed: December 2, 2008
    Date of Patent: September 8, 2009
    Inventor: Tser Wen Chou