Abstract: An interposer for providing power, ground, and signal connections between an integrated circuit chip or chips and a substrate. The interposer includes a signal core and external power/ground connection wrap. The two sections may be fabricated and tested separately, then joined together using z-connection technology. The signal core is a dielectric film with patterned metal on both sides. The two metal layers are interconnected by a through via or post process. The power/ground wrap includes an upper substrate positioned above the signal core and a lower substrate positioned below the signal core. The upper and lower substrates of the power/ground wrap are formed from a dielectric film having a patterned metal layer on both sides connected by a through via or post process. The upper power/ground wrap substrate, signal core, and lower power/ground substrate are interconnected as desired using z-connection technology (e.g., solder or conductive ink).

Abstract: An interposer structure permits a differential transverse displacement of contact pads on opposite sides of the interposer to reduce thermal stresses when the interposer is bonded to contact pads of a chip and a substrate with different thermal coefficients of expansion. The effective elasticity of the interposer between top and bottom contact pads of the interposer is facilitated by perforations which define flap-like regions. A flexible trace couples top contact pads to bottom contact pads through a via while permitting substantial transverse relative displacement of the top and bottom contact pads in flap-like regions.

Abstract: An improved bearing mechanism works in conjunction with the control rod of a vertical blind system or a roller shade system to provide superior bearing and load handling capability. A conical bore has a plurality of grooves into the surface of the conical bore. A series of cylindrical rollers are supported within the grooves, and against a central rotational member having a conical surface for bearing against the rollers. A set screw is used to control the seating of the central rotational member within the conical bore, is used to make up any tolerance created through the manufacturing process, and can be used to increase the tension necessary to hold a roller shade in place.

Abstract: The inventive keyswitch comprises a base plate, a conductive membrane, an elastic member, a key support mechanism and a key wherein the first support lever and the second lever of the key support mechanism are of the same structure and pivotably joined in a scissors-form. The molding die can be simplified, the assembling efficiency can be enhanced and the cost is reduced.

Abstract: An ergonomical keyboard assembly includes an upper cover, a lower base plate connected to the cover, and a unitary keyboard. The upper cover includes a hollow frame that confines an opening. The keyboard has a substrate mounted on the base plate below the cover, and a plurality of keys which are mounted on the substrate and which have key caps projecting upward and outward from the cover through the opening. The substrate has a top face which is arched and which protrudes upward. The key caps form an arched overall key surface that projects upward and outward through the opening and that is arched from two ends to an intermediate portion of the opening.

Abstract: A method of forming dual voltage MOS transistors includes first forming a mask layer, covering one of the at least two device regions and exposing another one of the two device regions. A gate oxide layer is then formed by thermal oxidation on the exposed device region. After removing the mask layer and exposing another gate oxide formed therebeneath, polysilicon gates for both of the two device regions can be formed.

Abstract: A method fabricating salicide. A substrate having a polysilicon gate and a source/drain region is provided. A silicon oxide layer is formed on the polysilicon gate and the substrate. Using dry etch, a part of the silicon oxide layer is removed to leave a spacer with a waistline on a side wall of the polysilicon gate. A metal layer is formed on the polysilicon gate and the source/drain region.

Abstract: A method for forming devices having a thick gate oxide. The method comprises the steps of providing a substrate having different device areas already defined thereon through shallow trench isolation, then forming a first gate oxide layer over the substrate. Next, a silicon nitride layer is formed over the first gate oxide layer, then patterned using a mask to selectively expose the first gate oxide layer in the thick gate oxide area. Subsequently, a thermal oxidation is performed to directly grow an oxide layer over the first gate oxide layer to form a thicker second gate oxide layer. Since no gate oxide layer is removed in this invention, the distribution of ions implanted in previous processing steps will remain unchanged. Therefore, the fabricated devices will have more stable properties and better reliability.

Abstract: A method of fabricating a MOS FET is provided. An oxide layer and a polysilicon layer are successively formed on the semiconductor substrate. A pyramidical photoresist layer is used as a mask for forming a hat-shaped gate structure. A first ion implantation process is performed to form an LDD structure.

Abstract: A tilt switch includes an insulating switch body with an inner circumferential wall that extends from a top end to a bottom end in an upright direction to define a columnar chamber. Two electrically conductive contact terminals are disposed at an annular seat at the bottom end and are spaced apart from each other in a direction transverse to the upright direction. A movable conductor member is disposed movably in the columnar chamber along the inner circumferential wall. When the switch body stands in line with the upright direction, the conductor member will abut against the annular seat to make electrical connection between the terminals. When the insulating switch body is tilted and deviates from the upright direction, the conductor member will be prompted to move away from the annular seat so as to break the electrical connection.

Abstract: A re-attachable safety connector may be a single unit or may have a number of components working together as one unit. In the embodiments that have multiple components, connection of the components together may be accomplished by use of a series of pins inserted into a plurality of through bores in the body of the components at the mid-portions, as illustrated herein. Depending on the materials used to manufacture each of the elements of a given embodiment, the pin series may be sheared in half in order to provide for a safety release, or the properties of molded plastic as flexible may be relied upon in order to accomplish a safety release. Second through fourth embodiments are capsule shaped and provide for re-attachment of the chain.

Abstract: An improved bearing mechanism works in conjunction with the control rod of a vertical blind system or a roller shade system to provide superior bearing and load handling capability. A conical bore has a plurality of grooves into the surface of the conical bore. A series of cylindrical rollers are supported within the grooves, and against a central rotational member having a conical surface for bearing against the rollers. A set screw is used to control the seating of the central rotational member within the conical bore, is used to make up any tolerance created through the manufacturing process, and can be used to increase the tension necessary to hold a roller shade in place. A balanced bearing system uses two sets of roller bearings, which may be frusto-conical, to make for a more stable, more secure, and more evenly balanced roller shade assembly.

Abstract: A method for forming a dual gate oxide layer, which can be suitably applied to the surface of a shallow trench isolation structure, comprising the steps of providing a substrate that has a device isolation structure already formed thereon such as a shallow trench isolation. Next, a thermal oxidation process is carried out to form an oxide layer over the substrate and the isolation structure. A silicon nitride layer is then deposited on top of the oxide layer. In the subsequent step, the silicon nitride layer is patterned to cover portions of the oxide layer that lies in an input/output area. The method of this invention produces a better quality gate oxide layer over the device isolation structure and the substrate surface. Therefore, device problems caused by the deposition of a poor quality gate oxide in a conventional method can be greatly reduced.

Abstract: An improved wall covering track system includes an elongate track for vertically supporting a series of carriers and enabling the carriers to horizontally translate along the track, the raceway surfaces of the track are inclined downwardly from the horizontal, the carriers have frusto-conical wheels, which may be mounted on straight or frusto conical axles. A drapery and a vertical blind system includes spacers, and a variety of track extrusions are illustrated.

Abstract: A method of fabricating an air-gap spacer of a metal-oxide-semiconductor device includes the following steps. First, a substrate having a gate oxide layer and a polysilicon layer successively formed is provided. The polysilicon layer and the gate oxide layer are patterned to form a gate electrode region. A silicon nitride layer and an oxide layer are successively formed on the surface of the substrate and the surface of the gate electrode region. The oxide layer and the silicon nitride layer are anisotropically etched to form a cross-sectional L-shaped silicon nitride layer and a first spacer at the sidewall of the gate electrode region. After the first spacer is removed, an ion implantation is performed to form an extended lightly doped region below the L-shaped silicon nitride layer in the substrate and a lightly doped region in the substrate surrounding the extended lightly doped region.

Abstract: A read-only memory (ROM) device of the type including an array of diode-based memory cells for permanent storage of binary-coded data. The ROM device is partitioned into a memory division and an output division. The memory cells are formed over an insulating layer in the memory division. The insulating layer separates the memory cells from the underlying substrate such that the leakage current that can otherwise occur therebetween can be prevented. Moreover, the coding process is performing by forming contact windows at selected locations rather than by performing ion-implantation as in conventional methods. The fabrication process is thus easy to perform. Since the memory cells are diode-based rather than MOSFET-based, the punch-through effect that usually occurs in MOSFET-based memory cells can be prevented. The diode-based structure also allows the packing density of the memory cells on the ROM device to be dependent on the line width of the polysilicon layers in the ROM device.

Abstract: A method for fabricating a MOS transistor device is provided. The method contains sequentially forming an oxide layer, a polysilicon layer, and a cap layer over a semiconductor substrate. Patterning the oxide layer, the polysilicon layer, the cap layer, and the substrate forms a trench opening in the substrate. A shallow trench isolation (STI) structure is formed by filling the opening with insulating material. A first-stage gate structure is formed on the substrate by patterning the oxide layer, the polysilicon layer, and the cap layer. A top portion of the STI structure above the substrate surface is exposed. A light ion implantation is performed to form a lightly doped region. Several spacers are respectively formed on each sidewall of the first-stage gate structure and each exposed sidewall of the STI structure. A heavy ion implantation process is performed to form interchangeable source/drain regions at each side of the first-stage gate structure. The cap layer is removed to leave an opening.

Abstract: Methods of forming patterns in photo-sensitive resist layers with high aspect ratio features are described. The photosensitive layer is patterned exposed to actinic radiation and thereafter developed. For high aspect ratio patterns, the inventors have often observed a residue of resist material at the bottom of such features, and that this residue interferes with subsequent processing, such as filling the pattern with metal by a plating operation. To remove this residue, the patterned locations of the resist are exposed to a low dose of low-energy electron beam radiation, preferably having energy of less than 6 KeV and dosage of less than 200 .mu.C/cm.sup.2. After the electron beam exposure, the aperture is again exposed to a developer solution, which may be of the same composition as the developer initially used to develop the patterns.

Abstract: An improved system utilizes a series of structures which permit magnetic closure to be used in existing carriers and components. Magnetic support structures include members which ride in the carrier, as well as special size members which mount in the lead or wand carrier and which reside in the vertical blind track end caps. All of the structures are installable as retro-fit and which can work with existing tracks, carriers and end caps, even though these structures have been optimized for small size.

Abstract: An interconnecting post for mounting a microelectronic device such as an integral circuit chip is fabricated with generally uniform cross-section, by forming a first layer of positive photoresist on a substrate, soft-baking that first layer and exposing it for a short time with a wide-apertured mask or simply a UV blank flood exposure. Without developing the first layer, a second layer of positive resist is then applied over the first layer, soft-baked, and then exposed with a narrow-apertured mask. During the soft-baking of the second layer, some of its activator in the photoresist compound diffuses into the exposed portion of the first layer and modifies its solubility in such a way that, when the layers are subsequently developed, the developer partially undercuts the unexposed portion of the first layer to form in the photoresist an opening of generally uniform cross-section. This opening can then be filled by plating to produce a strong, integral interconnect post.