Patents by Inventor Wen Han

Wen Han has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9437472
    Abstract: Some embodiments of the present disclosure provide a semiconductor structure with a reduced line feature. The semiconductor structure includes a substrate, a first active region in the substrate and having a first sidewall, a second active region in the substrate and having a second sidewall, an isolation region contacting the first sidewall and the second sidewall. The above-mentioned semiconductor structure possesses a width of a top surface of the isolation region less than 50 nm and a width of a bottom surface of the isolation region more than 20 nm. Some embodiments provide a method for controlling a semiconductor line feature in a wafer, including patterning a hard mask exposing a line feature with a line width narrower than 50 nm on a wafer, forming a trench on the wafer correlated to the line feature by performing a plasma dry etch over the wafer, and filling the trench with isolation materials.
    Type: Grant
    Filed: February 27, 2014
    Date of Patent: September 6, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Wen-Han Fang, Po-Chi Wu
  • Patent number: 9425084
    Abstract: Embodiments of mechanisms of forming a semiconductor device structure are provided. The semiconductor device structure is provided. The semiconductor device structure includes a substrate having a front side and a back side. The semiconductor device structure also includes devices formed on the front side of the substrate and interconnect structures formed on the devices. The semiconductor device structure further includes a protection layer formed on the back side of the substrate, and the protection layer has a thickness over about 10 A.
    Type: Grant
    Filed: October 17, 2013
    Date of Patent: August 23, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wen-Shyang Tsai, Wen-Han Tan, Wen-Lung Ho
  • Patent number: 9382862
    Abstract: An air-fuel parameter control system includes an injector, an air-fuel parameter sensor, a fuel film parameter calculation module, an air-fuel parameter prediction module and a fuel injection calibration module. The injector injects fuel into an intake manifold. The air-fuel parameter sensor detects a detected air-fuel parameter in an exhaust pipe. The fuel film parameter calculation module calculates a fuel film parameter relating to a fuel film accumulated the intake manifold based on the detected air-fuel parameter, an amount of the injected fuel and an amount of air flowing into the engine. The air-fuel parameter prediction module predicts a predicted air-fuel parameter based on the detected air-fuel parameter and the fuel film parameter. The fuel injection calibration module calibrates the amount of the injected fuel based on a difference between a reference air-fuel parameter and the predicted air-fuel parameter.
    Type: Grant
    Filed: June 29, 2014
    Date of Patent: July 5, 2016
    Assignee: NATIONAL TAIPEI UNIVERSITY of TECHNOLOGY
    Inventors: Bo-Chiuan Chen, Yuh-Yih Wu, Wen-Han Tsai, Hsien-Chi Tsai
  • Patent number: 9384962
    Abstract: A method of manufacturing a metal gate is provided. The method includes providing a substrate. Then, a gate dielectric layer is formed on the substrate. A multi-layered stack structure having a work function metal layer is formed on the gate dielectric layer. An O2 ambience treatment is performed on at least one layer of the multi-layered stack structure. A conductive layer is formed on the multi-layered stack structure.
    Type: Grant
    Filed: April 7, 2011
    Date of Patent: July 5, 2016
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Guang-Yaw Hwang, Chun-Hsien Lin, Hung-Ling Shih, Jiunn-Hsiung Liao, Zhi-Cheng Lee, Shao-Hua Hsu, Yi-Wen Chen, Cheng-Guo Chen, Jung-Tsung Tseng, Chien-Ting Lin, Tong-Jyun Huang, Jie-Ning Yang, Tsung-Lung Tsai, Po-Jui Liao, Chien-Ming Lai, Ying-Tsung Chen, Cheng-Yu Ma, Wen-Han Hung, Che-Hua Hsu
  • Publication number: 20160190013
    Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a dielectric layer over a substrate. The substrate has a fin structure, and the dielectric layer has a trench exposing a portion of the fin structure. The method includes forming a gate material layer in the trench. The method includes forming a planarization layer over the gate material layer. The planarization layer includes a first material that is different from a second material of the gate material layer and a third material of the dielectric layer. The method includes performing an etching process to remove the planarization layer and a first upper portion of the gate material layer so as to form a gate in the trench.
    Type: Application
    Filed: February 18, 2015
    Publication date: June 30, 2016
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
    Inventors: Chai-Wei CHANG, Po-Chi WU, Wen-Han FANG
  • Patent number: 9335841
    Abstract: A computer readable media having at least one program code recorded thereon. An interference image determining method can be performed when the program code is read and executed. The interference image determining method comprises: (a) controlling a light source to illuminate an object on a detecting surface to generate an image; (b) controlling a sensor to catch a current frame of the image; (c) utilizing an image characteristic included in the current frame to determine a interference image part of the current frame; and (d) updating a defined interference image according to the determined interference image part.
    Type: Grant
    Filed: July 30, 2012
    Date of Patent: May 10, 2016
    Assignee: PixArt Imaging Inc.
    Inventors: Hsin-Chia Chen, Yen-Min Chang, Yu-Hao Huang, Wen-Han Yao, Ching-Lin Chung, Yung-Chang Lin, Tsung-Fa Wang, Ming-Tsan Kao
  • Publication number: 20160111543
    Abstract: A method includes forming an opening in a dielectric to reveal a protruding semiconductor fin, forming a gate dielectric on sidewalls and a top surface of the protruding semiconductor fin, and forming a conductive diffusion barrier layer over the gate dielectric. The conductive diffusion barrier layer extends into the opening. The method further includes forming a silicon layer over the conductive diffusion barrier layer and extending into the opening, and performing a dry etch on the silicon layer to remove horizontal portions and vertical portions of the silicon layer. After the dry etch, a conductive layer is formed over the conductive diffusion barrier layer and extending into the opening.
    Type: Application
    Filed: July 16, 2015
    Publication date: April 21, 2016
    Inventors: Wen-Han Fang, Po-Chi Wu
  • Publication number: 20160104704
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate, a first fin structure and a second fin structure disposed over the substrate. The semiconductor device structure includes a first gate stack overlapping the first fin structure. The first gate stack has a first width. The first gate stack includes a first work function layer. A first top surface of the first work function layer is positioned above the first fin structure by a first distance. The semiconductor device structure includes a second gate stack disposed overlapping the second fin structure. The first width is less than a second width of the second gate stack. A second top surface of a second work function layer of the second gate stack is positioned above the second fin structure by a second distance. The first distance is less than the second distance.
    Type: Application
    Filed: October 8, 2014
    Publication date: April 14, 2016
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
    Inventors: Wen-Han FANG, Chang-Yin CHEN, Ming-Chia TAI, Po-Chi WU
  • Patent number: 9313412
    Abstract: There is provided an image sensor including a light sensitive device and a digital signal processing circuit. The light sensitive device is configured to output a digital image. The digital signal processing circuit is configured to detect at least one feature point in the digital image and calculate a feature point coordinate of the at least one feature point.
    Type: Grant
    Filed: November 26, 2013
    Date of Patent: April 12, 2016
    Assignee: Pixart Imaging, Inc.
    Inventors: Chuan-Hsin Lee, Wen-Han Yao
  • Publication number: 20150377170
    Abstract: An air-fuel parameter control system includes an injector, an air-fuel parameter sensor, a fuel film parameter calculation module, an air-fuel parameter prediction module and a fuel injection calibration module. The injector injects fuel into an intake manifold. The air-fuel parameter sensor detects a detected air-fuel parameter in an exhaust pipe. The fuel film parameter calculation module calculates a fuel film parameter relating to a fuel film accumulated the intake manifold based on the detected air-fuel parameter, an amount of the injected fuel and an amount of air flowing into the engine. The air-fuel parameter prediction module predicts a predicted air-fuel parameter based on the detected air-fuel parameter and the fuel film parameter. The fuel injection calibration module calibrates the amount of the injected fuel based on a difference between a reference air-fuel parameter and the predicted air-fuel parameter.
    Type: Application
    Filed: June 29, 2014
    Publication date: December 31, 2015
    Inventors: Bo-Chiuan CHEN, Yuh-Yih WU, Wen-Han TSAI, Hsien-Chi TSAI
  • Patent number: 9184586
    Abstract: Some embodiments of the present disclosure relate to a low-power, area efficient ESD protection device that provides ESD protection to an ESD susceptible circuit. The ESD protection device has a trigger circuit with a resistor. The resistor has a first terminal connected to the first external pin and a second terminal connected directly to a gate of a SiGe based PMOS shunt transistor. The trigger circuit generates a trigger signal that drives the gate of the PMOS device to shunt power away from the ESD susceptible circuit when an ESD event is present. The SiGe based PMOS shunt transistor has a lower gate leakage than a conventional NMOS shunt transistors, thereby providing for an ESD circuit with a low leakage current at small gate lengths.
    Type: Grant
    Filed: June 26, 2012
    Date of Patent: November 10, 2015
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wen-Han Wang, Kuo-Ji Chen
  • Publication number: 20150303856
    Abstract: A motor driving circuit is provided. The motor driving circuit includes an else inverter and a self inverter. The else inverter includes an else-inverter rectifier and an else-inverter driving circuit. The self inverter includes a self-inverter driving circuit and a soft-start protection circuit. The soft-start protection circuit includes a first and a second protection diodes, a self-inverter capacitor and a self-inverter soft-start circuit. The first protection diode is electrically connected to a first else-inverter-rectifier output and a first self-inverter-driving-circuit input. The second protection diode is electrically connected to a second else-inverter-rectifier output and a second self-inverter-driving-circuit output. The self-inverter soft-start circuit and the self-inverter capacitor are connected in series between a first cathode and a second anode of the first and the second protection diodes.
    Type: Application
    Filed: February 4, 2015
    Publication date: October 22, 2015
    Inventors: Wen-Han LAN, Chia-Hao WU, Chih-Chung SHIH, Tsung-Yu LIN
  • Patent number: 9152240
    Abstract: A method for previewing an output character, and an electronic device are provided. In the present method, at least one touch signal generated by pressing at least one of the keys of a software input panel (SIP) is received. Then, an impending output character corresponding to the pressed key is determined from all relative characters thereof. Finally, showing a display window including at least the output character, and a display format of the output character in the display window is changed to specifically indicate the output character. As a result, the correctness of the pressed key on the SIP can be determined easily, and whether the impending output character is the expected character can be confirmed at the same time.
    Type: Grant
    Filed: September 16, 2009
    Date of Patent: October 6, 2015
    Assignee: HTC Corporation
    Inventor: Wen-Han Yeh
  • Publication number: 20150243547
    Abstract: Some embodiments of the present disclosure provide a semiconductor structure with a reduced line feature. The semiconductor structure includes a substrate, a first active region in the substrate and having a first sidewall, a second active region in the substrate and having a second sidewall, an isolation region contacting the first sidewall and the second sidewall. The above-mentioned semiconductor structure possesses a width of a top surface of the isolation region less than 50 nm and a width of a bottom surface of the isolation region more than 20 nm. Some embodiments provide a method for controlling a semiconductor line feature in a wafer, including patterning a hard mask exposing a line feature with a line width narrower than 50 nm on a wafer, forming a trench on the wafer correlated to the line feature by performing a plasma dry etch over the wafer, and filling the trench with isolation materials.
    Type: Application
    Filed: February 27, 2014
    Publication date: August 27, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: WEN-HAN FANG, PO-CHI WU
  • Patent number: 9069463
    Abstract: An operating method for dynamically adjusting a touch apparatus is disclosed herein. The touch apparatus includes a storage component and a touch component. The storage component is configured to store at least one application, and a plurality of weights of touch motion modes and touch motion modes corresponding to the application. The operating method includes determining whether execution of the application has started. When execution of the application has started, a plurality of touch motions corresponding to the executed application are received through the touch component. At least one of the weights of touch motion modes corresponding to the executed application is adjusted according to the touch motions. At least one of touch parameters is adjusted according to the weights of touch motion modes corresponding to the executed application.
    Type: Grant
    Filed: September 18, 2013
    Date of Patent: June 30, 2015
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Ming-Yu Chang, Chun-Ming Wang, Yun-Rui Chen, Chia-Hui Chen, Wen-Han Li, Fei-Zhi Guo, Ping-Hsien Niu
  • Patent number: 9035586
    Abstract: A motor driving device for protecting inrush current is disclosed, where the motor driving device includes a resistor, a capacitor, an electronic switch, a rectifier and a driving circuit. The capacitor is connected to the resistor in series. The electronic switch is connected to the resistor in parallel. The rectifier is connected to the resistor and the capacitor in parallel and is electrically connected to a power source. The driving circuit is connected to the resistor and the capacitor in parallel and is electrically connected to a motor.
    Type: Grant
    Filed: February 7, 2013
    Date of Patent: May 19, 2015
    Assignee: DELTA ELECTRONICS, INC.
    Inventor: Wen-Han Lan
  • Publication number: 20150108633
    Abstract: Embodiments of mechanisms of forming a semiconductor device structure are provided. The semiconductor device structure is provided. The semiconductor device structure includes a substrate having a front side and a back side. The semiconductor device structure also includes devices formed on the front side of the substrate and interconnect structures formed on the devices. The semiconductor device structure further includes a protection layer formed on the back side of the substrate, and the protection layer has a thickness over about 10 A.
    Type: Application
    Filed: October 17, 2013
    Publication date: April 23, 2015
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wen-Shyang TSAI, Wen-Han TAN, Wen-Lung HO
  • Publication number: 20150086849
    Abstract: A preparation method of an oligomer-polymer is provided. A maleimide is reacted with a barbituric acid to form a first oligomer-polymer. The first oligomer-polymer is then reacted with a phenylsiloxane oligomer to form a second oligomer-polymer. The phenylsiloxane oligomer is a compound represented by formula 1: Ph-Si(OH)xOy ??formula 1, wherein x is 0.65 to 2.82 and y is 0.09 to 1.17.
    Type: Application
    Filed: June 10, 2014
    Publication date: March 26, 2015
    Inventors: Fu-Ming Wang, Bing-Joe Hwang, Chorng-Shyan Chern, Jung-Mu Hsu, Wen-Han Li
  • Patent number: 8947403
    Abstract: An image sensing module utilizes an image sensor to sense objects and a mirror image of the objects in a mirror through a plurality of first light filtering components with a first transmission spectrum and a plurality of second light filtering components with a second transmission spectrum for generating an image. A light filtering module substantially having the first transmission spectrum is disposed in front of the mirror. The image includes a plurality of pixels. Each pixel includes a first sub data and a second sub data. The image sensing module utilizes an image sensing controller to detect real images corresponding to the objects and virtual images correspond to the mirror image of the objects from the image according to the first sub data and the second sub data of the plurality of pixels.
    Type: Grant
    Filed: June 23, 2011
    Date of Patent: February 3, 2015
    Assignee: PixArt Imaging Inc.
    Inventors: Wen-Han Yao, Chih-Hung Lu, Tzung-Min Su, Chih-Hsin Lin, Shu-Sian Yang
  • Publication number: 20140346881
    Abstract: A circuit includes a power-on control circuit and a voltage generating circuit. The power-on control circuit is configured to cause a power-on control signal to follow a voltage level of a first supply voltage during a first time period that a voltage level of a second supply voltage is less than a threshold value, and to set the power-on control signal to have a voltage level of a reference voltage during a second time period that the voltage level of the second supply voltage is greater than the threshold value. The voltage generating circuit is configured to generate a voltage signal responsive to the power-on control signal.
    Type: Application
    Filed: August 13, 2014
    Publication date: November 27, 2014
    Inventor: Wen-Han WANG