Patents by Inventor Wen Han

Wen Han has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8535574
    Abstract: This invention provides a transition metal complex of formula MXY2Z and a manufacturing method thereof, wherein M is selected from iron, ruthenium, and osmium; X represents a ligand shown in formula (II) wherein R1 and R1? are independently selected from COOH, PO3H2, PO4H2, SO3H2, SO4H2, and derivatives thereof; Y is selected from H2O, Cl, Br, CN, NCO, NCS, and NCSe; Z represents a bidentate ligand having at least two fluorinated chains. In addition, this invention also provides photovoltaic cells and a manufacturing method thereof.
    Type: Grant
    Filed: April 15, 2010
    Date of Patent: September 17, 2013
    Assignee: National Taipei University of Technology
    Inventors: Norman Lu, Jia-Sheng Shing, Wen-Han Tu
  • Publication number: 20130236051
    Abstract: A computer readable media having at least one program code recorded thereon. An interference image determining method can be performed when the program code is read and executed. The interference image determining method comprises: (a) controlling a light source to illuminate an object on a detecting surface to generate an image; (b) controlling a sensor to catch a current frame of the image; (c) utilizing an image characteristic included in the current frame to determine a interference image part of the current frame; and (d) updating a defined interference image according to the determined interference image part.
    Type: Application
    Filed: July 30, 2012
    Publication date: September 12, 2013
    Inventors: Hsin-Chia Chen, Yen-Min Chang, Yu-Hao Huang, Wen-Han Yao, Ching-Lin Chung, Yung-Chang Lin, Tsung-Fa Wang, Ming-Tsan Kao
  • Patent number: 8486795
    Abstract: A method of fabricating transistors includes: providing a substrate including an N-type well and P-type well; forming a first gate on the N-type well and a second gate on the P-type well, respectively; forming a third spacer on the first gate; forming an epitaxial layer in the substrate at two sides of the first gate; forming a fourth spacer on the second gate; forming a silicon cap layer covering the surface of the epitaxial layer and the surface of the substrate at two sides of the fourth spacer; and forming a first source/drain doping region and a second source/drain doping region at two sides of the first gate and the second gate respectively.
    Type: Grant
    Filed: April 12, 2012
    Date of Patent: July 16, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Wen-Han Hung, Tsai-Fu Chen, Shyh-Fann Ting, Cheng-Tung Huang, Kun-Hsien Lee, Ta-Kang Lo, Tzyy-Ming Cheng
  • Patent number: 8404533
    Abstract: A method for fabricating metal gate transistor is disclosed. The method includes the steps of: providing a substrate, wherein the substrate comprises a transistor region defined thereon; forming a gate insulating layer on the substrate; forming a stacked film on the gate insulating layer, wherein the stacked film comprises at least one etching stop layer, a polysilicon layer, and a hard mask; patterning the gate insulating layer and the stacked film for forming a dummy gate on the substrate; forming a dielectric layer on the dummy gate; performing a planarizing process for partially removing the dielectric layer until reaching the top of the dummy gate; removing the polysilicon layer of the dummy gate; removing the etching stop layer of the dummy gate for forming an opening; and forming a conductive layer in the opening for forming a gate.
    Type: Grant
    Filed: August 23, 2010
    Date of Patent: March 26, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Cheng-Yu Ma, Wen-Han Hung, Ta-Kang Lo, Tsai-Fu Chen, Tzyy-Ming Cheng
  • Patent number: 8403247
    Abstract: The slider case provides housing for a portable appliance and integrates a cable retractor containing a coil spring, a rotary disc, a cable, and a winding disc. The rotary disc has a top circular indentation where the coil spring is accommodated in the indentation. A number of gear teeth are provided around the rotary disc and the winding disc. The winding disc has a central axle for the winding of the cable. The winding disc is positioned such that its teeth engage those of the rotary disc. A spiral track and a centrifugal track are provided on the rotary disc and the casing member, respectively. A positioning ball, together with the spiral track and the centrifugal track, provides a positioning function. The cable can be configured to be pulled in a single direction with a connector or multiple directors at a free end.
    Type: Grant
    Filed: December 3, 2010
    Date of Patent: March 26, 2013
    Inventors: Ko-An Chen, Wen-Han Chang
  • Publication number: 20130072439
    Abstract: Disclosed are peptidomimetic macrocycles comprising a helix, such as an alpha helix, and methods of using such macrocycles for the treatment of disease such as cancer. In other aspects, the peptidomimetic macrocycle comprises an a,a-disubstituted amino acid, or may comprise a crosslinker linking the a-positions of at least two amino acids or at least one of said two amino acids may be an a,a-disubstituted amino acid. Further included is the targeting of components of the Wnt signaling pathway such as the Tcf4-/3-catenin complex.
    Type: Application
    Filed: September 22, 2010
    Publication date: March 21, 2013
    Inventors: Huw M. Nash, Rosana Kapeller-Libermann, Jia-wen Han, Tomi K. Sawyer, Justin Noehre, Noriyuki Kawahata
  • Patent number: 8390073
    Abstract: A transistor structure is provided in the present invention. The transistor structure includes: a substrate comprising a P-type well, a gate disposed on the P-type well, a first spacer disposed on the gate, an N-type source/drain region disposed in the substrate at two sides of the gate, a silicon cap layer covering the N-type source/drain region, a second spacer around the first spacer and the second spacer directly on and covering a portion of the silicon cap layer and a silicide layer disposed on the silicon cap layer.
    Type: Grant
    Filed: April 18, 2012
    Date of Patent: March 5, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Wen-Han Hung, Tsai-Fu Chen, Shyh-Fann Ting, Cheng-Tung Huang, Kun-Hsien Lee, Ta-Kang Lo, Tzyy-Ming Cheng
  • Publication number: 20130001704
    Abstract: A device includes a metal-oxide-semiconductor (MOS) device, which includes a gate electrode and a source/drain region adjacent the gate electrode. A first and a second contact plug are formed directly over and electrically connected to two portions of a same MOS component, wherein the same MOS component is one of the gate electrode and the source/drain region. The same MOS component is configured to be used as a resistor that is connected between the first and the second contact plugs.
    Type: Application
    Filed: June 28, 2011
    Publication date: January 3, 2013
    Applicant: Taiwan Semiconductor Manufacturing Company., Ltd.
    Inventors: Wen-Han Wang, Chen-Chih Wu, Sheng-Fang Cheng, Kuo-Ji Chen
  • Publication number: 20120329259
    Abstract: A method for fabricating a metal-oxide-semiconductor field-effect transistor includes the following steps. Firstly, a substrate is provided. A gate structure, a first spacer, a second spacer and a source/drain structure are formed over the substrate. The second spacer includes an inner layer and an outer layer. Then, a thinning process is performed to reduce the thickness of the second spacer, thereby retaining the inner layer of the second spacer. After a stress film is formed on the inner layer of the second spacer and the source/drain structure, an annealing process is performed. Afterwards, the stress film is removed.
    Type: Application
    Filed: June 22, 2011
    Publication date: December 27, 2012
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Ching-Sen LU, Wen-Han HUNG, Tsai-Fu CHEN, Tzyy-Ming CHENG
  • Patent number: 8336688
    Abstract: The cable retractor mainly contains a housing member, a coil spring, a rotary disc, a cable, and a winding disc. The rotary disc has a top circular indentation where the coil spring is accommodated in the indentation. A number of gear teeth are provided around the rotary disc and the winding disc. The winding disc has a central axle for the winding of the cable. The winding disc is positioned such that its teeth engage those of the rotary disc. A spiral track and a centrifugal track are provided on the rotary disc and the housing member, respectively. A positioning ball, together with the spiral track and the centrifugal track, provides a positioning function. The cable can be configured to be pulled in a single direction with a connector or multiple directors at a free end.
    Type: Grant
    Filed: December 3, 2010
    Date of Patent: December 25, 2012
    Inventors: Ko-An Chen, Wen-Han Chang
  • Publication number: 20120319214
    Abstract: A method for fabricating a metal gate includes the following steps. First, a substrate having an interfacial dielectric layer above the substrate is provided. Then, a gate trench having a barrier layer is formed in the interfacial dielectric layer. A source layer is disposed above the barrier layer. Next, a process is performed to have at least one element in the source layer move into the barrier layer. Finally, the barrier layer is removed and a metal layer fills up the gate trench.
    Type: Application
    Filed: June 16, 2011
    Publication date: December 20, 2012
    Inventors: Cheng-Yu Ma, Wen-Han Hung
  • Publication number: 20120309158
    Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate; forming a dummy gate on the substrate; forming a contact etch stop layer on the dummy gate and the substrate; performing a planarizing process to partially remove the contact etch stop layer; partially removing the dummy gate; and performing a thermal treatment on the contact etch stop layer.
    Type: Application
    Filed: June 6, 2011
    Publication date: December 6, 2012
    Inventors: Wen-Han Hung, Tsai-Fu Chen, Ta-Kang Lo, Tzyy-Ming Cheng
  • Publication number: 20120289015
    Abstract: A method for fabricating a semiconductor device with enhanced channel stress is provided. The method includes the following steps. Firstly, a substrate is provided. Then, at least one source/drain region and a channel are formed in the substrate. A dummy gate is formed over the channel. A contact structure is formed over the source/drain region. After the contact structure is formed, the dummy gate is removed to form a trench.
    Type: Application
    Filed: May 13, 2011
    Publication date: November 15, 2012
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Ching-Sen Lu, Wen-Han Hung, Tsai-Fu Chen, Tzyy-Ming Cheng
  • Publication number: 20120256276
    Abstract: A method of manufacturing a metal gate is provided. The method includes providing a substrate. Then, a gate dielectric layer is formed on the substrate. A multi-layered stack structure having a work function metal layer is formed on the gate dielectric layer. An O2 ambience treatment is performed on at least one layer of the multi-layered stack structure. A conductive layer is formed on the multi-layered stack structure.
    Type: Application
    Filed: April 7, 2011
    Publication date: October 11, 2012
    Inventors: Guang-Yaw Hwang, Chun-Hsien Lin, Hung-Ling Shih, Jiunn-Hsiung Liao, Zhi-Cheng Lee, Shao-Hua Hsu, Yi-Wen Chen, Cheng-Guo Chen, Jung-Tsung Tseng, Chien-Ting Lin, Tong-Jyun Huang, Jie-Ning Yang, Tsung-Lung Tsai, Po-Jui Liao, Chien-Ming Lai, Ying-Tsung Chen, Cheng-Yu Ma, Wen-Han Hung, Che-Hua Hsu
  • Publication number: 20120212639
    Abstract: An image sensor includes a sensor matrix including a plurality of sensing elements and a plurality of shutter control lines. Each sensing element includes an electronic shutter and a photo-detector, wherein the electronic shutter controls the exposure time of the photo-detector. Each shutter control line couples to a row or column of the electronic shutters, whereby different rows or columns of the electronic shutters can be independently controlled, and the photo-detectors in the same row or column can have the same exposure time.
    Type: Application
    Filed: February 20, 2012
    Publication date: August 23, 2012
    Applicant: PIXART IMAGING INC.
    Inventors: Ren Hau GU, Chih Hsin LIN, Wen Han YAO, Hung Ching LAI, Shu Sian YANG, Yu Hao HUANG, Chih Hung LU, En Feng HSU, Chi Chieh LIAO
  • Publication number: 20120199890
    Abstract: A transistor structure is provided in the present invention. The transistor structure includes: a substrate comprising a P-type well, a gate disposed on the P-type well, a first spacer disposed on the gate, an N-type source/drain region disposed in the substrate at two sides of the gate, a silicon cap layer covering the N-type source/drain region, a second spacer around the first spacer and the second spacer directly on and covering a portion of the silicon cap layer and a silicide layer disposed on the silicon cap layer.
    Type: Application
    Filed: April 18, 2012
    Publication date: August 9, 2012
    Inventors: Wen-Han Hung, Tsai-Fu Chen, Shyh-Fann Ting, Cheng-Tung Huang, Kun-Hsien Lee, Ta-Kang Lo, Tzyy-Ming Cheng
  • Publication number: 20120196418
    Abstract: A method of fabricating transistors includes: providing a substrate including an N-type well and P-type well; forming a first gate on the N-type well and a second gate on the P-type well, respectively; forming a third spacer on the first gate; forming an epitaxial layer in the substrate at two sides of the first gate; forming a fourth spacer on the second gate; forming a silicon cap layer covering the surface of the epitaxial layer and the surface of the substrate at two sides of the fourth spacer; and forming a first source/drain doping region and a second source/drain doping region at two sides of the first gate and the second gate respectively.
    Type: Application
    Filed: April 12, 2012
    Publication date: August 2, 2012
    Inventors: Wen-Han Hung, Tsai-Fu Chen, Shyh-Fann Ting, Cheng-Tung Huang, Kun-Hsien Lee, Ta-Kang Lo, Tzyy-Ming Cheng
  • Publication number: 20120188203
    Abstract: An image sensing module utilizes an image sensor to sense objects and a mirror image of the objects in a mirror through a plurality of first light filtering components with a first transmission spectrum and a plurality of second light filtering components with a second transmission spectrum for generating an image. A light filtering module substantially having the first transmission spectrum is disposed in front of the mirror. The image includes a plurality of pixels. Each pixel includes a first sub data and a second sub data. The image sensing module utilizes an image sensing controller to detect real images corresponding to the objects and virtual images correspond to the mirror image of the objects from the image according to the first sub data and the second sub data of the plurality of pixels.
    Type: Application
    Filed: June 23, 2011
    Publication date: July 26, 2012
    Inventors: Wen-Han Yao, Chih-Hung Lu, Tzung-Min Su, Chih-Hsin Lin, Shu-Sian Yang
  • Publication number: 20120184748
    Abstract: A compound is useful as a recyclable catalyst for esterification or acylation of alcohols and consists of saccharine and a compound comprising a pyridine moiety. In addition, also a method of preparing the compound and an ester synthesis method using the compound are introduced.
    Type: Application
    Filed: May 25, 2011
    Publication date: July 19, 2012
    Applicant: NATIONAL TAIPEI UNIVERSITY OF TECHNOLOGY
    Inventors: NORMAN LU, WEN-HAN TU, CHIEH-KENG LI
  • Patent number: 8222113
    Abstract: A method for forming a metal-oxide-semiconductor (MOS) device includes at least steps of forming a pair of trenches in a substrate at both sides of a gate structure, filling the trenches with a silicon germanium layer by a selective epitaxy growth process, forming a cap layer on the silicon germanium layer by a selective growth process, and forming a pair of source/drain regions by performing an ion implantation process. Hence, the undesirable effects caused by ion implantation can be mitigated.
    Type: Grant
    Filed: May 20, 2009
    Date of Patent: July 17, 2012
    Assignee: United Microelectronics Corp.
    Inventors: Shyh-Fann Ting, Shih-Chieh Hsu, Cheng-Tung Huang, Chih-Chiang Wu, Wen-Han Hung, Meng-Yi Wu, Li-Shian Jeng, Chung-Min Shih, Kun-Hsien Lee, Tzyy-Ming Cheng