Abstract: A system and method of determining a cell layout are disclosed. The method includes receiving a circuit design corresponding to a predetermined circuit design, the circuit design having a first set of cells and abutting adjacent cells in the first set of cells, the abutted cells having a first boundary pattern therebetween. The first boundary pattern is exchanged with a second boundary pattern based on a number or positions of signal wires in the first boundary pattern. A cell layout for use in a patterning process can then be determined, the cell layout including the second boundary pattern.

Abstract: An exemplary liquid crystal display (LCD) provides data lines, gate lines, and pixel units arranged as a matrix array. A method for driving the LCD includes a step of analyzing and determining polarities of one column of the pixel units as determining pixels, thereby defining a first polarity group and a second polarity group, and a step of sequentially applying corresponding data signals to a part of the whole pixel units that are arranged at same rows with the first polarity group in a part of a period of a frame. Corresponding data signals are sequentially applied to the other part of the whole pixel units that are arranged at same rows with the second polarity group in another part of a period of a frame.

Abstract: An exemplary liquid crystal display (LCD) provides data lines, gate lines, and pixel units arranged as a matrix array. A method for driving the LCD includes a step of analyzing and determining polarities of one column of the pixel units as determining pixels, thereby defining a first polarity group and a second polarity group, and a step of sequentially applying corresponding data signals to a part of the whole pixel units that are arranged at same rows with the first polarity group in a part of a period of a frame. Corresponding data signals are sequentially applied to the other part of the whole pixel units that are arranged at same rows with the second polarity group in another part of a period of a frame.

Abstract: An image privacy protecting method is provided. Positions of a privacy protecting region and a normal display region are acknowledged first. When a frame of image is processed, a first image data will be displayed in the privacy protecting region is processed in a narrow viewing mode to obtain a narrow viewing driving data, and a second image data will be displayed in the normal display region is processed in a wide viewing mode to obtain a wide viewing driving data. Finally, display operations are performed in the privacy protecting region and the normal display region respectively according to the narrow viewing driving data and the wide viewing driving data.

Abstract: A method for manufacturing a glass cover is provided, which includes following steps. A glass substrate is provided, wherein the glass substrate has a front surface and a back surface opposite to the front surface, and the front surface has a display region and a non-display region adjacent to the display region. The non-display region of the glass substrate is hazed. A glass cover and an electronic device are also provided. The glass cover is adapted to be disposed at an installation opening of a casing of the electronic device. The glass cover includes a glass substrate. The glass substrate has a front surface and a back surface opposite to the front surface, and the front surface has a display region and a non-display region adjacent to the display region, and the non-display region is hazed.

Abstract: An LCD panel with color washout improvement. In one embodiment, the LCD panel includes a plurality of pixels spatially arranged in a matrix form, each pixel defined between a respective pair of scanning lines (Gn, Gn—CS) and two neighboring data lines Dm and Dm+1, comprising a pixel electrode, a first transistor electrically coupled to the scanning lines Gn, the date line Dm and the pixel electrode, and a second transistor electrically coupled to the scanning lines Gn—CS and the pixel electrode such that when N pairs of scanning signals to the N pairs of scanning lines {Gn, Gn—CS} and a plurality of data signals to the data lines, the pixel electrode of each pixel has a first voltage at the first duration of a frame period, and a second voltage at the second duration of the frame period, respectively. The first and second voltages are substantially different from each other.

Abstract: A liquid crystal display (LCD) panel is provided. A pixel structure of the LCD panel has an asymmetrical liquid crystal alignment. The LCD panel is divided into an array of display blocks. When the LCD panel is in a narrow viewing angle display mode, some of the display blocks are disabled or darkened so that a displayed image is interfered by the disabled or darkened display blocks when it is viewed from the side. Thereby, an anti-peep effect is achieved.

Abstract: A method comprises: (a) transforming a layout of a layer of an integrated circuit (IC) or micro electro-mechanical system (MEMS) to a curvilinear mask layout; (b) replacing at least one pattern of the curvilinear mask layout with a previously stored fracturing template having approximately the same shape as the pattern, to form a fractured IC or MEMS layout; and (c) storing, in a non-transitory storage medium, an e-beam generation file including a representation of the fractured IC or MEMS layout, to be used for fabricating a photomask.

Abstract: An exemplary pixel circuit and a flat display panel using the same are provided. The pixel circuit includes three sub-electrode control circuits. The sub-electrode control circuits are controlled by two scan lines to receive data transmitted from two data lines. One of the three sub-electrode control circuits adjusts stored data by charge sharing. Accordingly, a display control of the pixel circuit is achieved by the three sub-electrode control circuits.

Abstract: A pixel array including first scan lines, second scan lines, data lines, and sub-pixels is provided. Each sub-pixel includes a first switch, a second switch, a first pixel electrode electrically connected to the first switch, a second pixel electrode electrically connected to the second switch, a third switch, and common lines connected with each other and disposed under the first and the second pixel electrode. The first and the second switch are electrically connected to the same first scan line and data line. The first scan line is located between the first and second pixel electrode. The third switch is electrically connected to the second scan line and the first pixel electrode and has a floating terminal. The floating terminal is capacitively coupled to the common line under the second pixel electrode to form a capacitor.

Abstract: A pixel structure of a display panel includes a gate line, a first data line, a second data line, a first active switching device, a second active switching device, a first pixel electrode and a second pixel electrode. The first pixel electrode is electrically connected to the first active switching device. The first pixel electrode includes a first main electrode disposed adjacent to one side of the first data line, and a second main electrode disposed adjacent to one side of the second data line. The second pixel electrode is electrically connected to the second active switching device. The second pixel electrode is disposed between the first main electrode and the second main electrode of the first pixel electrode.

Abstract: Semiconductor devices and methods of manufacture thereof are disclosed. In one embodiment, a semiconductor device includes a workpiece and a plurality of first conductive lines disposed over the workpiece in a metallization layer. A plurality of second conductive lines is disposed over the workpiece in the metallization layer. The plurality of second conductive lines comprises a greater vertical height in a cross-sectional view of the workpiece than a vertical height of the plurality of first conductive lines.

Abstract: Methods for generating a device layout are provided. First, design rules corresponding to a specific technology are received. A selection of at least one element and a parameter value corresponding to at least one parameter on the selected element are received. A draft device layout corresponding to the selected element is generated by a device generator by referencing the parameter value and the design rules. A script is then executed to modify the draft device layout to generate an updated device layout. The script includes at least one command, and when the script is executed, the at least one command is performed to modify the parameter value of the at least one parameter of the selected element and cause the device generator to delete the old draft device layout and generate a new draft device layout by referencing the modified parameter value and the design rules.

Abstract: An erasable programmable single-poly nonvolatile memory includes a substrate structure; a floating gate transistor having a floating gate, a gate oxide layer under the floating gate, and a channel region, wherein the channel region is formed in a N-well region; and an erase gate region, wherein the floating gate is extended to and is adjacent to the erase gate region and the erase gate region comprises a n-type source/drain region connected to an erase line voltage and a P-well region. The N-well and P-well region are formed in the substrate structure. The gate oxide layer comprises a first portion above the channel region of the floating gate transistor and a second portion above the erase gate region, and a thickness of the first portion of the gate oxide layer is different from a thickness of the second portion of the gate oxide layer.

Abstract: Disclosed herein is an adjustable viewing angle display device. The display device includes a display panel composed of a first substrate, a second substrate, a display medium layer interposed therebetween, a first electrode, a second electrode and a third electrode. Pluralities of sub-pixels are defined in the display panel. The first and second electrodes are disposed on the first substrate in the sub-pixels. The first electrode is spaced apart from the second electrode. The third electrode is disposed on the second substrate. When the display device is operated in a narrow viewing angle mode, there exists a non-zero potential difference between the second electrode and the third electrode, and when the sub-pixel is at gray level of zero, the potential difference between the first electrode and the second electrode is not zero. A driving method for driving the display device is disclosed as well.

Abstract: Disclosed herein is a display device with an adjustable viewing angle. The display device at least includes a first sub-pixel and a second sub-pixel adjacent to the first sub-pixel. When the display device is operated in a wide viewing angle mode, the first and second sub-pixels each have an on-axis brightness at a predetermined gray level. When the display device is operated in a narrow viewing angle mode, the first and second sub-pixels respectively have a first on-axis brightness at a first gray level and a second on-axis brightness at a second gray level. The first on-axis brightness at the first gray level is substantially less than the on-axis brightness at the predetermined gray level of the first sub-pixel.

Abstract: A method comprises: (a) transforming a layout of a layer of an integrated circuit (IC) or micro electro-mechanical system (MEMS) to a curvilinear mask layout; (b) replacing at least one pattern of the curvilinear mask layout with a previously stored fracturing template having approximately the same shape as the pattern, to form a fractured IC or MEMS layout; and (c) storing, in a non-transitory storage medium, an e-beam generation file including a representation of the fractured IC or MEMS layout, to be used for fabricating a photomask.

Abstract: An electronic device (106), and methods thereof, for managing displayed content is disclosed herein. A graphic image is provided at a surface of a touch screen. A photographic image is received at a photographic sensor (102) distal from the surface of the touch screen. The photographic image includes a first photographic fragment of at least a part of an object (108) obscuring a portion of the graphic image and a second photographic fragment of a remainder of the graphic image that is unobscured by the at least a part of the object (108). For one embodiment, the first photographic fragment is transmitted to a display screen (110) distinct from the touch screen and is superimposed over a portion of the graphic image provided at the surface of the touch screen. For another embodiment, a graphic fragment corresponding to the second photographic fragment is transmitted to the display screen (110) and superimposed over the photographic image.

Abstract: An exemplary liquid crystal display (LCD) provides data lines, gate lines, and pixel units arranged as a matrix array. A method for driving the LCD includes a step of analyzing and determining polarities of one column of the pixel units as determining pixels, thereby defining a first polarity group and a second polarity group, and a step of sequentially applying corresponding data signals to a part of the whole pixel units that are arranged at same rows with the first polarity group in a part of a period of a frame. Corresponding data signals are sequentially applied to the other part of the whole pixel units that are arranged at same rows with the second polarity group in another part of a period of a frame.

Abstract: A non-volatile memory cell comprises a coupling device, a first and a second select transistor, and a first and a second floating gate transistor is disclosed. The coupling device is formed in a first conductivity region. The first select transistor is serially connected to the first floating gate transistor and the second select transistor. Moreover, the first select transistor, the first floating gate transistor, and the second select transistor are formed in a second conductivity region. The second floating gate transistor is formed in a third conductivity region, wherein the first conductivity region, the second conductivity region, and the third conductivity region are formed in a fourth conductivity region. The first conductivity region, the second conductivity region, and the third conductivity region are wells, and the fourth conductivity region is a deep well. The third conductivity region surrounds the first conductivity region and the second conductivity region.