Abstract: A structure of semiconductor device package having inter-adhesion with gap comprising: a chip with bonding pads and a sensor area embedded into a substrate with die window and inter-connecting through holes, wherein a RDL is formed over the substrate for coupling between the bonding pads and the inter-connecting through holes; a multiple rings (dam bar) formed over the substrate, the RDL, and the bonding pads area except the sensor area; an adhesive glues fill into the space of the multiple ring except the sensor area; and a transparency material bonded on the top of the multiple ring and the adhesive glues, wherein the adhesive glues adhesion between the transparency material and the multiple rings.

Abstract: A nitride trapping memory device includes a comparator, a bias unit, a memory cell, a cycling cell, a compensation cell and a control unit. The comparator has a reference voltage. The bias unit is for outputting a bias voltage to the comparator, and the comparator outputs a bit value according to comparison of the bias voltage and the reference voltage. The memory cell is connected to the bias unit via a first switch. The cycling cell is connected to the bias unit via a second switch. The compensation cell is connected to the bias unit via a third switch. The control unit is for controlling the cycling cell and the compensation cell according to the bit value.

Abstract: A method for soft configuring communication a memory device to act as a Key Card that can switch on or off some particular functions of either an application program or the memory device itself. The method comprising the steps of: connecting the memory device to an external device; running a specific application program on the external device, the application program writing and storing a specific data into the memory device, the specific data including at least a command and a key; the memory device generating a response value according to the command and key of the specific data; and the external device reading the response value from the memory device and checking a status of the response value; if the response value is checked to be valid, then the application program will be able to access the memory device by using functions defined by the command; if the response value is checked to be invalid, then functions of the application program will be restricted.

Abstract: The present invention provides a structure of multi-chips package and Method of the same comprising a substrate with a pre-formed die receiving cavity formed within an upper surface of the substrate. A die is disposed within the die receiving cavity by adhesion and an elastic dielectric layer filled into a gap between the die and the substrate to absorb thermal mechanical stress; therefore the thickness of the package is reduced and the CTE mismatch of the structure is reduced. The present invention also provides a structure for SIP with higher reliability and lower manufacturing cost. the process is simpler and it is easy to form the multi-chips package than the traditional one. Therefore, the present invention discloses a fan-out WLP with reduced thickness and good CTE matching performance.

Abstract: An antenna is formed integrally into one piece and has a ground plane, a feeding strip and two pairs of radiating patches. The feeding strip is connected integrally to the ground plane. The pairs of the radiating patches are formed symmetrically and integrally on the feeding strip. The antenna formed integrally into one piece simplifies the manufacture of the antenna lowers the manufacturing cost of the antenna.

Abstract: The present invention provides a semiconductor device package with the die receiving through hole and connecting through holes structure comprising a substrate with a die receiving through hole, connecting through holes structure and first contact pads on an upper surface and second contact pads on a lower surface of the substrate. A die is disposed within the die receiving through hole. A first adhesion material is formed under the die and a second adhesion material is filled in the gap between the die and sidewall of the die receiving though hole of the substrate. Further, a bonding wire is formed to couple and the bonding pads and the first contact pads. A dielectric layer is formed on the bonding wire, the die and the substrate.

Abstract: The present invention provides a structure of package comprising a substrate with a die through hole and a contact through holes structure formed there through, wherein a terminal pad is formed under the contact through hole structure and a contact pad is formed on a upper surface of the substrate. A die having a micro lens area is disposed within the die through hole by adhesion. A thick dielectric layer is formed on the die and the substrate except the micro lens, bonding pads and contact pads. A wire bonding is formed on the die and the substrate, wherein the wire bonding is coupled to the die and the contact pad. And core paste is filled into the gap between the die edge and the sidewall of the die through hole of the substrate. A transparent cover is disposed on the die and the thick dielectric layer by adhesion to create a gap between the transparent cover.

Abstract: The present invention provides a structure of package comprising a substrate with a die through hole and a contact through holes structure formed there through, wherein a terminal pad is formed under the contact through hole structure and a contact pad is formed on a upper surface of the substrate. A die having a micro lens area is disposed within the die through hole by adhesion. A wire bonding is formed on the die and the substrate, wherein the wire bonding is coupled to the die and the contact pad. A protective layer is formed to cover the wire bonding. A transparent cover is disposed on the die within the die through hole by adhesion to expose the micro lens area. Conductive bumps are coupled to the terminal pads.

Abstract: A nitride trapping memory device includes a comparator, a bias unit, a memory cell, a cycling cell, a compensation cell and a control unit. The comparator has a reference voltage. The bias unit is for outputting a bias voltage to the comparator, and the comparator outputs a bit value according to comparison of the bias voltage and the reference voltage. The memory cell is connected to the bias unit via a first switch. The cycling cell is connected to the bias unit via a second switch. The compensation cell is connected to the bias unit via a third switch. The control unit is for controlling the cycling cell and the compensation cell according to the bit value.

Abstract: The present invention provides an image sensor module structure comprising a substrate with a die receiving cavity formed within an upper surface of the substrate and conductive traces within the substrate and a die having a micro lens disposed within the die receiving cavity. A dielectric layer is formed on the die and the substrate, a re-distribution conductive layer (RDL) is formed on the dielectric layer, wherein the RDL is coupled to the die and the conductive traces and the dielectric layer has an opening to expose the micro lens. A lens holder is attached on the substrate and the lens holder has a lens attached an upper portion of the lens holder. A filter is attached between the lens and the micro lens. The structure further comprises a passive device on the upper surface of the substrate within the lens holder.

Abstract: A method for a communication device, receiving MMS messages, receives an SMS message from a system service terminal. When the received SMS message is determined as a notification message related to an MMS message, the values of a first flag and a second flag are detected. When both the first and second flags are of a first value, the SMS message is sent to a message client terminal, the first flag is set to a second value, and a timer is activated. Next, the second flag is set to the second value and the MMS message is retrieved from the system service terminal. Last, the second flag is set to the first value after finishing retrieving the MMS message, and the first flag is set to the first value when the timer has expired.

Abstract: A scanning device includes a housing, a transparent plate, an document feeder and an image capture module. The housing has an opening and the transparent plate covers the opening. The transparent plate has a stripe area, a first side neighboring to the stripe area, and a second side. The document feeder has an aperture. The image capture module, capable to move below the transparent plate, has a first scanning origin corresponding to the stripe area, and a second scanning origin corresponding to the second side. When the object is placed on the transparent plate, the image capture module moves from the second scanning origin toward the stripe area to scan the object. When the object is placed on the document feeder, the object is transported to pass the first scanning origin, and the image capture module is simultaneously positioned below the stripe area to scan the object through the aperture.

Abstract: The present invention is to provide a method for making a shadow mask for an opposed discharge plasma display panel by etching one lateral surface of a metal slab to produce a plurality of parallel and equidistant barrier ribs along the vertical and horizontal directions on the lateral surface and a discharging cell by enclosing every four adjacent barrier ribs. A shadow hole is formed at the middle of each discharging cell and etched through the metal slab, and at least one groove interconnected to the shadow holes is produced on another lateral surface of the metal slab by utilizing a rolling process or a stamping process. The adjacent grooves are interconnected with each other, and a plurality of air guide channels is formed on another lateral side, such that a shadow mask can be made in a simple and fast manner, chemical pollutions caused by a traditional double-sided etching can be minimized, and the product yield rate and the manufacturing cost can be effectively improved and lowered.

Abstract: An optical data recording/reproducing system comprises a data slicer and a data extractor, wherein the data slicer receives the analog RF signal from the identification area and generates a digital mask signal and a digital pulse signal, and the reference clock generator comprises a phase-locked loop for receiving the digital pulse signal and the digital mask signal and generates the reference clock signal to the data extractor by performing phase-locked loop control, so that the data extractor extracts an identification area data signal and an identification area clock signal from the digital mask signal according to the reference clock signal.

Abstract: A semiconductor device comprising the following. A structure having: a capacitor; a first resistor; and a second resistor each within at least a portion of an oxide structure and a metal-oxide semiconductor electrode not within at least a portion of the oxide structure. The capacitor comprising: a lower capacitor first doped polysilicon portion; a capacitor interpoly oxide film portion thereover; and an upper capacitor second doped polysilicon portion over at least a portion of the capacitor interpoly oxide film portion. The first resistor comprising a lower first resistor first doped polysilicon portion and an upper first resistor second doped polysilicon portion thereover. The second resistor comprising a lower second resistor first doped polysilicon portion and an upper interpoly oxide film portion thereover. The metal-oxide semiconductor electrode comprising a lower metal-oxide semiconductor first doped polysilicon portion and an upper metal-oxide semiconductor second doped polysilicon portion thereover.

Abstract: A semiconductor material structure includes at least one region capable of generating electrons and holes each having an associated mean kinetic energy during operation. A material layer in proximity to the region provides an associated potential energy larger than the mean kinetic energy associated with the generated electrons and the mean kinetic energy associated with the holes.

Abstract: High frequency components of audio signals are reconstructed from the aspects of envelope and fine detail. The envelopes of the high frequency components are found through linear extrapolation of signals with frequencies lower than a cutoff frequency point. One method of reconstructing high frequency components is based on the linear extrapolation on the logarithm scale magnitudes of the transform coefficients of the audio signal in a frequency domain. The linear extrapolation is a linear approximation based on minimizing least squares of the logarithm scale magnitudes of the transform coefficients of the low frequency components. Another method is based on the linear extrapolation on the logarithm scale magnitudes of the envelope elements of the filterbank signals of the audio signal over a time segment. The linear extrapolation is a linear approximation based on minimizing least squares of the logarithm scale magnitudes of the envelope elements of the low frequency filterbank signals.

Abstract: A multi-induction loop layout of an electromagnetic inductive system is disclosed. The multi-induction loop layout of the invention comprises a plurality of inductive loops, one terminal of each inductive loop connecting to a loop switch, and the other terminal connecting to the common node. Every logical inductive loop is a relative close inductive loop, the relative close inductive loop possessing a plurality of -type sections, forming a sawtooth-shaped region and corresponding to and closing each other to form a plurality of close-like regions. The form of which gradually approaches the multi-induction loop layout.

Abstract: The present invention discloses a structure of package comprising: a substrate with a die receiving through hole, a connecting through hole structure and a first contact pad; a die having micro lens area disposed within the die receiving through hole; a transparent cover covers the micro lens area; a surrounding material formed under the die and filled in the gap between the die and sidewall of the die receiving though hole; a dielectric layer formed on the die and the substrate; a re-distribution layer (RDL) formed on the dielectric layer and coupled to the first contact pad; a protection layer formed over the RDL; a second contact pad formed at the lower surface of the substrate and under the connecting through hole structure; and a transparent base formed on the protection layer.