Abstract: The present invention provides an image sensor module structure comprising a substrate with a die receiving cavity formed within an upper surface of the substrate and conductive traces within the substrate and a die having a micro lens disposed within the die receiving cavity. A dielectric layer is formed on the die and the substrate, a re-distribution conductive layer (RDL) is formed on the dielectric layer, wherein the RDL is coupled to the die and the conductive traces and the dielectric layer has an opening to expose the micro lens. A lens holder is attached on the substrate and the lens holder has a lens attached an upper portion of the lens holder. A filter is attached between the lens and the micro lens. The structure further comprises a passive device on the upper surface of the substrate within the lens holder.

Abstract: A scanning device includes a housing, a transparent plate, an document feeder and an image capture module. The housing has an opening and the transparent plate covers the opening. The transparent plate has a stripe area, a first side neighboring to the stripe area, and a second side. The document feeder has an aperture. The image capture module, capable to move below the transparent plate, has a first scanning origin corresponding to the stripe area, and a second scanning origin corresponding to the second side. When the object is placed on the transparent plate, the image capture module moves from the second scanning origin toward the stripe area to scan the object. When the object is placed on the document feeder, the object is transported to pass the first scanning origin, and the image capture module is simultaneously positioned below the stripe area to scan the object through the aperture.

Abstract: The present invention is to provide a method for making a shadow mask for an opposed discharge plasma display panel by etching one lateral surface of a metal slab to produce a plurality of parallel and equidistant barrier ribs along the vertical and horizontal directions on the lateral surface and a discharging cell by enclosing every four adjacent barrier ribs. A shadow hole is formed at the middle of each discharging cell and etched through the metal slab, and at least one groove interconnected to the shadow holes is produced on another lateral surface of the metal slab by utilizing a rolling process or a stamping process. The adjacent grooves are interconnected with each other, and a plurality of air guide channels is formed on another lateral side, such that a shadow mask can be made in a simple and fast manner, chemical pollutions caused by a traditional double-sided etching can be minimized, and the product yield rate and the manufacturing cost can be effectively improved and lowered.

Abstract: An optical data recording/reproducing system comprises a data slicer and a data extractor, wherein the data slicer receives the analog RF signal from the identification area and generates a digital mask signal and a digital pulse signal, and the reference clock generator comprises a phase-locked loop for receiving the digital pulse signal and the digital mask signal and generates the reference clock signal to the data extractor by performing phase-locked loop control, so that the data extractor extracts an identification area data signal and an identification area clock signal from the digital mask signal according to the reference clock signal.

Abstract: A semiconductor device comprising the following. A structure having: a capacitor; a first resistor; and a second resistor each within at least a portion of an oxide structure and a metal-oxide semiconductor electrode not within at least a portion of the oxide structure. The capacitor comprising: a lower capacitor first doped polysilicon portion; a capacitor interpoly oxide film portion thereover; and an upper capacitor second doped polysilicon portion over at least a portion of the capacitor interpoly oxide film portion. The first resistor comprising a lower first resistor first doped polysilicon portion and an upper first resistor second doped polysilicon portion thereover. The second resistor comprising a lower second resistor first doped polysilicon portion and an upper interpoly oxide film portion thereover. The metal-oxide semiconductor electrode comprising a lower metal-oxide semiconductor first doped polysilicon portion and an upper metal-oxide semiconductor second doped polysilicon portion thereover.

Abstract: A semiconductor material structure includes at least one region capable of generating electrons and holes each having an associated mean kinetic energy during operation. A material layer in proximity to the region provides an associated potential energy larger than the mean kinetic energy associated with the generated electrons and the mean kinetic energy associated with the holes.

Abstract: High frequency components of audio signals are reconstructed from the aspects of envelope and fine detail. The envelopes of the high frequency components are found through linear extrapolation of signals with frequencies lower than a cutoff frequency point. One method of reconstructing high frequency components is based on the linear extrapolation on the logarithm scale magnitudes of the transform coefficients of the audio signal in a frequency domain. The linear extrapolation is a linear approximation based on minimizing least squares of the logarithm scale magnitudes of the transform coefficients of the low frequency components. Another method is based on the linear extrapolation on the logarithm scale magnitudes of the envelope elements of the filterbank signals of the audio signal over a time segment. The linear extrapolation is a linear approximation based on minimizing least squares of the logarithm scale magnitudes of the envelope elements of the low frequency filterbank signals.

Abstract: A multi-induction loop layout of an electromagnetic inductive system is disclosed. The multi-induction loop layout of the invention comprises a plurality of inductive loops, one terminal of each inductive loop connecting to a loop switch, and the other terminal connecting to the common node. Every logical inductive loop is a relative close inductive loop, the relative close inductive loop possessing a plurality of -type sections, forming a sawtooth-shaped region and corresponding to and closing each other to form a plurality of close-like regions. The form of which gradually approaches the multi-induction loop layout.

Abstract: The present invention discloses a structure of package comprising: a substrate with a die receiving through hole, a connecting through hole structure and a first contact pad; a die having micro lens area disposed within the die receiving through hole; a transparent cover covers the micro lens area; a surrounding material formed under the die and filled in the gap between the die and sidewall of the die receiving though hole; a dielectric layer formed on the die and the substrate; a re-distribution layer (RDL) formed on the dielectric layer and coupled to the first contact pad; a protection layer formed over the RDL; a second contact pad formed at the lower surface of the substrate and under the connecting through hole structure; and a transparent base formed on the protection layer.

Abstract: A nitride trapping memory device includes a comparator, a bias unit, a memory cell, a cycling cell, a compensation cell and a control unit. The comparator has a reference voltage. The bias unit is for outputting a bias voltage to the comparator, and the comparator outputs a bit value according to comparison of the bias voltage and the reference voltage. The memory cell is connected to the bias unit via a first switch. The cycling cell is connected to the bias unit via a second switch. The compensation cell is connected to the bias unit via a third switch. The control unit is for controlling the cycling cell and the compensation cell according to the bit value.

Abstract: A chip package including a multilayer substrate, an adhesive core layer and a chip is provided. The multilayer substrate has a plurality of material layers. The adhesive core layer is disposed on the multilayer substrate. The chip is disposed in the adhesive core layer. The chip has an active surface exposed outside the adhesive core layer. The chip includes a plurality of bonding pads disposed on the active surface and a plurality of metal conductive bodies electrically connected to the bonding pads respectively.

Abstract: A method of simultaneously forming at least: one capacitor two resistors and one metal-oxide semiconductor. A first doped polysilicon layer/patterned interpoly oxide film/second doped polysilicon layer is formed over an exposed oxide structure. The patterned interpoly oxide forms a capacitor interpoly portion within a capacitor region and a second interpoly portion within a second resistor region. A second doped polysilicon layer is formed over the structure. The doped first and second polysilicon layers are patterned to form: a lower capacitor doped first polysilicon portion and an overlying upper capacitor second doped polysilicon portion; a lower first resistor first polysilicon portion and an upper, overlying first resistor second polysilicon portion; a lower second resistor first polysilicon portion; and a lower metal-oxide semiconductor first polysilicon portion and an overlying metal-oxide semiconductor second polysilicon portion.

Abstract: An air-pressure massaging device having an automatic adjustment function comprises: a base, inside which being disposed a drive rod; two fixed massaging assemblies mounted onto the drive rod; two adjustable massaging assemblies moveably mounted onto the drive rod; an airbag disposed in the base serving to move the adjustable massaging assembly relative to the fixed massaging assembly. Through inflation and deflation of the airbag, the adjustable massaging assemblies will be caused to move relative to the fixed massaging assemblies, so that a distance between the fixed massaging assemblies and the adjustable massaging assemblies is adjusted.

Abstract: The method of forming image sensor protection comprises attaching a glass on a tape and scribing the glass with lines to define cover zones on the glass, the glass is then break by a rubber puncher followed by forming glue on the edge of the cover zones. The glass is bonded on a wafer with an image sensor to align the cover zones to a micron lens area of the image sensor, and then the tape is removed from the wafer, thereby forming glass with cover zones on the image sensor.

Abstract: A plasma display panel is provided. The plasma display panel includes a front plate, a back plate, a shadow mask, and a first adhesive layer. The shadow mask is located between the front plate and the back plate. The first adhesive layer is formed between the shadow mask and the front plate. The shadow mask is adhered to the front plate via the first adhesive layer. Thus, noises generated during plasma discharge processes in the plasma display panel can be reduced.

Abstract: A plasma display panel is provided. The plasma display panel includes N scan electrodes, N auxiliary electrodes, M address electrodes, and N rows and M columns of lighting cells. The ith row of lighting cells among the N rows of lighting cells corresponds to the ith scan electrode among the N scan electrodes and the ith auxiliary electrode among the N auxiliary electrodes. The jth lighting cell in the ith row of lighting cells corresponds to the jth address electrode among the M address electrodes. When the jth lighting cell in the ith row of lighting cells is assigned to be lightened, the ith scan electrode, the ith auxiliary electrode, and the jth address electrode are operated to generate discharge effects in the jth lighting cell in the ith row of lighting cells.

Abstract: A plasma display panel is provided. The plasma display panel includes a front plate, a back plate, a shadow mask, and a discharge destructive film. The shadow mask is located between the front plate and the back plate. The discharge destructive film is formed in a predetermined pattern between the shadow mask and the back plate. The discharge destructive film increases the firing voltages of some parts of the back plate. The discharge distance between the front plate and the back plate is accordingly increased. Thus, the luminous efficiency of the plasma display panel can be improved.