Abstract: An IC package includes one or more microelectronic devices, a plurality of package bumps disposed at a first side, and a metal structure electrically connecting at least a first device contact pad of a first microelectronic device and at least a first package bump of the plurality of package bumps. The metal structure includes an RDL trace extending between a first region aligned with the first device contact pad and a second region aligned with the first package bump, wherein the first package bump is mechanically and electrically connected directly to the second region of the RDL trace. The metal structure further includes a first via extending between the first region of the RDL trace and the first device contact pad and further includes a set of one or more support studs extending from the second region to a support surface facing the first side.

Abstract: A multi-rank circuit system utilizing a shared IO channel includes a first stage of multiple selectors coupled to input multiple digital busses, and a second stage including one or more selectors coupled to receive outputs of the first stage of selectors and to individually select one of the outputs of the first stage of selectors to one or more control circuits for IO circuits of the ranks. The system switches one of the ranks to be an active rank on the shared IO channel, and operates the first stage of selectors to select one of the digital busses to the second stage of selectors in advance of switching a next active rank to the shared IO channel.

Abstract: A camera module includes a plastic carrier, an imaging lens assembly, a reflective element and a plurality of auto-focusing elements. The plastic carrier includes an inner portion and an outer portion, wherein an inner space is defined by the inner portion, and the outer portion includes at least one mounting structure. The imaging lens assembly is disposed in the inner space of the plastic carrier. The reflective element is for folding an image light by a reflective surface of the reflective element into the imaging lens assembly. The auto-focusing elements include at least two magnets and at least one wiring element, wherein the auto-focusing elements are for moving the plastic carrier along a second optical axis of the imaging lens assembly, and the magnets or the wiring element can be disposed on the mounting structure of the outer portion.

Abstract: An antenna connecting-switching apparatus includes a housing, a first connection structure, a second connection structure, an elastic body, an elastic piece structure and an electronic switch. The elastic piece structure includes a first elastic piece and a second elastic piece. When an external antenna is connected to the first connection structure, the first connection structure compresses the elastic body pushing the first elastic piece; the first elastic piece contacts the second elastic piece; the electronic switch is switched; a wireless communication circuit is electrically connected to the external antenna. When the external antenna stops connected to the first connection structure, the elastic body rebounds pushing the first connection structure; the first connection structure stops pushing the first elastic piece; the first elastic piece stops contacting the second elastic piece; the electronic switch is switched; the wireless communication circuit is electrically connected to an internal antenna.

Abstract: A method of forming a semiconductor device is provided. The method includes placing a semiconductor die and a leadframe on a carrier substrate. The semiconductor die includes a plurality of bond pads and the leadframe includes a plurality of leads. A first lead of the plurality of leads has a proximal end affixed to a first bond pad of the plurality of bond pads and a distal end placed on the carrier substrate. At least a portion of the semiconductor die and the leadframe is encapsulated with an encapsulant. The carrier substrate is separated from a first major side of the encapsulated semiconductor die and leadframe exposing a distal end portion of the first lead. A package substrate is applied on the first major side.

Abstract: A lens driving apparatus includes a holder, a metal cover, a carrier, a sensing magnet, a printed circuit board, a position sensor, a coil and at least one driving magnet. The metal cover is coupled with the holder and has an opening. The carrier is assembled to a lens assembly having an optical axis, wherein the carrier is disposed in the metal cover and is movable along a direction parallel to the optical axis. The sensing magnet is coupled with the carrier. The printed circuit board is disposed near to one of the four lateral sides of the holder. The position sensor is disposed on the printed circuit board and corresponds to the sensing magnet. The coil is disposed on an outer surface of the carrier. One of the driving magnet is disposed in the metal cover and corresponds to the coil.

Abstract: A thinned pump includes a casing, a rotor assembly and a stator assembly. The casing includes a base and a cover. The cover covers the base so as to form a fluid chamber together, the cover has an inlet channel and an outlet channel, and the inlet channel and the outlet channel are in fluid communication with the fluid chamber. The rotor assembly includes an impeller and a magnetic component. The impeller is rotatably disposed in the casing, and the magnetic component is embedded into the impeller. The stator assembly includes a plurality of magnetically conductive pillars and a plurality of coils. The magnetically conductive pillars are mounted at one side of the base located opposite to the fluid chamber, and the coils are respectively disposed on the magnetically conductive pillars.

Abstract: A method for fabricating semiconductor device includes the steps of: forming a first inter-metal dielectric (IMD) layer on a substrate; forming a metal interconnection in the first IMD layer; forming a bottom electrode layer and a pinned layer on the first IMD layer; forming a sacrificial layer on the pinned layer; patterning the sacrificial layer, the pinned layer, and the bottom electrode layer to form a first magnetic tunneling junction (MTJ); forming a second IMD layer around the first MTJ; removing the sacrificial layer to form a recess; forming a barrier layer and a free layer in the recess; forming a top electrode layer on the free layer; and patterning the top electrode layer and the free layer to form a second MTJ.

Abstract: A lens assembly module includes a base, a cover, a lens unit, an elastic element, at least two conductive elements, at least one AF coil element and at least two first magnetic elements. The cover is coupled to the base. The lens unit is movably disposed in the cover. The elastic element is coupled to the lens unit. The conductive elements are coupled to the lens unit. The AF coil element is disposed on the lens unit, and two ends of the AF coil element are electrically connected to the conductive elements, respectively. The first magnetic elements are disposed in the cover. A part of each of the inner portions is overlapped along a direction parallel to an optical axis and electrically connected to each conductive element. The AF coil element and the conductive elements are electrically connected by a welding method.

Abstract: A memory device includes a word line, a bit line, an active region and a bit line contact structure. The word line is disposed in the substrate, and extends along a first direction. The bit line is disposed over the substrate, and extends along a second direction. The active region is disposed in the substrate, and extends along a third direction. The bit line contact structure is disposed between the active region and the bit line. A top view pattern of the bit line contact structure has a long axis. An angle between the extending direction of this long axis and the third direction is less than an angle between the extending direction of this long axis and the first direction, and is less than an angle between the extending direction of this long axis and the second direction.

Abstract: A camera module includes a metal yoke, a holding base, a plastic barrel, a plurality of plastic lens elements, a leaf spring pair and a coil element. The holding base is connected to the metal yoke and defines an inner space. The holding base has a through hole which is corresponding to an opening of the metal yoke. The plastic barrel is movably disposed in the inner space. The plastic lens elements are disposed in the plastic barrel. The leaf spring pair includes two leaf springs which are located on a same plane and connected to the plastic barrel. The coil element surrounds an outer surface of the plastic barrel and electrically connected to the leaf spring pair, wherein two ends of the coil element is connected to the leaf springs by a thermal pressing method.

Abstract: A semiconductor wafer cleaning apparatus is provided. The semiconductor wafer cleaning apparatus includes a spin base, a spindle, a clamping member, and a first sealing ring. The spin base has a through hole and a flange. The spindle extends through the through hole. The clamping member covers the through hole and is connected to the spindle. The clamping member includes a mounting part. The first sealing ring is disposed under the clamping member. A top surface of the first sealing ring and a top surface of the flange are in contact with a bottom surface of the mounting part.

Abstract: An assembly structure and a method for manufacturing the same are provided. The method for manufacturing the assembly structure includes providing a substrate defining an active region and a side rail surrounding the active region; and forming a frame structure on the side rail.

Abstract: A sacrificial layer is formed over a first channel structure of an N-type transistor (NFET) and over a second channel structure of a P-type transistor (PFET). A PFET patterning process is performed at least in part by etching away the sacrificial layer in the PFET while protecting the NFET from being etched. After the PFET patterning process has been performed, a P-type work function (WF) metal layer is deposited in both the NFET and the PFET. An NFET patterning process is performed at least in part by etching away the P-type WF metal layer and the sacrificial layer in the NFET while protecting the PFET from being etched. After the NFET patterning process has been performed, an N-type WF metal layer is deposited in both the NFET and the PFET.

Abstract: A method includes providing a structure having a first stack of nanostructures spaced vertically one from another and a second stack of nanostructures spaced vertically one from another, forming a dielectric layer wrapping around each of the nanostructures in the first and second stacks, depositing an n-type work function layer on the dielectric layer and a p-type work function layer on the n-type work function layer and over the first and second stacks. The n-type work function layer wraps around each of the nanostructures in the first stack. The p-type work function layer wraps around each of the nanostructures in the second stack. The method also includes forming an electrode layer on the p-type work function layer and over the first and second stacks.

Abstract: A conductive structure includes a core portion, a plurality of electronic devices and a filling material. The core portion defines a cavity. The electronic devices are disposed in the cavity of the core portion. The filling material is disposed between the electronic devices and a sidewall of the cavity of the core portion.

Abstract: A wiring structure and a method for manufacturing the same are provided. The wiring structure includes a lower conductive structure, an upper conductive structure and a conductive via. The lower conductive structure includes a first dielectric layer and a first circuit layer in contact with the first dielectric layer. The upper conductive structure is attached to the lower conductive structure. The upper conductive structure includes a plurality of second dielectric layers, a plurality of second circuit layers in contact with the second dielectric layers, and defines an accommodating hole. An insulation material is disposed in the accommodating hole. The conductive via extends through the insulation material, and electrically connects the lower conductive structure.

Abstract: A semiconductor device package includes a first conductive structure, a stress buffering layer and a second conductive structure. The first conductive structure includes a substrate, at least one first electronic component embedded in the substrate, and a first circuit layer disposed on the substrate and electrically connected to the first electronic component. The first circuit layer includes a conductive wiring pattern. The stress buffering layer is disposed on the substrate. The conductive wiring pattern of the first circuit layer extends through the stress buffering layer. The second conductive structure is disposed on the stress buffering layer and the first circuit layer.

Abstract: A model parameters security protection method is implemented in a computing device in communication connection with at least one security protection device. The method includes training a data model based on an artificial neural network using a number of images and obtaining parameter information of the data model, encrypting the parameter information and generating a configuration file comprising the encrypted parameter information, and sending the configuration file to the at least one security protection device. The parameter information includes at least one of a weight of neuron and an offset value of the neuron of the artificial neural network.

Abstract: A method for fabricating semiconductor device includes the steps of: forming a first inter-metal dielectric (IMD) layer on a substrate; forming a metal interconnection in the first IMD layer; forming a bottom electrode layer and a pinned layer on the first IMD layer; forming a sacrificial layer on the pinned layer; patterning the sacrificial layer, the pinned layer, and the bottom electrode layer to form a first magnetic tunneling junction (MTJ); forming a second IMD layer around the first MTJ; and removing the sacrificial layer.