Patents by Inventor Wen Lin

Wen Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Burglar-proof wireless light adjusting module
    Publication number: 20060214595
    Abstract: A burglar-proof wireless light adjusting module is provided wherein a transmission socket of a control module is connected with a lamp and a local power, respectively, whereas a control socket at the other end is connected with a conventional switch. When the switch is turned on or off, a micro processor transmits a signal of lightening status of a corresponding light bulb to a driving circuit, generates a corresponding control circuit through the driving circuit, to enable the light bulb to generate a continuously changing status of lightening and extinguishing, a status of lightening and extinguishing according to a random time, and a constant brightness, after receiving a status of open circuit and short-circuit, corresponding to various times of status of turning on and off, from the control socket.
    Type: Application
    Filed: March 25, 2005
    Publication date: September 28, 2006
    Inventor: Wen-Lin Chen
  • Sanitary pad with large absorbing area
    Publication number: 20060206076
    Abstract: A sanitary pad includes an elongate body having a front end, a rear end and two divergent and smooth sides connected between the front end and the rear end. The first side of the sanitary pad has an absorbing area, wherein the area of the front end is narrower than the area of the rear end which is used to cover the user's buttocks. An elongate reinforcement absorbing area is located at the first side and close to the front end. An adherent layer is applied to a second side of the body so as to attach the sanitary pad to the user's panties.
    Type: Application
    Filed: March 11, 2005
    Publication date: September 14, 2006
    Inventor: Wen-Lin Chiang
  • Ultra thin dual chip image sensor package structure and method for fabrication
    Publication number: 20060199307
    Abstract: A stacked image sensor package contains an image sensor chip and a peripheral chip. A support pad for the peripheral chip adheres to a top surface of the peripheral chip, eliminating the need for a support member that otherwise would contribute to the thickness of the package. Thermal dissipation is enhanced by exposing surfaces including a back surface of the peripheral chip.
    Type: Application
    Filed: May 1, 2006
    Publication date: September 7, 2006
    Inventors: Chen Tsai, Chih-Wen Lin
  • Ultra thin image sensor package structure and method for fabrication
    Patent number: 7102159
    Abstract: An image sensor package having at least one chip supporting bar secured to a top surface of an image sensor chip. The thickness of the chip supporting bar is absorbed within a vertical dimension of wire loops that connect bonding pads to leads so that the chip supporting bar does not contribute to the thickness of the image sensor package. An exposed back surface of the image sensor chip enhances thermal dissipation.
    Type: Grant
    Filed: June 12, 2004
    Date of Patent: September 5, 2006
    Assignee: Macronix International Co., Ltd.
    Inventors: Chen Jung Tsai, Chih-Wen Lin
  • Method for fast mode decision of variable block size coding
    Publication number: 20060193386
    Abstract: Methods for fast mode decision of variable size block coding referring to spatial and temporal correlations between a current encoding motion block and at least one reference motion block to decide a best mode for encoding the current encoding motion block. The at least one reference motion block includes at least one neighboring motion block of the current motion block and/or a previous motion block that is located in a previous image frame at a position corresponding to that of the current encoding motion block in a current image frame. At least one block size mode is obtained from the at least one reference motion block. The methods further check the reliability of the at least one block size mode before using the at least one block size to encode the current motion block.
    Type: Application
    Filed: February 25, 2005
    Publication date: August 31, 2006
    Inventors: Chia-Wen Lin, Yu-Yuan Tseng, Fan-Di Jou
  • Ultra thin dual chip image sensor package structure and method for fabrication
    Publication number: 20060192279
    Abstract: A stacked image sensor package contains an image sensor chip and a peripheral chip. A support pad for the peripheral chip adheres to a top surface of the peripheral chip, eliminating the need for a support member that otherwise would contribute to the thickness of the package. Thermal dissipation is enhanced by exposing surfaces including a back surface of the peripheral chip.
    Type: Application
    Filed: May 1, 2006
    Publication date: August 31, 2006
    Inventors: Chen Tsai, Chih-Wen Lin
  • Dual-band power amplifier
    Publication number: 20060170492
    Abstract: The present invention discloses a dual-band power amplifier, capable of operating at a first frequency and a different second frequency simultaneously. The dual-band power amplifier comprises a first gain stage; a second power stage; an input matching unit electrically connected between the first gain stage and a signal input port; an inter-stage matching unit electrically connected between the first gain stage and the second power stage and an output matching unit electrically connected between the second power stage and an output signal port. According to the dual-band power amplifier and the design formula of matching circuit of the present invention, the present invention can simplify the circuit structure and is suitable for various dual-band communication systems.
    Type: Application
    Filed: February 2, 2005
    Publication date: August 3, 2006
    Inventors: Chang Sheng-Fuh, Chen Wen-Lin, Deng Wei-Yin, Chen Hung-Cheng, Tang Shu-Fen, Chen Albert
  • USB to SATA bridge system
    Publication number: 20060174049
    Abstract: A bridge system for heter-serial interfaces, which is connected to a host. The bridge system includes a host interface controller, a memory, a controller and a device interface controller. The controller controls the host interface controller and the device interface controller such that the data or commands sent by the host are changed from a host interface format to a device interface format and sent to the disk drive through the device interface controller, or data or states of the disk drive are changed from the device interface format to the host interface format and sent to the host.
    Type: Application
    Filed: September 8, 2005
    Publication date: August 3, 2006
    Applicant: Sunplus Technology Co., Ltd.
    Inventors: Teng-Wen Lin, Wei-Shu Hsu
  • DIGITAL LOGIC TEST METHOD TO SYSTEMATICALLY APPROACH FUNCTIONAL COVERAGE COMPLETELY AND RELATED APPARATUS AND SYSTEM
    Publication number: 20060161828
    Abstract: A digital logic test method for systematically testing a pipeline-structured integrated circuit chip is disclosed. The method includes the steps of: providing an integrated circuit chip capable of executing a plurality of instructions during a period of time, each of the instructions being executed according to a plurality of sequentially ordered operation segments, sorting the instructions, and designing a plurality of test patterns to test the integrated circuit according to the sorting result and STAGE test segments corresponding to the STAGE operation segments.
    Type: Application
    Filed: January 19, 2005
    Publication date: July 20, 2006
    Inventor: CHIH-WEN LIN
  • Multi-sensing level MRAM structure with different magneto-resistance ratios
    Publication number: 20060152973
    Abstract: A new process and structure for a multi-sensing level magnetic random access memory (MRAM) cell having different magneto-resistance (MR) ratios includes an improved magnetic tunnel junction (MTJ) configuration. The MTJ configuration includes a first free layer proximate to a first tunneling barrier and a second free layer proximate to a second tunneling barrier and a pinned layer. The first free layer is sandwiched between the first and second tunneling layers. The first tunneling barrier has a MR ratio that differs from a MR ratio of the second tunneling barrier.
    Type: Application
    Filed: March 13, 2006
    Publication date: July 13, 2006
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wen Lin, Denny Tang
  • Free-fall detection device and free-fall protection system for a portable electronic apparatus
    Publication number: 20060152842
    Abstract: In an integrated free-fall detection device for a portable apparatus an acceleration sensor generates acceleration signals correlated to the components of the acceleration of the portable apparatus along three detection axes. A dedicated purely hardware circuit connected to the acceleration sensor generates a free-fall detection signal in a continuous way and in real-time. The free-fall detection signal has a first logic value in the event that the acceleration signals are simultaneously lower than a respective acceleration threshold, and is sent to a processor unit of the portable apparatus as an interrupt signal to activate appropriate actions of protection for the portable apparatus. Preferably, the acceleration sensor and the dedicated purely hardware circuit are integrated in a single chip and the acceleration sensor is made as a MEMS.
    Type: Application
    Filed: June 24, 2005
    Publication date: July 13, 2006
    Inventors: Fabio Pasolini, Michele Tronconi, Wen Lin, William Raasch
  • MRAM cell with reduced write current
    Publication number: 20060146602
    Abstract: A magnetic random access memory (MRAM) cell including an MRAM stack and a conductive line for carrying write current associated with the MRAM cell in a direction that is angularly offset from an easy axis of the MRAM stack by an acute angle, such as about 45 degrees.
    Type: Application
    Filed: January 6, 2005
    Publication date: July 6, 2006
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wen Lin, Denny Tang, Li-Shyue Lai
  • Narrow width effect improvement with photoresist plug process and STI corner ion implantation
    Patent number: 7071515
    Abstract: A method to reduce the inverse narrow width effect in NMOS transistors is described. An oxide liner is deposited in a shallow trench that is formed to isolate active areas in a substrate. A photoresist plug is formed in the shallow trench and is recessed below the top of the substrate to expose the top portion of the oxide liner. An angled indium implant through the oxide liner into the substrate is then performed. The plug is removed and an insulator is deposited to fill the trenches. After planarization and wet etch steps, formation of a gate dielectric layer and a patterned gate layer, the NMOS transistor exhibits an improved Vt roll-off of 40 to 45 mVolts for both long and short channels. The improvement is achieved with no degradation in junction or isolation performance. The indium implant dose and angle may be varied to provide flexibility to the process.
    Type: Grant
    Filed: July 14, 2003
    Date of Patent: July 4, 2006
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yi-Ming Sheu, Da-Wen Lin, Cheng-Ku Chen, Po-Ying Yeh, Shi-Shung Peng, Chung-Cheng Wu
  • Computer wireless input device with compartment for retaining a wireless receiver
    Publication number: 20060139329
    Abstract: An input device has a body for receiving a circuit board therein. The body has a retaining device which is moved to secure or release a wireless receiver in or from an exterior-facing compartment in the body.
    Type: Application
    Filed: December 23, 2004
    Publication date: June 29, 2006
    Inventors: Li-Wen Lin, Zhen-Bang Chen, Sheng-Shan Huang
  • Planner inverted-F antenna having a rib-shaped radiation plate
    Patent number: 7061437
    Abstract: A planner inverted-F antenna (PIFA) includes a ground plane, a rib-shaped radiation plate installed approximately in parallel with the ground plane, a feeding line installed on the rib-shaped radiation plate, a feeding contact installed on an end of the feeding line, and a ground contact electrically connected to the ground plane.
    Type: Grant
    Filed: February 15, 2005
    Date of Patent: June 13, 2006
    Assignee: Syncomm Technology Corp.
    Inventors: Chin-Wen Lin, Shih-Chieh Lo, Ho-Tsung Chang
  • Electronic customs release slip (E-CRS)
    Publication number: 20060122843
    Abstract: A computer controlled system and method of using the system for control of shipping a quantity of product either domestically or internationally. The system comprises a number of user input stations for entering a shipping request. Product release information stored in the computer is added to the request which is transmitted t a product storage unit, a printer, and an exit control station. The product storage unit selects the product requested. The printer prints a product release form which can include a customs declaration form and/or a digital authentication stamp if desired. The product is prepared for shipping and the product release form is attached. The product and the product release form is checked at the exit control station. The product is then shipped or corrective action is taken.
    Type: Application
    Filed: January 28, 2002
    Publication date: June 8, 2006
    Inventors: Hsiu-Chu Lin, Yi-Sung Lin, Chi-Wen Lin, John Kao
  • Method for functional verification of hardware design
    Patent number: 7058557
    Abstract: A method for functional verification of hardware design. First, a first memory region storing a test pattern and a second memory region storing interrupt instructions are provided. Then, the test pattern stored in the first memory is hardware-simulated. If an external interrupt is received during the simulation of the test pattern, the second memory region is accessed and the interrupt instructions are hardware-simulated. Thereafter, the simulated result of the interrupt instructions is self-tested to obtain a first verification result, and the hardware design is verified according to the first verification result.
    Type: Grant
    Filed: November 8, 2002
    Date of Patent: June 6, 2006
    Assignee: Faraday Technology Corp.
    Inventor: Chih-Wen Lin
  • Memory array operating as a shift register
    Patent number: 7051153
    Abstract: A memory array configured to operate as a shift register includes a first column of memory cells with an input and an output and at least a second column of memory cells with an input and an output. The memory array also includes a multiplexer that is connected between the output of the first column of memory cells and the input of the second column of memory cells. The memory array can be operated as a shift register by shifting data from the first column of memory cells to the second column of memory cells through the multiplexer rather than using general routing lines.
    Type: Grant
    Filed: May 6, 2002
    Date of Patent: May 23, 2006
    Assignee: Altera Corporation
    Inventors: Yi-Wen Lin, Changsong Zhang, David Jefferson, Srinivas Reddy
  • MEMORY AND RELATED MANUFACTURING METHOD THEREOF
    Publication number: 20060104101
    Abstract: A memory manufactured through a semiconductor process includes a substrate, a memory cell array formed on the substrate, a peripheral circuit formed on the substrate and electrically connected to the memory cell array for controlling access of the memory cell array, and a power distribution network formed substantially above the peripheral circuit or the memory cell array. The power distribution network is electrically connected to the peripheral circuit and the memory cell array for providing power to the peripheral circuit and the memory cell array.
    Type: Application
    Filed: November 17, 2004
    Publication date: May 18, 2006
    Inventors: Wen-Lin Chen, Yung-Chieh Yu, Po-Sen Wang, Shih-Huang Huang
  • LCD television
    Patent number: D523827
    Type: Grant
    Filed: March 23, 2004
    Date of Patent: June 27, 2006
    Assignee: Quanta Computer, Inc.
    Inventors: Hung-Wen Lin, Chang-Ta Miao, Gwo-Chyuan Chen