Patents by Inventor Wen Lin

Wen Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050283255
    Abstract: An implant including a substantially cohesive aggregate comprising bone-derived particles. Cohesiveness is maintained by a member of mechanical interlocking, engagement of adjacent bone-derived particles with one another through engagement with a binding agent, thermal bonding, chemical bonding, or a matrix material in which the bone-derived particles are retained. The aggregate is shaped as a one-dimensional or two-dimensional body.
    Type: Application
    Filed: December 20, 2004
    Publication date: December 22, 2005
    Inventors: Perry Geremakis, Jennifer Grasso, David Knaack, Jo-Wen Lin, Lawrence Shimp, Robert Waterman, John Winterbottom
  • Patent number: 6977436
    Abstract: A semiconductor packaging device has a carrier having at least a portion configured for containing a chip. The chip, affixing to the portion with sidewall, has a back surface an active surface, which multitudes of bonding pads are on the active surface. One insulating layer on the active surface and carrier has multitudes of conductive holes corresponding to the first bonding pads. A multi-layer structure on the insulating layer is configured for providing electrical connection to the conductive holes. Another insulating layer, affixed on one of the carrier and the multi-layer structure, has another conductive holes electrically connected to the conductive holes. Multitudes of solder balls, on at least one of the carrier and latter insulating layer, electrically connect the latter conductive holes.
    Type: Grant
    Filed: February 14, 2002
    Date of Patent: December 20, 2005
    Assignee: Macronix International Co. Ltd.
    Inventors: Chen-Jung Tsai, Jui-Chung Lee, Chih-Wen Lin
  • Publication number: 20050275050
    Abstract: An image sensor package having at least one chip supporting bar secured to a top surface of an image sensor chip. The thickness of the chip supporting bar is absorbed within a vertical dimension of wire loops that connect bonding pads to leads so that the chip supporting bar does not contribute to the thickness of the image sensor package. An exposed back surface of the image sensor chip enhances thermal dissipation.
    Type: Application
    Filed: June 12, 2004
    Publication date: December 15, 2005
    Inventors: Chen Tsai, Chih-Wen Lin
  • Patent number: 6972372
    Abstract: A stacking structure is described that permits stacking of electrical components with no requirement for an ancillary stacking framework. Electrical components are fabricated with inner and outer lead portions that provide connection to a substrate and to other electrical components in a stack.
    Type: Grant
    Filed: May 28, 2004
    Date of Patent: December 6, 2005
    Assignee: Macronix International Co., Ltd.
    Inventors: Chen-Jung Tsai, Chih-Wen Lin
  • Publication number: 20050263311
    Abstract: A stacking structure is described that permits stacking of electrical components with no requirement for an ancillary stacking framework. Electrical components are fabricated with inner and outer lead portions that provide connection to a substrate and to other electrical components in a stack.
    Type: Application
    Filed: May 28, 2004
    Publication date: December 1, 2005
    Inventors: Chen-Jung Tsai, Chih-Wen Lin
  • Publication number: 20050261921
    Abstract: A system and method for lot priority adjustment. The system includes a database, a calculation unit and an adjustment unit. The database stores at least a committed date for a lot, a throughput rate and a cycle time for respective route operations in a production line, and Work-In-Process (WIP) information of the production line. The calculation unit calculates an x-ratio for the lot on a target route operation according to a current time, the committed date and a remaining cycle time for the lot, calculates a lot weight for the lot according to current loading of a predetermined number of route operations subsequent to the target route operation, and calculates a weighted x-ratio according to the x-ratio and the lot weight. The adjustment unit adjusts a priority for the lot according to the weighted x-ratio.
    Type: Application
    Filed: May 20, 2004
    Publication date: November 24, 2005
    Inventors: Wen-Chi Chien, Yu-Wen Lin
  • Publication number: 20050254452
    Abstract: An apparatus for supporting a network behind a wireless station includes a gateway that can receive from a wireless station a request for a communications session. The gateway can determine whether to authenticate the communications session, and, in response to determining to authenticate the communications session, request from a server network addresses for network devices behind the wireless station. The gateway can receive the requested network addresses from the server, associate the received network addresses with the wireless station, and establish the communications session.
    Type: Application
    Filed: May 14, 2004
    Publication date: November 17, 2005
    Inventors: Minglei Yang, Wen-lin Tsao, Andrew Au
  • Publication number: 20050249441
    Abstract: An air cushioned bearing includes: a cylindrical arbor; and an axial bushing formed as a hollow cylindrical tube for rotationally accepting the arbor; wherein a spiral groove or a spiral flange rib is formed between the arbor and the axial bushing. Therefore, the arbor rotates in high speed to form an air cushion between the axial bushing and the arbor.
    Type: Application
    Filed: October 5, 2004
    Publication date: November 10, 2005
    Applicant: Kallex Co. Ltd.
    Inventors: Chi-Chiang Li, Bor-Wen Lin
  • Publication number: 20050236694
    Abstract: In the preferred embodiment, a gate dielectric and an electrode are formed on a substrate. A pair of spacers is formed along opposite sidewalls of the gate electrode and the gate dielectric. Spacers are preferably formed of SiCO based material or SiCN based material. The source and drain are then formed. A contact etch stop (CES) layer is formed on the source/drain regions and the spacers. The CES layer is preferably formed of SiCO based material or SiCN based material. An Inter-Level Dielectric (ILD) is then formed on the CES layer.
    Type: Application
    Filed: July 21, 2004
    Publication date: October 27, 2005
    Inventors: Zhen-Cheng Wu, H. Tsai, Da-Wen Lin, Weng Chang, Shwang-Ming Cheng, Mong Liang
  • Publication number: 20050232005
    Abstract: An MRAM cell including an MRAM cell stack located over a substrate and first and second write lines spanning at least one side of the MRAM cell stack and defining a projected region of intersection of the MRAM cell stack and the first and second write lines. The MRAM cell stack includes a pinned layer, a tunneling barrier layer, and a free layer, the tunneling barrier layer interposing the pinned layer and the free layer. The first write line extends in a first direction within the projected region of intersection. The second write line extends in a second direction within the projected region of intersection. The first and second directions are angularly offset by an angle ranging between 45 and 90 degrees, exclusively. At least one write line may be perpendicular to the easy axis of free layer, while the other line may be rotated off the easy axis of the free layer by an angle which is larger than zero, such as to compensate for a shifting astroid curve.
    Type: Application
    Filed: April 19, 2004
    Publication date: October 20, 2005
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wen Lin, Denny Tang, Li-Shyue Lai
  • Publication number: 20050234659
    Abstract: A magnetic random access memory device (MRAM) and the method for forming the same are disclosed. The MRAM has a magnetic tunnel junction (MTJ) device, a first write line, and a second write line orthogonal to the first write line, wherein at least one of the first and second write lines has a width narrower than that of the MTJ.
    Type: Application
    Filed: April 20, 2004
    Publication date: October 20, 2005
    Inventors: Wen Lin, Denny Tang, Li-shyue Lai, Chao-Hsiung Wang
  • Publication number: 20050218346
    Abstract: A method and system is disclosed for directing charged particles on predetermined areas on a target semiconductor substrate. After aligning a wafer mask with a semiconductor wafer, with the wafer mask having one or more mask patterns thereon, the charged particles are directed to pass through the mask patterns to land on one or more selected areas on the semiconductor wafer.
    Type: Application
    Filed: April 2, 2004
    Publication date: October 6, 2005
    Inventors: Wen Lin, Denny Tang, Li-shyue Lai, John Chern, Jyh-Chyurn Guo, Wan-Yih Lien
  • Publication number: 20050212598
    Abstract: A circuit structure capable of adjusting gradient of output to temperature variation includes at least a sensing unit for detecting ambient temperature variation and generating a sensing signal, an amplifying unit connected to the sensing unit for increasing a level of the sensing signal, and an adjusting unit connected to the amplifying unit for increasing or decreasing an amplification ratio of the amplifying unit, so as to change a gradient of an output of the amplifying unit to temperature variation.
    Type: Application
    Filed: June 2, 2004
    Publication date: September 29, 2005
    Inventors: Ho-Wen Lin, Lin Chu
  • Publication number: 20050209696
    Abstract: Intervertebral implant system for intervertebral implantation, are disclosed. An intervertebral implant system according to the present disclosure includes a frame having a peripheral wall defining a space therein, and a settable material introducible into the space of the frame. The settable material is a biocompatible load bearing material including and not limited to bone, composites, polymers of bone growth material, collagen, and insoluble collagen derivatives. The settable material is injectable into the space defined by the frame. The settable material may have an initial fluid condition wherein the fluid settable material cures to a hardened condition.
    Type: Application
    Filed: January 11, 2005
    Publication date: September 22, 2005
    Inventors: Jo-Wen Lin, Erik Martz, Joel Millets, Daniel Rosenthal, David Chow
  • Publication number: 20050199936
    Abstract: A single-poly two-transistor PMOS memory cell for multiple-time programming applications includes a PMOS floating gate transistor sharing a drain/source P+ diffusion region with a PMOS select gate transistor all formed within a first n-well. A control plate for the floating gate transistor is formed in a second n-well. A single-poly two-transitor PMOS memory cell for one-time programming applications includes a PMOS floating gate transistor having a source formed as a p+ diffusion region in a single n-well. The source is adapted to also serve as control plate for the floating gate transistor.
    Type: Application
    Filed: March 5, 2004
    Publication date: September 15, 2005
    Inventors: Alex Wang, Shang-De Chang, Han-Chih Lin, Tzeng-Huei Shiau, I-Sheng Liu, Hsien-Wen Lin
  • Publication number: 20050202099
    Abstract: An anti-microbial sanitary ware includes a substrate, and an anti-microbial film formed on the substrate and including a protective layer and anti-microbial metal particles that are dispersed in the protective layer. The protective layer is made from a compound selected from the group consisting of metal nitrides and metal carbides. The anti-microbial metal particles are made from a metal selected from the group consisting of silver, zinc, and copper.
    Type: Application
    Filed: March 10, 2004
    Publication date: September 15, 2005
    Inventor: Wen Lin Lo
  • Publication number: 20050185714
    Abstract: An architecture of a fine granularity scalable (FGS) codec has an encoder and a decoder configurable in three prediction modes. The coarse prediction loop in the base layer of the encoder has a switch for selecting either coarse prediction output or fine prediction output in the encoder. The fine prediction loop in the enhancement layer of the encoder also has a switch for selecting either coarse prediction output or fine prediction output. Two-pass encoding is used in the encoder. The first pass extracts coding parameters and classifies macroblocks of a video frame into three groups each being assigned with all-coarse prediction mode, all-fine prediction mode or mix prediction. The second pass uses the assigned modes to encode the macroblocks. A rate adaptation algorithm is provided to truncate the enhancement bit-planes for low bit rate, medium bit rate and high bit rate and allocate bit efficiently for achieving higher video quality.
    Type: Application
    Filed: February 24, 2004
    Publication date: August 25, 2005
    Inventors: Chia-Wen Lin, Su-Ren Chen
  • Publication number: 20050175989
    Abstract: A detector for detecting and simultaneously diagnosing at least one subtype of human papilloma viruses (HPV) contained in a biological sample is provided. The detector comprises: a carrier, a plurality of micro-dots immobilized on the carrier, wherein each micro-dot is for identifying one particular HPV subtype, and the HPV subtype is one selected from a group consisting of 39 different HPV subtypes; and at least one oligonucleotide sequence contained in each the micro-dot that is specific to the one particular HPV subtype, wherein the at least one oligonucleotide sequence serves as a detection probe that hybridizes specifically with an L1 gene sequence of the one particular HPV subtype to form a hybridization complex as a detection indicator, so that each micro-dot identifies one particular HPV subtype via a corresponding oligonucleotide of the one particular HPV subtype, and thereby detecting and simultaneously identifying subtypes of human papilloma viruses.
    Type: Application
    Filed: June 23, 2003
    Publication date: August 11, 2005
    Inventors: Ching-Yu Lin, Ruey-Wen Lin, Chiou-Mien You, Chiu-Cho Yan, Bor-Heng Lee, Hsien-Hsiung Lee, Yu-Ju Lin, Chih-Chun Fan, Han-Chuan Hsu, Chia-Wen Shih, Chih-Hsing Yeh, Yi-Feng Kao, Chih-Long Pan, Yen-Ming Lin, Peter Chan
  • Publication number: 20050171497
    Abstract: A disposable underpants includes a waist portion and two legs holes. An absorbent pad is stitched to a crotch region on an inside of the underpants and includes two sides, a front end and a rear end. The front end of the absorbent pad is located at a position of wearer's pubis and the rear end of the absorbent pad is located at a position of wearer's buttocks. A width of the rear end of the absorbent pad is larger than a width of the front end of the absorbent pad.
    Type: Application
    Filed: February 2, 2004
    Publication date: August 4, 2005
    Inventor: Wen-Lin Chiang
  • Publication number: 20050169377
    Abstract: A low-complexity spatial downscaling video transcoder and method thereof are disclosed. The transcoder comprises a decoder having a reduced DCT-MC unit, a DCT-domain downscaling unit, and an encoder. The decoder performs the DCT-MC operation at a reduced-resolution for P-/B-frames in an MPEG coded bit-stream. The DCT-domain downscaling unit is used for spatial downscaling in the DCT-domain. After the downscaling and the motion vectors re-sampling, the encoder determines the encoding modes and outputs the encoded bit-stream. Compared with the original CDDT, this invention can achieve significant computation reduction and speeds up the transcoder without any quality degradation.
    Type: Application
    Filed: July 8, 2004
    Publication date: August 4, 2005
    Inventors: Chia-Wen Lin, Yuh-Ruey Lee, Yeh-Kai Chou