Patents by Inventor Wen Liu

Wen Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Buffer Layer on Gate and Methods of Forming the Same
    Publication number: 20160322473
    Abstract: Buffer layers on gates and methods of forming such are described. According to a method embodiment, a gate structure is formed. The gate structure includes a gate dielectric over a substrate, a work function tuning layer over the gate dielectric, and a metal-containing material over the work function tuning layer. A buffer layer is formed on the metal-containing material. A dielectric material is formed on the buffer layer. According to a structure embodiment, a gate structure includes a high-k gate dielectric and a metal gate electrode. A buffer layer is on the metal gate electrode. A dielectric cap is on the buffer layer. An inter-layer dielectric is over the substrate and around the gate structure. A top surface of the inter-layer dielectric is co-planar with a top surface of the dielectric cap.
    Type: Application
    Filed: May 21, 2015
    Publication date: November 3, 2016
    Inventors: Shiu-Ko JangJian, Chi-Wen Liu, Chih-Nan Wu, Chun Che Lin
  • FETS AND METHODS OF FORMING FETS
    Publication number: 20160322358
    Abstract: An embodiment is a method including forming a first fin and a second fin on a substrate, the first fin and the second fin each including a first crystalline semiconductor material on a substrate and a second crystalline semiconductor material above the first crystalline semiconductor material. Converting the first crystalline semiconductor material in the second fin to a dielectric material, wherein after the converting step, at least a portion of the first crystalline semiconductor material in the first fin remains unconverted. Forming gate structures over the first fin and the second fin, and forming source/drain regions on opposing sides of the gate structures.
    Type: Application
    Filed: April 30, 2015
    Publication date: November 3, 2016
    Inventors: Kuo-Cheng Ching, Chi-Wen Liu, Chih-Hao Wang
  • Semiconductor device having gate dielectric surrounding at least some of channel region and gate electrode surrounding at least some of gate dielectric
    Patent number: 9484460
    Abstract: A semiconductor device includes a first type region including a first conductivity type and a second type region including a second conductivity type. The semiconductor device includes a channel region extending between the first type region and the second type region. The semiconductor device includes a gate electrode surrounding at least some of the channel region. A first gate edge of the gate electrode is separated a first distance from a first type region edge of the first type region and a second gate edge of the gate electrode is separated a second distance from a second type region edge of the second type region. The first distance is less than the second distance.
    Type: Grant
    Filed: September 19, 2013
    Date of Patent: November 1, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Jean-Pierre Colinge, Tsung-Hsing Yu, Yeh Hsu, Chia-Wen Liu, Carlos H. Diaz
  • Microbial fuel cell with sediment agitator
    Patent number: 9484589
    Abstract: A microbial fuel cell comprising: an anode; an anode chamber configured to house the anode and an oxygen-reduced, nutrient-rich solution from a sediment bottom of a natural water body, wherein the anode chamber shields the anode from surrounding oxygen-rich water; a cathode disposed outside the anode chamber in the oxygen-rich water and electrically coupled in series to the anode via an electrical load; and an agitator configured to periodically agitate the sediment bottom to increase the quantity of nutrients in the nutrient-rich solution.
    Type: Grant
    Filed: June 17, 2014
    Date of Patent: November 1, 2016
    Assignee: The United States of America as represented by Secretary of the Navy
    Inventors: Lewis Hsu, Wayne Po-Wen Liu, David Bartholomew Chadwick, Jeffrey Asher Kagan
  • Correcting text with voice processing
    Patent number: 9484031
    Abstract: The present invention relates to voice processing and provides a method and system for correcting a text. The method comprising: determining a target text unit to be corrected in a text; receiving a reference voice segment input by the user for the target text unit; determining a reference text unit whose pronunciation is similar to a word in the target text unit based on the reference voice segment; and correcting the word in the target text unit in the text by the reference text unit. The present invention enables the user to easily correct errors in the text vocally.
    Type: Grant
    Filed: September 16, 2013
    Date of Patent: November 1, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Sheng Hua Bao, Jian Chen, Wen Liu, Yong Qin, Qin Shi, Zhong Su, Shi Lei Zhang
  • HVAC MODULE WITH ANTI-BACKFLOW CONTROL AND METHOD OF OPERATION
    Publication number: 20160305676
    Abstract: HVAC module has an air inlet, an evaporator downstream of the blower and a heater downstream of the evaporator, and a rear mixing zone downstream of the evaporator and the heater, wherein a control valve prevents cold air from flowing back towards the hot air by regulating the pressure of the cold air. A method is devised to control anti-backflow control valve of such an HVAC module by the steps of reading pressure and temperatures at various points in the HVAC module; setting air flow and temperature discharge targets; calculating the resistance of the control valve and a bland valve; determining corresponding control valve and blend valve positions; and moving the control valve and blend valve to those corresponding positions.
    Type: Application
    Filed: September 15, 2015
    Publication date: October 20, 2016
    Inventors: Mingyu Wang, Yanping Xia, Wen Liu, Prasad S. Kadle, Jeffrey C. Kinmartin
  • Gate Contact Structure of FinFET
    Publication number: 20160300720
    Abstract: An embodiment includes a substrate, wherein a portion of the substrate extends upwards forming a fin, a gate dielectric over a top surface and at least portions of sidewalls of the fin, a gate electrode over the gate dielectric, and a contact over and extending into the gate electrode, wherein the contact has a first width above the gate electrode and a second width within the gate electrode, the first width being smaller than the second width.
    Type: Application
    Filed: June 16, 2016
    Publication date: October 13, 2016
    Inventors: Chi-Wen Liu, Chao-Hsiung Wang
  • Guiding device for guiding a despenser to draw solution from at least one well on a microplate
    Patent number: 9464739
    Abstract: The present invention discloses a guiding device for guiding a dispenser to draw solution from at least one well on a microplate. The guiding device includes a column body whereon a first opening and a second opening are formed on opposite sides, and a slotting structure passing through the column body and communicating with the first opening and the second opening. A pipe of the dispenser passes through the first opening, the slotting structure and the second opening to reach inside the at least one well on the microplate for drawing the solution contained in the at least one well.
    Type: Grant
    Filed: November 20, 2013
    Date of Patent: October 11, 2016
    Assignee: Wistron Corporation
    Inventors: Chi-Chan Chiang, Ting-Wen Liu, Chih-Kuan Lin, Ya-Hsin Chang
  • Biological Particle Analyzer and Method of Analyzing Biological Particles
    Publication number: 20160290993
    Abstract: A method of analyzing biological particles for a biological particle analyzer includes outputting a first detection result when at least one particle has arrived at the first detection area, outputting a second detection result to the control module when the particles have arrived at the second detection area, and determining when to turn on or off the light emission source and outputting a control signal to turn on or off the light emission source according to the first detection result, wherein a control module is configured to calculate a turn-on time according to different particle characteristics and an average velocity of the at least one particle, and the light emission source is turned on only when the at least one particle is being tested during the turn-on time.
    Type: Application
    Filed: June 14, 2016
    Publication date: October 6, 2016
    Inventors: Chun-Chih Lai, Ting-Wen Liu
  • PATTERN BASED AUDIO SEARCHING METHOD AND SYSTEM
    Publication number: 20160292267
    Abstract: A pattern based audio searching method includes labeling a plurality of source audio data based on patterns to obtain audio label sequences of the source audio data; obtaining, with a processing device, an audio label sequence of target audio data; determining matching degree between the target audio data and the source audio data according to a predetermined matching rule based on the audio label sequence of the target audio data and the audio label sequences of the source audio data; and outputting source audio data having matching degree higher than a predetermined matching threshold as a search result.
    Type: Application
    Filed: June 17, 2016
    Publication date: October 6, 2016
    Inventors: Feng Jin, Qin Jin, Wen Liu, Yong Qin, Xu Dong Tu, Shi Lei Zhang
  • FETs and methods of forming FETs
    Patent number: 9461110
    Abstract: An embodiment is a method including forming a fin on a substrate. The fin includes a first crystalline semiconductor material on a substrate and a second crystalline semiconductor material above the first crystalline semiconductor material. The method further includes converting at least a portion of the first crystalline semiconductor material and second crystalline semiconductor material in the fin to a dielectric material and removing at least a portion of the dielectric material. The method further includes forming a gate structure over the fin and forming source/drain regions on opposing sides of the gate structure.
    Type: Grant
    Filed: April 30, 2015
    Date of Patent: October 4, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hao Wang, Ching-Wei Tsai, Chi-Wen Liu, Kuo-Cheng Ching, Jhon Jhy Liaw, Wai-Yi Lien
  • FinFETs with Strained Well Regions
    Publication number: 20160284848
    Abstract: A device includes a substrate, insulation regions extending into the substrate, a first semiconductor region between the insulation regions and having a first valence band, and a second semiconductor region over and adjoining the first semiconductor region. The second semiconductor region has a compressive strain and a second valence band higher than the first valence band. The second semiconductor region includes an upper portion higher than top surfaces of the insulation regions to form a semiconductor fin, and a lower portion lower than the top surfaces of the insulation regions. The upper portion and the lower portion are intrinsic. A semiconductor cap adjoins a top surface and sidewalls of the semiconductor fin. The semiconductor cap has a third valence band lower than the second valence band.
    Type: Application
    Filed: June 6, 2016
    Publication date: September 29, 2016
    Inventors: Yi-Jing Lee, Chi-Wen Liu
  • METHOD, SYSTEM AND ELECTRONIC APPARATUS FOR SEARCHING NEARBY APPARATUS
    Publication number: 20160286468
    Abstract: A method, a system and an electronic apparatus for searching nearby apparatuses are proposed. The method includes: searching at least one first apparatus belonging to a first subnet which the electronic apparatus belongs to, and accordingly generating a first list; scanning at least one access point (AP) near the electronic apparatus, and accordingly generating a first AP list; uploading the first AP list to a server, and receiving a second list from the server, where the second list includes at least one second apparatus, and a similarity between a second AP list of each second apparatus and the first AP list is higher than a predetermined threshold; and uniting the first list and the second list to generate a pairing list including at least one apparatus to be paired.
    Type: Application
    Filed: July 28, 2015
    Publication date: September 29, 2016
    Inventors: Po-Hsiang Wang, Yi-Wen Liu, Hao-Ting Chang, Wen-Ping Chang
  • Method of forming a Fin structure of semiconductor device
    Patent number: 9455334
    Abstract: A method of forming a fin structure of a semiconductor device, such as a fin field effect transistor FinFET is provided. In an embodiment, trenches are formed in a substrate, and a liner is formed along sidewalls of the trenches, wherein a region between adjacent trenches define a fin. A dielectric material is formed in the trenches. Portions of the semiconductor material of the fin are replaced with a second semiconductor material and a third semiconductor material, the second semiconductor material having a different lattice constant than the substrate and the third semiconductor material having a different lattice constant than the second semiconductor material. Portions of the second semiconductor material are oxidized.
    Type: Grant
    Filed: August 28, 2015
    Date of Patent: September 27, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuo-Cheng Ching, Jiun-Jia Huang, Chao-Hsiung Wang, Chi-Wen Liu
  • DYNAMIC CROSSBAND LINK METHOD AND WIRELESS EXTENDER
    Publication number: 20160277996
    Abstract: A dynamic crossband link method includes utilizing a local forwarding module to receive packet data from a client device via a first frequency band, obtaining a first communication quality indicator corresponding to a first uplink forwarding module and a second communication quality indicator corresponding to a second uplink forwarding module, and determining to transmit the packet data to a wireless access device via the first uplink forwarding module or via the second uplink forwarding module according to the first communication quality indicator and the second communication quality indicator.
    Type: Application
    Filed: March 16, 2016
    Publication date: September 22, 2016
    Inventors: Chia-Ching Huang, Yi-Wen Liu
  • Silicide Region of Gate-All-Around Transistor
    Publication number: 20160276160
    Abstract: The disclosure relates to a semiconductor device and methods of forming same. A representative structure for a semiconductor device comprises a substrate; a nanowire structure protruding from the substrate having a channel region disposed between a source region and a drain region; a pair of silicide regions extending into opposite sides of the source region, wherein each of the pair of silicide regions comprise a vertical portion adjacent to the source region and a horizontal portion adjacent to the substrate; and a metal gate surrounding a portion the channel region.
    Type: Application
    Filed: June 3, 2016
    Publication date: September 22, 2016
    Inventors: Kuo-Cheng Ching, Chi-Wen Liu, Chao-Hsiung Wang
  • Semiconductor device and formation thereof
    Patent number: 9449886
    Abstract: A semiconductor device and method of formation are provided herein. A semiconductor device includes a first active region adjacent a first side of a shallow trench isolation (STI) region. The first active region including a first proximal fin having a first proximal fin height adjacent the STI region, and a first distal fin having a first distal fin height adjacent the first proximal fin, the first proximal fin height less than the first distal fin height. The STI region includes oxide, the oxide having an oxide volume, where the oxide volume is inversely proportional to the first proximal fin height. A method of formation includes forming a first proximal fin with a first proximal fin height less than a first distal fin height of a first distal fin, such that the first proximal fin is situated between the first distal fin and an STI region.
    Type: Grant
    Filed: April 15, 2016
    Date of Patent: September 20, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: I-Wen Wu, Hsien-Cheng Wang, Hsin-Ying Lin, Mei-Yun Wang, Hsiao-Chiu Hsu, Shih-Wen Liu
  • FinFET devices and methods of forming
    Patent number: 9449975
    Abstract: In accordance with some embodiments, a device includes first and second p-type transistors. The first transistor includes a first channel region including a first material of a first fin. The first transistor includes first and second epitaxial source/drain regions each in a respective first recess in the first material and on opposite sides of the first channel region. The first transistor includes a first gate stack on the first channel region. The second transistor includes a second channel region including a second material of a second fin. The second material is a different material from the first material. The second transistor includes third and fourth epitaxial source/drain regions each in a respective second recess in the second material and on opposite sides of the second channel region. The second transistor includes a second gate stack on the second channel region.
    Type: Grant
    Filed: June 15, 2015
    Date of Patent: September 20, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuo-Cheng Ching, Chi-Wen Liu
  • SOURCE/DRAIN REGIONS FOR FIN FIELD EFFECT TRANSISTORS AND METHODS OF FORMING SAME
    Publication number: 20160268434
    Abstract: A method for forming a semiconductor device includes forming a fin extending upwards from a semiconductor substrate and forming a sacrificial layer on sidewalls of a portion of the fin. The method further includes forming a spacer layer over the sacrificial layer and recessing the portion of the fin past a bottom surface of the sacrificial layer. The recessing forms a trench disposed between sidewall portions of the spacer layer. At least a portion of the sacrificial layer is removed, and a source/drain region is formed in the trench.
    Type: Application
    Filed: March 13, 2015
    Publication date: September 15, 2016
    Inventors: Kuo-Cheng Ching, Chi-Wen Liu
  • High frequency array ultrasound system
    Patent number: RE46185
    Abstract: A system for acquiring an ultrasound signal comprises a signal processing unit adapted for acquiring a received ultrasound signal from an ultrasound transducer having a plurality of elements. The system is adapted to receive ultrasound signals having a frequency of at least 20 megahertz (MHz) with a transducer having a field of view of at least 5.0 millimeters (mm) at a frame rate of at least 20 frames per second (fps). The signal processing can further produce an ultrasound image from the acquired ultrasound signal. The transducer can be a linear array transducer, a phased array transducer, a two-dimensional (2-D) array transducer, or a curved array transducer.
    Type: Grant
    Filed: March 7, 2013
    Date of Patent: October 25, 2016
    Assignee: FUJIFILM SonoSite, Inc.
    Inventors: James Mehi, Ronald E. Daigle, Laurence C. Brasfield, Brian Starkoski, Jerrold Wen, Kai Wen Liu, Lauren S. Pflugrath, F. Stuart Foster, Desmond Hirson