Abstract: A semiconductor device and method of formation are provided herein. A semiconductor device includes a first active region adjacent a first side of a shallow trench isolation (STI) region. The first active region including a first proximal fin having a first proximal fin height adjacent the STI region, and a first distal fin having a first distal fin height adjacent the first proximal fin, the first proximal fin height less than the first distal fin height. The STI region includes oxide, the oxide having an oxide volume, where the oxide volume is inversely proportional to the first proximal fin height. A method of formation includes forming a first proximal fin with a first proximal fin height less than a first distal fin height of a first distal fin, such that the first proximal fin is situated between the first distal fin and an STI region.

Abstract: A method for fabricating a package structure is provided, which includes the steps of: forming a wiring layer on a carrier by electroplating; disposing at least one electronic component on the wiring layer; forming on the carrier an insulating layer that encapsulates the wiring layer and the electronic component; and removing the carrier. With the single wiring layer having one surface electrically connected the at least one electronic component and the other surface electrically connected to a plurality of conductive elements, the package structure has a signal transmission path that is shortened.

Abstract: A multiple-fin device includes a substrate and a plurality of fins formed on the substrate. Source and drain regions are formed in the respective fins. A dielectric layer is formed on the substrate. The dielectric layer has a first thickness adjacent one side of a first fin and having a second thickness, different from the first thickness, adjacent an opposite side of the fin. A continuous gate structure is formed overlying the plurality of fins, the continuous gate structure being adjacent a top surface of each fin and at least one sidewall surface of at least one fin. By adjusting the dielectric layer thickness, channel width of the resulting device can be fine-tuned.

Abstract: Embodiments of mechanism for an integrated circuit (IC) structure are provided. The IC structure includes a substrate including a first diffusion region, a second diffusion region, and an isolation structure separating the first diffusion region and the second diffusion region. The IC structure further includes a gate structure formed over the substrate, and the gate structure extends from the first diffusion region to the second diffusion region. The IC structure further includes a contact formed over the substrate, and the contact includes a wide portion over the first diffusion region and the second diffusion region and a thin portion over the isolation structure.

Abstract: A biochip detecting device for detecting a biochip is provided. The biochip receives an incident light to produce an excitation light. Both the incident light and the excitation light include a specific wavelength. The biochip detecting device includes a light source producing the incident light, an optical attenuator, a filter, a sensor, and a control module electrically connected to the light source and the sensor. Light with the specific wavelength passes through the filter. The optical attenuator disposed between the light source and the filter attenuates an intensity of the incident light, and replaces the biochip. The sensor detects an intensity of the light with the specific wavelength attenuated by the optical attenuator, and generates an intensity signal. The control module adjusts the intensity of the incident light according to whether the intensity signal is complied with a predetermined requirement. A detection method for the light source is provided.

Abstract: The disclosure relates to a field effect transistor. An exemplary structure for a field effect transistor comprises a substrate; a source region and a drain region disposed in the substrate; a gate structure over the substrate comprising sidewalls and a top surface, wherein the gate structure interposes the source region and the drain region; a contact etch stop layer (CESL) over at least a portion of the top surface of the gate structure; an interlayer dielectric layer over the CESL; a gate contact extending through the interlayer dielectric layer; and a source contact and a drain contact extending through the interlayer dielectric layer, wherein a first distance between an edge of the source contact and a first corresponding edge of the CESL is about 1 nm to about 10 nm.

Abstract: A switching circuit includes a first input stage having an input for receiving a first input signal, an output, and a power terminal for receiving an increasing analog current, a second input stage having an input for receiving a second input signal, an output, and a power terminal for receiving a decreasing analog current, and an output node coupled to the outputs of the first input stage and the second input stage for providing a switched output signal. An output stage is coupled between the first and second input stages and the output node. The first and second input stages are operational amplifiers.

Abstract: A method for threshing and pneumatic separation of tobacco leaves, including: 1) transporting a mixture of the tobacco slices and stems from a primary threshing set into primary pneumatic separation unit for sorting out tobacco slices, and transporting a remaining mixture into a secondary threshing set; 2) transporting the mixture from the secondary threshing set into a secondary pneumatic separation unit for sorting out the tobacco slices and qualified stems, and transferring a remaining mixture to a tertiary threshing set; 3) transporting the mixture from the tertiary threshing set into a tertiary pneumatic separation unit for sorting out the tobacco slices and the qualified stems, and transferring a remaining mixture into a quaternary threshing set; 4) transporting the mixture from the quaternary threshing set into a quaternary pneumatic separation unit for sorting out the tobacco slices and the qualified stems, and returning a remaining mixture to the quaternary threshing set.

Abstract: A scooter includes a footrest, a front tube installed at the front of the footrest, a rider riser pivotally connected to the front tube, a handle installed at the top of the rider riser, a front wheel installed at the bottom of the rider riser, and a rear wheel installed at the rear of the footrest. The front wheel is installed at the bottom of the rider riser and biasedly disposed on a side of the front tube. A rider stands on the footrest and operates the handle and scooter by hands and body to swing the front wheel sideway to produce an S-shaped movement pattern and drive the scooter. Such bias design with a turning point of the rider riser provides biased component forces to the handle and scooter body separately to move the scooter forward and improve the force applying efficiency, variability and fun of the scooter.

Abstract: A touch display includes a plurality of pixels, a plurality of scan lines, a plurality of data lines, a plurality of first conducting layers, and a plurality of third conducting layers. The plurality of scan lines are coupled to the plurality of pixels. The plurality of data lines are coupled to the plurality of pixels and the plurality of first conducting layers to provide a touch driving signal. Each first conducting layer of the plurality of first conducting layers is configured to receive the touch driving signal. The plurality of third conducting layers is configured to output a touch sensing signal according to the touch driving signals outputted by the plurality of first conducting layers.

Abstract: A method of forming low-k interconnect structure is disclosed, which comprises: providing at least one protruding structure on a substrate traversing between a first connection region to a second connection region defined thereon; performing anodic oxidation on the substrate having the protruding structure; forming one or more nanowire interconnect in the protruding structure traversing between the first connection region and the second connection region; the nanowire interconnect being surrounded by a dielectric layer formed during the anodic oxidation.

Abstract: The disclosure relates to a fin field effect transistor (FinFET). An exemplary FinFET comprises a substrate comprising a major surface; a fin structure protruding from the major surface comprising a lower portion comprising a first semiconductor material having a first lattice constant; an upper portion comprising the first semiconductor material, wherein a bottom portion of the upper portion comprises a dopant with a first peak concentration; a middle portion between the lower portion and upper portion, wherein the middle portion comprises a second semiconductor material having a second lattice constant different from the first lattice constant; and an isolation structure surrounding the fin structure, wherein a portion of the isolation structure adjacent to the bottom portion of the upper portion comprises the dopant with a second peak concentration equal to or greater than the first peak concentration.

Abstract: A method for displaying of a touch cursor is provided. The method is adapted to an electronic apparatus having a touch display unit. The touch display unit has a display area. The method includes the following steps. At least one first dimension boundary and at least one second dimension boundary are defined in the display area. A cursor, which has a pointing area and a touchable area, is displayed. When a touch event occurs in the touchable area, the cursor is correspondingly moved according to a touch coordinate of the touch event. When a reference point of the cursor passes two of the at least one first dimension boundary or two of the at least one second dimension boundary, the cursor is rotated for adjusting a relative position of the pointing area and the touchable area.

Abstract: A measurement device with electroencephalography (EEG) and electrocardiography (ECG) functionalities includes a shell and a turning structure. The shell includes a first contact and a second contact located at a first side of the shell; and a third contact. The turning structure, disposed on the shell, is utilized for adjusting the third contact to be located at the first side when the measurement device is in an EEG mode, and adjusting the third contact to be located at a second side of the shell when the measurement device is in an ECG mode, wherein the second side is substantially opposite to the first side.

Abstract: A method for manufacturing semiconductor device is provided. The method includes the following operations: providing a first conductive portion, a second conductive portion and a third conductive portion over a substrate; forming a dielectric layer over the first conductive portion, the second conductive portion, and the third conductive portion; forming a high-resistance layer over the first conductive portion; forming an oxide layer over the high-resistance layer and the dielectric layer; patterning the dielectric layer and the oxide layer by using the high-resistance layer as a blocking layer to form a first recess to expose the second conductive portion and the third conductive portion and to prevent the first conductive portion from exposure; and forming a plug layer in the first recess to connect the second conductive portion and the third conductive portion.

Abstract: A multi-antenna structure includes a base plate, a first antenna, a second antenna, a first metal line, and a second metal line. The base plate includes a grounded metal surface. The grounded metal surface includes two short sides and two long sides. The first antenna and the second antenna are arranged on the base plate. The first metal line and the second metal line are electrically connected to the two short sides of the grounded metal surface. A current path of the two short sides is prolonged because of the first metal line and the second metal line. A longitudinal current is equal to a transverse current at a low frequency. A current of the first antenna and a current of the second antenna does not interfere each other. Isolation between the first antenna and the second antenna is improved.

Abstract: Provided is a method for fabricating a memory device including forming a stack layer on a substrate, and embedding a plurality of gate pillar structures and a plurality of dielectric pillars in the stack layer. The plurality of gate pillar structures and the plurality of dielectric pillars extend along a same direction and are alternately arranged, so that the stack layer is divided into a plurality of stack structures.

Abstract: A fin structure suitable for a FinFET and having a buried insulator layer is disclosed. In an exemplary embodiment, a semiconductor device comprises a substrate with a first semiconductor material and having a fin structure formed thereupon. The fin structure includes a lower region proximate to the substrate, a second semiconductor material disposed on the lower region, a third semiconductor material disposed on the second semiconductor material, and an insulating material selectively disposed on the second semiconductor material such that the insulating material electrically isolates a channel region of the fin structure and further such that the insulating material exerts a strain on the channel region. The semiconductor device further comprises an isolation feature disposed adjacent to the fin structure.

Abstract: The disclosure relates to a semiconductor device. An exemplary structure for a semiconductor device comprises a substrate; a nanowire structure protruding from the substrate comprising a channel region between a source region and a drain region; a pair of silicide regions extending into opposite sides of the source region, wherein each of the pair of silicide regions comprising a vertical portion adjacent to the source region and a horizontal portion adjacent to the substrate; and a metal gate surrounding a portion the channel region.

Abstract: A semiconductor device having a semiconductor substrate with a dielectric layer disposed thereon. A trench is defined in the dielectric layer. A metal gate structure is disposed in the trench. The metal gate structure includes a first layer and a second layer disposed on the first layer. The first layer extends to a first height in the trench and the second layer extends to a second height in the trench; the second height is greater than the first height. In some embodiments, the second layer is a work function metal and the first layer is a dielectric. In some embodiments, the second layer is a barrier layer.