Patents by Inventor Wen Lo

Wen Lo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090218409
    Abstract: A heating system includes a heater installed in between the exhaust pipe and exhaust purifier of a diesel engine to heat the exhaust purifier in burning out cumulative carbon, a backpressure sensor for detecting the backpressure in the heater, a temperature sensor for detecting the temperature in the exhaust purifier, a fuel system for supplying a fuel mixture to the heater, an air compressor controllable to compress air into the fuel system to mix with a condensed fuel gas in the fuel system into a fuel mixture for delivery to the heater, and a computer controller electrically connected with the backpressure sensor and the temperature sensor for controlling the operation of the air compressor subject to the backpressure level detected by the backpressure sensor and the temperature detected by the temperature sensor.
    Type: Application
    Filed: February 29, 2008
    Publication date: September 3, 2009
    Inventor: WEN-LO CHEN
  • Publication number: 20090174281
    Abstract: An electret power generator having two output electrodes on a stator and a rotor positioned above the output electrodes with charged electret material between the electrodes and the rotor. Power is generated when the rotor moves laterally above the electrodes. The electret material is preferably parylene HT .
    Type: Application
    Filed: October 15, 2008
    Publication date: July 9, 2009
    Inventors: Hsi-wen LO, Yu-Chong Tai
  • Publication number: 20090169632
    Abstract: A sustained release composition comprising a polymer and manufacturing method thereof. The sustained release composition comprises a polymer, a bioactive agent, and a release rate determined agent, wherein the release rate determined agent is dispersed in the sustained release composition to control the release rate of the bioactive agent. The method comprises providing an oil phase comprising a bioactive agent, a polymer, and a release rate determined agent; providing an aqueous phase comprising a surfactant; mixing the oil phase with the aqueous phase to form the sustained release composition having a controlled release effect.
    Type: Application
    Filed: December 31, 2007
    Publication date: July 2, 2009
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Jui-Mei Lu, Chia-Wen Liu, Po Hong Lai, John Jiang Hann Lin, Chiao Pin Li, Sung En Chen, Yo Wen Lo, Ming-Thau Sheu, Min-Ying Lin
  • Publication number: 20090120670
    Abstract: A bendable area design for flexible printed circuitboard is disclosed. The flexible printed circuitboard (FPC) is comprised of: a flexible substrate; at least a circuit pattern; and a bendable area, being formed intersecting with the at least one circuit pattern and having at least a groove formed therein at a position corresponding to the intersection with the at least one circuit pattern; wherein the depth of the at least one groove is no larger than the thickness of the corresponding circuit pattern for preventing the circuit pattern from being cut off by the groove. By configuring the aforesaid bendable area in the FPC, stress generated by the bending of the FPC is restricted inside the bendable area effectively so that accurate control of the bending angle for bending FPC can be realized.
    Type: Application
    Filed: June 18, 2008
    Publication date: May 14, 2009
    Applicant: WINTEK CORPORATION
    Inventors: CHIN-WEN LO, CHIA-NING KAO
  • Patent number: 7528053
    Abstract: A three-dimensional package and a method of making the same including providing a wafer; forming at least one blind hole in the wafer; forming an isolation layer on the side wall of the blind hole; forming a conductive layer on the isolation layer; forming a dry film on the conductive layer; filling the blind hole with metal; removing the dry film, and patterning the conductive layer; removing a part of the metal in the blind hole to form a space; removing a part of the second surface of the wafer and a part of the isolation layer, to expose a part of the conductive layer; forming a solder on the lower end of the conductive layer, the melting point of the solder is lower than the metal; stacking a plurality of the wafers, and performing a reflow process; and cutting the stacked wafers, to form three-dimensional packages.
    Type: Grant
    Filed: December 26, 2006
    Date of Patent: May 5, 2009
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Min-Lung Huang, Wei-Chung Wang, Po-Jen Cheng, Kuo-Chung Yee, Ching-Huei Su, Jian-Wen Lo, Chian-Chi Lin
  • Publication number: 20080283216
    Abstract: The present invention relates to a cooling structure for motor of fan, which includes a housing, an impeller and a circuit board. The housing has an air flow channel and a base; the base is located on one side of the air flow channel to support the circuit board, and the impeller is movably integrated on the base; the circuit board is bonded with a highly heat-conductive metal on at least one side thereof so as to provide good heat dissipation and heat transfer performance; at least one portion of the circuit board is extended beyond the hub of the impeller such that the extended portion is located at a downwind place of the blades of the impeller to facilitate fast heat dissipation.
    Type: Application
    Filed: June 19, 2007
    Publication date: November 20, 2008
    Applicant: Sunonwealth Electric Machine Industry Co., Ltd.
    Inventors: Alex Horng, Shih-Chang Hsu, Pen-Wen Lo
  • Patent number: 7446404
    Abstract: A three-dimensional package including a first wafer having at least one first pad and a first protection layer exposing the first pad. A first hole penetrates the first wafer. A first isolation layer is disposed on the side wall of the first hole. The lower end of a first conductive layer extends below the surface of the first wafer. A first metal is disposed in the first hole, and is electrically connected to the first pad via the first conductive layer. A first solder is disposed on the first metal in the first hole, wherein the melting point of the first solder is lower than that of the first metal. A second wafer is configured similarly as the first wafer. A lower end of a second conductive layer of the second wafer extends below the surface of the second wafer and contacts the upper end of the first solder.
    Type: Grant
    Filed: December 26, 2006
    Date of Patent: November 4, 2008
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Min-Lung Huang, Wei-Chung Wang, Po-Jen Cheng, Kuo-Chung Yee, Ching-Huei Su, Jian-Wen Lo, Chian-Chi Lin
  • Publication number: 20080157236
    Abstract: At least one differential pressure sensing device has an active surface with an active region and a back surface with a recess. Next, a sacrificial layer is formed on a surface of the active region. Then, the differential pressure sensing device is bonded and electrically coupled with a surface of a carrier that has at least one through-hole corresponding to the recess of the differential pressure sensing device. Afterwards, at least one molding compound is formed to encapsulate the carrier and differential pressure sensing device while exposing the through-hole region and an upper surface of the sacrificial layer. Then, a solvent is used to naturally decompose the sacrificial layer, such that the active region of the differential pressure sensing device is exposed to atmosphere, thereby forming a differential pressure sensing device package with the through-hole.
    Type: Application
    Filed: August 21, 2007
    Publication date: July 3, 2008
    Inventors: Jung-Tai Chen, Chun-Hsun Chu, Wen-Lo Shieh
  • Patent number: 7348861
    Abstract: One embodiment of the present invention includes a frequency generation circuit including a control module, an oscillator circuit coupled to the control module, the oscillator circuit having a start-up time defined by the time required to reach a desired frequency. The oscillator circuit includes an amplifier having an input and an output and being programmably-alterable by the control module, a first capacitor coupled to the input of the amplifier and being programmably-alterable, in capacitance, by the control module, a second capacitor coupled to the output of the amplifier, a crystal resonator coupled to the first and second capacitors for generating an output signal having a desired frequency, wherein fast start-up time is achieved.
    Type: Grant
    Filed: March 31, 2005
    Date of Patent: March 25, 2008
    Assignee: Ralink Technology, Inc.
    Inventors: I-chang Wu, Chung Wen Lo, Keng Leong Fong
  • Patent number: 7314972
    Abstract: The invention relates to transformed plant cells and plants having a novel nucleic acid and protein sequences from the mung bean Vigna radiata. The nucleic acid sequence, isolated from a bruchid resistant mung bean line, encodes a thionin-like protein with biocidal properties.
    Type: Grant
    Filed: February 14, 2005
    Date of Patent: January 1, 2008
    Assignee: Academia Sinica
    Inventors: Ching-San Chen, Gan-Hong Chen, Li-Wen Lo
  • Publication number: 20070263998
    Abstract: The present invention provides a liquid crystal display module including housing, a flexible printed circuit board and a plurality of electric devices. The housing has at least a receiving notch. The flexible printed circuit board has a flexible substrate and at least an extension substrate projected from the flexible substrate to mount electric devices thereon. The extension substrate may be bent and received in the receiving notch of the housing to achieve the purpose of mounting more electric device on the flexible printed circuit board without having to increase the size of module.
    Type: Application
    Filed: May 11, 2007
    Publication date: November 15, 2007
    Applicant: WINTEK CORPORATION
    Inventors: Chih-Hsien Lien, Chin-Wen Lo, Yu-Jen Tsai
  • Publication number: 20070194990
    Abstract: An ultra wideband antenna includes a substrate, a transmission line coupled to the substrate, and a radiating element coupled to the transmission line at a distance from the substrate and being symmetric about the transmission line. An outer edge of the radiating element has a shape defined by a binomial function.
    Type: Application
    Filed: September 5, 2006
    Publication date: August 23, 2007
    Inventors: Ching-Wei Ling, Shyh-Jong Chung, Wen Lo
  • Publication number: 20070172984
    Abstract: The present invention relates to a three-dimensional package and a method of making the same. The method comprises: (a) providing a wafer; (b) forming at least one blind hole in the wafer; (c) forming an isolation layer on the side wall of the blind hole; (d) forming a conductive layer on the isolation layer; (e) forming a dry film on the conductive layer; (f) filling the blind hole with a solder; (g) removing the dry film; (h) patterning the conductive layer; (i) removing a part of the lower surface of the wafer and a part of the isolation layer, so as to expose a part of the conductive layer; (j) stacking a plurality of the wafers, and performing a reflow process; and (k) cutting the stacked wafers, so as to form a plurality of three-dimensional packages.
    Type: Application
    Filed: December 26, 2006
    Publication date: July 26, 2007
    Inventors: Min-Lung Huang, Wei-Chung Wang, Po-Jen Cheng, Kuo-Chung Yee, Ching-Huei Su, Jian-Wen Lo, Chian-Chi Lin
  • Publication number: 20070172982
    Abstract: The present invention relates to a three-dimensional package and a method of making the same. The method comprises: (a) providing a semiconductor body; (b) forming at least one blind hole in the semiconductor body; (c) forming an isolation layer on the side wall of the blind hole; (d) forming a conductive layer on the isolation layer; (e) patterning the conductive layer; (f) removing a part of the lower surface of the semiconductor body and a part of the isolation layer, so as to expose a part of the conductive layer; (g) forming a solder on the lower end of the conductive layer; (h) stacking a plurality of the semiconductor bodies, and performing a reflow process; and (i) cutting the stacked semiconductor bodies, so as to form a plurality of three-dimensional packages.
    Type: Application
    Filed: October 23, 2006
    Publication date: July 26, 2007
    Inventors: Min-Lung Huang, Wei-Chung Wang, Po-Jen Cheng, Kuo-Chung Yee, Ching-Huei Su, Jian-Wen Lo, Chian-Chi Lin
  • Publication number: 20070172985
    Abstract: The present invention relates to a three-dimensional package and a method of making the same. The method comprises: (a) providing a wafer; (b) forming at least one blind hole in the wafer; (c) forming an isolation layer on the side wall of the blind hole; (d) forming a conductive layer on the isolation layer; (e) forming a dry film on the conductive layer; (f) filling the blind hole with a metal; (g) removing the dry film, and patterning the conductive layer; (h) removing a part of the metal in the blind hole to form a space; (i) removing a part of the second surface of the wafer and a part of the isolation layer, so as to expose a part of the conductive layer; (j) forming a solder on the lower end of the conductive layer, wherein the melting point of the solder is lower than that of the metal; (k) stacking a plurality of the wafers, and performing a reflow process; and (l) cutting the stacked wafers, so as to form a plurality of three-dimensional packages.
    Type: Application
    Filed: December 26, 2006
    Publication date: July 26, 2007
    Inventors: Min-Lung Huang, Wei-Chung Wang, Po-Jen Cheng, Kuo-Chung Yee, Ching-Huei Su, Jian-Wen Lo, Chain-Chi Lin
  • Publication number: 20070172986
    Abstract: The present invention relates to a three-dimensional package and a method of making the same. The three-dimensional package structure comprises a first wafer, at least one first hole, a first isolation layer, a first conductive layer, a first metal, a first solder, a second wafer, at least one second hole, a second isolation layer, a second conductive layer, a second metal and a second space. The first wafer has at least one first pad and a first protection layer exposing the first pad. The first hole penetrates the first wafer. The first isolation layer is disposed on the side wall of the first hole. The lower end of the first conductive layer extends below the surface of the first wafer. The first metal is disposed in the first hole, and is electrically connected to the first pad via the first conductive layer. The first solder is disposed on the first metal in the first hole, wherein the melting point of the first solder is lower than that of the first metal.
    Type: Application
    Filed: December 26, 2006
    Publication date: July 26, 2007
    Inventors: Min-Lung Huang, Wei-Chung Wang, Po-Jen Cheng, Kuo-Chung Yee, Ching-Huei Su, Jian-Wen Lo, Chian-Chi Lin
  • Publication number: 20070172983
    Abstract: The present invention relates to a three-dimensional package and a method of making the same. The three-dimensional package comprises a first wafer, at least one first hole, a first isolation layer, a first conductive layer, a first solder, a second wafer, at least one second hole, a second isolation layer, a second conductive layer, and a second solder. The first wafer has at least one first pad and a first protection layer exposing the first pad. The first hole penetrates the first wafer. The first isolation layer is disposed on the side wall of the first hole. The lower end of the first conductive layer extends below the surface of the first wafer. The first solder is disposed in the first hole, and is electrically connected to the first pad via the first conductive layer. The second wafer has at least one second pad and a second protection layer exposing the second pad. The second hole penetrates the second wafer. The second isolation layer is disposed on the side wall of the second hole.
    Type: Application
    Filed: December 26, 2006
    Publication date: July 26, 2007
    Inventors: Min-Lung Huang, Wei-Chung Wang, Po-Jen Cheng, Kuo-Chung Yee, Ching-Huei Su, Jian-Wen Lo, Chian-Chi Lin
  • Publication number: 20070111499
    Abstract: A wafer structure and a method for fabricating the same are provided. The wafer structure comprises a substrate, a redistribution structure, a passivation layer, an under bump metallurgy (UBM) layer and a bump. The substrate has a solder pad. The redistribution structure is formed on the substrate and comprises a copper pillar electrically connected to the solder pad. The passivation layer is formed on the redistribution structure and has an aperture to expose the copper pillar. The UBM layer is formed in the aperture and disposed on the copper pillar. The bump is formed on the UBM layer.
    Type: Application
    Filed: June 26, 2006
    Publication date: May 17, 2007
    Inventor: Jian-Wen Lo
  • Publication number: 20070102829
    Abstract: A chip structure with solder bumps and the method for producing the same are disclosed. The chip structure with solder bumps includes a chip, a plurality of pads arranged on one surface of the chip, a protection layer formed on the surface of the chip and exposing the pads, a first photo-imaginable dielectric layer covered on the protection layer, a plurality of UBMs arranged on the pads, and extends over the first photo-imaginable dielectric layer respectively, a second photo-imaginable dielectric layer covered on the UBMs and the first photo-imaginable dielectric layer, and a plurality of conductive bumps relative to the pads and disposed on the UBMs respectively. Each UBM has a heat-dissipation portion extending to the edge of the surface of the chip. The second photo-imaginable dielectric layer reveals the heat-dissipation portions respectively.
    Type: Application
    Filed: November 3, 2006
    Publication date: May 10, 2007
    Applicant: ADVANCED SEMICONDUCTOR ENGINEERING INC.
    Inventors: Jian-Wen LO, Shao-Wen Fu
  • Publication number: 20070056921
    Abstract: An adjustable wall rack, which includes a bottom board, which has L-shaped front coupling rails, a locating board, which has two L-shaped back coupling rails respectively slidably coupled to the coupling rails of the bottom board and two transversely extending front locating grooves, two locating bars for supporting a monitor, wall ornament, cabinet, or TV on the locating board, and screws respectively mounted in mounting slots at the locating bards and engaged into the locating grooves of the locating board to affix the locating bars to the locating board in a vertical or oblique position.
    Type: Application
    Filed: September 9, 2005
    Publication date: March 15, 2007
    Inventor: Wen Lo