Abstract: The present invention relates to a three-dimensional package and a method of making the same. The method comprises: (a) providing a wafer; (b) forming at least one blind hole in the wafer; (c) forming an isolation layer on the side wall of the blind hole; (d) forming a conductive layer on the isolation layer; (e) forming a dry film on the conductive layer; (f) filling the blind hole with a metal; (g) removing the dry film, and patterning the conductive layer; (h) removing a part of the metal in the blind hole to form a space; (i) removing a part of the second surface of the wafer and a part of the isolation layer, so as to expose a part of the conductive layer; (j) forming a solder on the lower end of the conductive layer, wherein the melting point of the solder is lower than that of the metal; (k) stacking a plurality of the wafers, and performing a reflow process; and (l) cutting the stacked wafers, so as to form a plurality of three-dimensional packages.

Abstract: The present invention relates to a three-dimensional package and a method of making the same. The three-dimensional package structure comprises a first wafer, at least one first hole, a first isolation layer, a first conductive layer, a first metal, a first solder, a second wafer, at least one second hole, a second isolation layer, a second conductive layer, a second metal and a second space. The first wafer has at least one first pad and a first protection layer exposing the first pad. The first hole penetrates the first wafer. The first isolation layer is disposed on the side wall of the first hole. The lower end of the first conductive layer extends below the surface of the first wafer. The first metal is disposed in the first hole, and is electrically connected to the first pad via the first conductive layer. The first solder is disposed on the first metal in the first hole, wherein the melting point of the first solder is lower than that of the first metal.

Abstract: A wafer structure and a method for fabricating the same are provided. The wafer structure comprises a substrate, a redistribution structure, a passivation layer, an under bump metallurgy (UBM) layer and a bump. The substrate has a solder pad. The redistribution structure is formed on the substrate and comprises a copper pillar electrically connected to the solder pad. The passivation layer is formed on the redistribution structure and has an aperture to expose the copper pillar. The UBM layer is formed in the aperture and disposed on the copper pillar. The bump is formed on the UBM layer.

Abstract: A chip structure with solder bumps and the method for producing the same are disclosed. The chip structure with solder bumps includes a chip, a plurality of pads arranged on one surface of the chip, a protection layer formed on the surface of the chip and exposing the pads, a first photo-imaginable dielectric layer covered on the protection layer, a plurality of UBMs arranged on the pads, and extends over the first photo-imaginable dielectric layer respectively, a second photo-imaginable dielectric layer covered on the UBMs and the first photo-imaginable dielectric layer, and a plurality of conductive bumps relative to the pads and disposed on the UBMs respectively. Each UBM has a heat-dissipation portion extending to the edge of the surface of the chip. The second photo-imaginable dielectric layer reveals the heat-dissipation portions respectively.

Abstract: An adjustable wall rack, which includes a bottom board, which has L-shaped front coupling rails, a locating board, which has two L-shaped back coupling rails respectively slidably coupled to the coupling rails of the bottom board and two transversely extending front locating grooves, two locating bars for supporting a monitor, wall ornament, cabinet, or TV on the locating board, and screws respectively mounted in mounting slots at the locating bards and engaged into the locating grooves of the locating board to affix the locating bars to the locating board in a vertical or oblique position.

Abstract: A multi-chip package structure comprising a first chip, a patterned lamination layer, a plurality of first bumps, a second chip and second bumps is provided. The first chip has a first active surface. The patterned lamination layer is disposed on a portion area of the first active surface. The first chip has a plurality of first bonding pads disposed on the first active surface exposed by the patterned lamination layer and the patterned lamination layer has a plurality of second bonding pads disposed thereon. The second chip has a second active surface and the first bumps are disposed on the second active surface. The second chip is electrically connected to the first bonding pads through the first bumps. The second bumps are disposed on the second bonding pads. Moreover, the multi-chip package structure further comprises a component disposed on the first chip and electrically connects to the first bonding pads.

Abstract: An anti-microbial sanitary ware includes a substrate, and an anti-microbial film formed on the substrate and including a protective layer and anti-microbial metal particles that are dispersed in the protective layer. The protective layer is made from a compound selected from the group consisting of metal nitrides and metal carbides. The anti-microbial metal particles are made from a metal selected from the group consisting of silver, zinc, and copper.

Abstract: A chip structure comprising a substrate, a circuitry unit, a plurality of bonding pads, a first passivation layer and a redistribution layer is provided. The circuitry unit is disposed on the substrate, and the bonding pads are disposed on the circuitry unit. Moreover, the first passivation layer is disposed on the circuitry unit and exposes the bonding pads. The redistribution layer of a Ti/Cu/Ti multi-layered structure is disposed on the first passivation layer, and is electrically connected with the bonding pads. In addition, the redistribution layer of a Ti/Cu/Ti multi-layered structure has excellent conductivity such that electrical characteristics of the chip structure are enhanced effectively.

Abstract: A display device (20) includes a display panel (25) and a rigid-flexible printed circuit board (2) electrically connected to the display panel. The rigid-flexible printed circuit board has the characteristics of both a rigid and a flexible printed circuit board, thereby reducing the size of the rigid-flexible printed circuit board and the amount of connectors required. Additionally, the cost of the rigid-flexible printed circuit board is less than that of a conventional printed circuit board.

Abstract: A chip structure and the manufacturing process thereof are provided. The feature of the present application is that the chip structure has a first passivation layer covering a substrate of the chip and exposing each of bonding pads and a portion of the substrate surface, and a second passivation layer covering the sidewalls of the first passivation layer and the portion of substrate surface exposed by the first passivation layer, to prevent moisture infiltration from the edge of the substrate. Therefore, the reliability of the chip structure is enhanced.

Abstract: A liquid crystal module has a liquid crystal panel and a flexible printed circuit board. The liquid crystal panel has a substrate and an indium tin oxide (ITO) film on the substrate. A flexible printed circuit board has an insulating layer on which a lower conductive layer, a second protective layer, an upper conductive layer and a first protective layer are stacked in sequence. The lower conductive layer is electrically connected to predetermined portions of the lower conductive layer and has a conductive portion, which is unshielded by the insulating layer. The flexible printed circuit board is bonded to the liquid crystal panel with the insulting layer stacked on the indium tin oxide film and the pins of the indium tin oxide film electrically connected to the conductive portion of the lower conductive layer.

Abstract: A surface-mount package for an oscillator crystal blank is made from a metal sheet substrate. Half-etched cavities are formed on one side of the sheet. The half-etched cavities are filled in with an insulator. The center of the insulator is drilled until metal is reached, leaving insulator on the sidewalls of the resulting drilled via. The bottom of the drilled via is plated with a contact metal such as nickel-gold, and then the entire drilled via is filled in with metal such as copper to form via-metal. An external metal surface-mount pad is formed on the surface of each via-metal. The metal sheet is flipped over, and a larger inner cavity etched through until the contact metal over the via-metal is reached. Conductive epoxy is placed on the contact metal, and electrodes on the crystal blank are attached to conductive epoxy.

Abstract: A liquid crystal module has a liquid crystal panel and a flexible printed circuit board. The liquid crystal panel has a substrate and an indium tin oxide (ITO) film on the substrate. A flexible printed circuit board has an insulating layer on which a lower conductive layer, a second protective layer, an upper conductive layer and a first protective layer are stacked in sequence. The lower conductive layer is electrically connected to predetermined portions of the lower conductive layer and has a conductive portion, which is unshielded by the insulating layer. The flexible printed circuit board is bonded to the liquid crystal panel with the insulting layer stacked on the indium tin oxide film and the pins of the indium tin oxide film electrically connected to the conductive portion of the lower conductive layer.

Abstract: An assembling device and method for mounting a second plate to a first plate is described. The assembling device is an alignment jig includes a first carrier plate having a first air channel and a first carrier area and a second carrier plate having a second air channel and a second carrier area. The first air channel is linked to the first carrier area and the first plate is on the first carrier area. The second carrier plate and the first carrier plate are joined together through a pivot and the second carrier plate is stacked over the first carrier plate. The second air channel is linked to the second carrier area. The second plate is over the second carrier area. The second carrier plate or the first carrier plate has a third air channel and the corresponding second or third plate has an opening exposing the third air channel.

Abstract: A surface-mount package for an oscillator crystal blank is made from a metal sheet substrate. Half-etched cavities are formed on one side of the sheet. The half-etched cavities are filled in with an insulator. The center of the insulator is drilled until metal is reached, leaving insulator on the sidewalls of the resulting drilled via. The bottom of the drilled via is plated with a contact metal such as nickel-gold, and then the entire drilled via is filled in with metal such as copper to form via-metal. An external metal surface-mount pad is formed on the surface of each via-metal. The metal sheet is flipped over, and a larger inner cavity etched through until the contact metal over the via-metal is reached. Conductive epoxy is placed on the contact metal, and electrodes on the crystal blank are attached to conductive epoxy.

Abstract: The invention relates to transformed plant cells and plants having a novel nucleic acid and protein sequences from the mung bean Vigna radiata. The nucleic acid sequence, isolated from a bruchid resistant mung bean line, encodes a thionin-like protein with biocidal properties.

Abstract: A multi-chip package structure comprising a first chip, a patterned lamination layer, a plurality of first bumps, a second chip and second bumps is provided. The first chip has a first active surface. The patterned lamination layer is disposed on a portion area of the first active surface. The first chip has a plurality of first bonding pads disposed on the first active surface exposed by the patterned lamination layer and the patterned lamination layer has a plurality of second bonding pads disposed thereon. The second chip has a second active surface and the first bumps are disposed on the second active surface. The second chip is electrically connected to the first bonding pads through the first bumps. The second bumps are disposed on the second bonding pads. Moreover, the multi-chip package structure further comprises a component disposed on the first chip and electrically connects to the first bonding pads.

Abstract: A process for manufacturing transparent semiconductor packages is disclosed. A wafer having an active surface and a back surface is provided. A plurality of first redistribution lines are formed on the active surface of the wafer to connect the bonding pads of the chips. A transparent polymer is formed over the active surface of the wafer to cover the first redistribution lines. A plurality of first grooves are formed corresponding to the scribe lines and in the back surface of the wafer. Preferably, a back coating is then formed over the back surface to fill the first grooves. Next, a plurality of second grooves are formed corresponding to the first grooves and through the back coating such that the first redistribution lines have exposed portions. A plurality of second redistribution lines on the back coating can extend to the exposed portions of the corresponding first redistribution lines for connecting solder balls on the back surface.

Abstract: A package structure for a multi-chip integrated circuit (IC) is disclosed and the structure includes substrate having a position for bonding with chips for chip-bonding and having at least a hole for the passage of a gold wire in the course of wire-bonding, a first chip attached to the substrate with a chip bonding agent and being wire-bonded on the substrate and the chip bonding position being opposite to the 2nd chip with the substrate in-between, and the gold wire of the wire-bonding passed through the hole of the substrate from the substrate bonding pad at the substrate and on the same lateral side of the second chip and being connected to the pin pad of the first chip, at least a second chip being flip-chip bonded onto the substrate and the bonding position being at different sides of the bonding between the substrate and the first chip, and a package body including filler of the second chip extended to cover the hole of the substrate and the first chip and the gold wire connected to the substrate and th