Abstract: A semiconductor structure includes a substrate having a first device region and a second device region in proximity to the first device region. A trench isolation structure is disposed in the substrate between the first device region and the second device region. The trench isolation structure includes a first bottom surface within the first device region and a second bottom surface within the second device region. The first bottom surface is coplanar with the second bottom surface.

Abstract: A method for improving a design of a patterning device. The method includes (i) obtaining mask points of a design of a mask feature, wherein the mask feature corresponds to a target feature in a target pattern to be printed on a substrate; and (ii) adjusting locations of the mask points to generate a modified design of the mask feature based on the adjusted mask points.

Abstract: A semiconductor device package includes a substrate, a first antenna pattern and a second antenna pattern. The substrate has a first surface and a second surface opposite to the first surface. The first antenna pattern is disposed over the first surface of the substrate. The first antenna pattern has a first bandwidth. The second antenna pattern is disposed over the first antenna pattern. The second antenna pattern has a second bandwidth different from the first bandwidth. The first antenna pattern and the second antenna pattern are at least partially overlapping in a direction perpendicular to the first surface of the substrate.

Abstract: Embodiment of present invention provide a wavelength division multiplexing (WDM) module. The WDM module includes a substrate having a first side and a second side opposing the first side, wherein the first side includes a transpassing region coated with an anti-reflective (AR) film and a reflective region coated with a high-reflective (HR) film, and the second side includes multiple ports of optical paths; multiple WDM filters attached to the multiple ports at the second side of the substrate, wherein surfaces of the WDM filters attached to the substrate are coated with WDM films; and at least one reflector attached to the second side of the substrate in a space between the multiple WDM filters, wherein the reflector has a first surface attached to the substrate and a second surface, opposing the first surface, that has a convex shape and coated with a high-reflective (HR) coating.

Abstract: The present invention provides a sensor assembly including housing; a sensor, disposed in the housing; a conductive member, having an inner portion located inside the housing and an outer portion located outside the housing. The outer portion receives a physical quantity from a component to be sensed and transmits the physical quantity to the sensor through the inner portion, so that the sensor senses the physical quantity and generates a sensing signal; a wireless communication module, receiving the sensing signal and transmits an output signal corresponding to the sensing signal.

Abstract: A method including: obtaining data based an optical proximity correction for a spatially shifted version of a training design pattern; and training a machine learning model configured to predict optical proximity corrections for design patterns using data regarding the training design pattern and the data based on the optical proximity correction for the spatially shifted version of the training design pattern.

Abstract: The present invention provides a semiconductor memory device including a substrate, a plurality of capacitors and a supporting layer disposed on the substrate, wherein each of the capacitors is connected with at least one of the adjacent capacitors through the supporting layer. Each of the capacitors includes first electrodes, a high-k dielectric layer and a second electrode, and the high-k dielectric layer is disposed between the first electrodes and the second electrode. Due to the supporting layer directly contacts the high-k dielectric layer through a surface thereof, and the high-k dielectric layer completely covers the surface, the second electrode may be formed directly within openings with an enlarged dimension. Accordingly, the process difficulty of performing the deposition and etching processes within the openings may be reduced, and the capacitance of the capacitors is further increased.

Abstract: The invention provides a method for forming a semiconductor structure, which comprises providing a substrate, sequentially a first groove and a second groove are formed in the substrate, the depth of the first groove is different from the depth of the second groove, a first oxide layer is formed in the first groove, a second oxide layer is formed in the second groove, an etching step is performed to remove part of the first oxide layer, a first gate structure is formed on the first oxide layer, and a second gate structure is formed on the second oxide layer.

Abstract: The present disclosure provides an electronic module including a circuit including a transmitting part and a receiving part physically separated from the transmitting part. The electronic module also includes an element isolated from the circuit and configured to block electrical interference between the transmitting part and the receiving part.

Abstract: The present disclosure relates to an electronic device that includes a first radiating element configured to radiate a first electromagnetic wave and a second radiating element configured to radiate a second electromagnetic wave. A first radiation pattern of the first electromagnetic wave is configured to be adjusted, and a second radiation pattern of the second electromagnetic wave is configured to be fixed.

Abstract: A method of determining a mask pattern for a target pattern to be printed on a substrate. The method includes partitioning a portion of a design layout including the target pattern into a plurality of cells with reference to a given location on the target pattern; assigning a plurality of variables within a particular cell of the plurality of cells, the particular cell including the target pattern or a portion thereof; and determining, based on values of the plurality of variables, the mask pattern for the target pattern such that a performance metric of a patterning process utilizing the mask pattern is within a desired performance range.

Abstract: A semiconductor device includes a gate structure on a substrate, a first spacer on sidewalls of gate structure, a second spacer on sidewalls of the first spacer, a polymer block adjacent to the first spacer and on a corner between the gate structure and the substrate, an interfacial layer under the polymer block, and a source/drain region adjacent to two sides of the first spacer. Preferably, the polymer block is surrounded by the first spacer, the interfacial layer, and the second spacer.

Abstract: An electrical connector may include an insulating body and a housing. The housing may include walls defining an assembly space and surrounding external surfaces of the insulating body. The walls of the housing may include front and rear walls facing front and rear external surfaces of the insulating body, respectively. Portions of the front and rear walls of the housing may be spaced apart respectively from the front and rear external surfaces of the insulating body to form first and second docking slots in the assembly space. The front wall of the housing may include front docking holes in communication with the first docking slot, and the rear wall of the housing may include rear docking holes in communication with the second docking slot. The sizes and positions of the docking slots and the docking holes may be configured to enable a mating connector to be connected reversibly or irreversibly.

Abstract: A method including: obtaining data based an optical proximity correction for a spatially shifted version of a training design pattern; and training a machine learning model configured to predict optical proximity corrections for design patterns using data regarding the training design pattern and the data based on the optical proximity correction for the spatially shifted version of the training design pattern.

Abstract: The present invention provides a semiconductor memory device and a fabricating method thereof. The semiconductor memory device includes a substrate, a plurality of capacitors and a supporting layer disposed on the substrate, wherein each of the capacitors is connected with at least one of the adjacent capacitors through the supporting layer. Each of the capacitors includes first electrodes, a high-k dielectric layer and a second electrode, and the high-k dielectric layer is disposed between the first electrodes and the second electrode. Due to the supporting layer directly contacts the high-k dielectric layer through a surface thereof, and the high-k dielectric layer completely covers the surface, the second electrode may be formed directly within openings with an enlarged dimension. Accordingly, the process difficulty of performing the deposition and etching processes within the openings may be reduced, and the capacitance of the capacitors is further increased.

Abstract: A temperature plate device includes a plate body and a bent structure. The plate body includes a first plate and a second plate. A chamber is defined by the first plate and the second plate. The first plate has a first step section. The second plate has a second step section corresponding to the first step section. The bent structure is connected to and traverses the first step section between the first step section and the second step section.

Abstract: A method for training a machine learning model to generate a predicted measured image, the method including obtaining (a) an input target image associated with a reference design pattern, and (b) a reference measured image associated with a specified design pattern printed on a substrate, wherein the input target image and the reference measured image are non-aligned images; and training, by a hardware computer system and using the input target image, the machine learning model to generate a predicted measured image.

Abstract: A method including: obtaining a thin-mask transmission function of a patterning device and a M3D model for a lithographic process, wherein the thin-mask transmission function is a continuous transmission mask (CTM) and the M3D model at least represents a portion of M3D attributable to multiple edges of structures on the patterning device; determining a M3D mask transmission function of the patterning device by using the thin-mask transmission function and the M3D model; and determining an aerial image produced by the patterning device and the lithographic process, by using the M3D mask transmission function.

Abstract: A method for fabricating semiconductor device includes the steps of: forming a gate structure on a substrate; forming a polymer block on a corner between the gate structure and the substrate; performing a cleaning process; performing an oxidation process by injecting oxygen gas under 750° C. to form a first seal layer on sidewalls of the gate structure; and forming a source/drain region adjacent to two sides of the gate structure.

Abstract: Disclosed herein is a polyamide composition, and an article which is obtained or obtainable from the composition. The article may include a connector socket for Double Data Rate 5 RAM. The polyamide composition disclosed herein shows desirable tensile strength for the article at a thickness of 0.4 mm, good flowability, and high HDT. The composition also exhibits good thermal stability during molding, and approaches UL 94 V-0.