Patents by Inventor Wen Lu

Wen Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11876551
    Abstract: The present disclosure provides an electronic module including a circuit including a transmitting part and a receiving part physically separated from the transmitting part. The electronic module also includes an element isolated from the circuit and configured to block electrical interference between the transmitting part and the receiving part.
    Type: Grant
    Filed: August 19, 2021
    Date of Patent: January 16, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Shih-Wen Lu, Chun-Jen Chen, Po-Hsiang Tseng, Hsin-Han Lin, Ming-Lun Yu
  • Publication number: 20240012335
    Abstract: A method including: obtaining data based an optical proximity correction for a spatially shifted version of a training design pattern; and training a machine learning model configured to predict optical proximity corrections for design patterns using data regarding the training design pattern and the data based on the optical proximity correction for the spatially shifted version of the training design pattern.
    Type: Application
    Filed: August 14, 2023
    Publication date: January 11, 2024
    Applicant: ASML NETHERLANDS B.V.
    Inventors: Jing Su, Yen-Wen Lu, Ya Luo
  • Patent number: 11870152
    Abstract: The present disclosure relates to an electronic device that includes a first radiating element configured to radiate a first electromagnetic wave and a second radiating element configured to radiate a second electromagnetic wave. A first radiation pattern of the first electromagnetic wave is configured to be adjusted, and a second radiation pattern of the second electromagnetic wave is configured to be fixed.
    Type: Grant
    Filed: August 19, 2021
    Date of Patent: January 9, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Shih-Wen Lu
  • Publication number: 20230411995
    Abstract: A wireless charging device includes a casing, a wireless charging module, and an air-flow generator. The casing includes a housing part and a carrier plate disposed in the housing part to divide internal space of the housing part into a first accommodation space and a second accommodation space. The casing has an air inlet, an air outlet, and an opening. The carrier plate has a through hole. The air inlet, the air outlet, the opening, and the through hole are in fluid communication with the first accommodation space and the second accommodation space. The wireless charging module is located in the first accommodation space for charging a mobile device supported by the carrier plate. The air-flow generator is located in the first accommodation space for creating an airflow flowing through the air inlet, the second accommodation space, the through hole, the first accommodation space, and the air outlet.
    Type: Application
    Filed: September 8, 2022
    Publication date: December 21, 2023
    Inventors: Chi-Cheng Hsiao, Ming-Hung Shih, Juin Yi Wu, Kai-Wen Lu
  • Patent number: 11835299
    Abstract: The disclosure relates to a thin vapor-chamber structure including a first cover and a second cover. The first cover has a first surface and a first clustered pattern. The first clustered pattern is disposed on the first surface, and has a plurality of first protruding stripes spaced apart from each other and extended along a first direction. The second cover has a second surface and a second clustered pattern. The first surface faces the second surface. The second clustered pattern is disposed on the second surface, and has a plurality of second protruding stripes spaced apart from each other and extended along a second direction. The first clustered pattern and the second clustered pattern are partially contacted with each other to form a wick. The lateral walls of the first protruding stripes and the second protruding stripes form a micro-channel meandering between the first surface and the second surface.
    Type: Grant
    Filed: May 20, 2021
    Date of Patent: December 5, 2023
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Kuo-Ying Lee, Che-Wei Chang, Chao-Wen Lu, Cherng-Yuh Su
  • Publication number: 20230389173
    Abstract: The present disclosure provides an electronic device. The electronic device includes a first insulating layer, a first antenna pattern, a second insulating layer, and a second antenna pattern. The first antenna pattern is configured to operate at a first frequency and at least partially disposed over the first insulating layer. The second insulating layer is disposed over the first insulating layer. The second antenna pattern is configured to operate at a second frequency different from the first frequency and at least partially disposed over the second insulating layer. A dielectric constant of the first insulating layer is different from a dielectric constant of the second insulating layer.
    Type: Application
    Filed: May 27, 2022
    Publication date: November 30, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Po-An LIN, Huei-Shyong CHO, Shih-Wen LU
  • Patent number: 11829124
    Abstract: Embodiments of the present disclosure provide a method for predicting an occurrence of a tool processing event, thereby determining whether to activate a virtual metrology. In a model-building stage, plural sets of model-building data are used to create at least one classification model in accordance with at least one classification algorithm, in which each classification model includes plural decision trees. Then, probabilities of the decision trees are used to create at least one reliance index model, and the sets of model-building data are used to create at least one similarity index model in accordance with a statistical distance algorithm. In a conjecture stage, a set of processing data of a workpiece is inputted into each classification model, each reliance index model and each similarity index model to determine whether to activate (start) virtual metrology.
    Type: Grant
    Filed: December 24, 2020
    Date of Patent: November 28, 2023
    Assignee: NATIONAL CHENG KUNG UNIVERSITY
    Inventors: Fan-Tien Cheng, Yu-Ming Hsieh, Jing-Wen Lu
  • Patent number: 11831092
    Abstract: An electrical connector includes a housing having a bottom and a wall bounding an opening adjacent the bottom, and a shell configured to encircle an outer surface of the wall. The shell may include: first shell corners configured to conform with first housing corners of the housing, second shell corners configured to be spaced apart from second housing corners of the housing in a first direction, a plurality of first portions configured to conform with the outer surface of the wall, and a plurality of second portions configured to be spaced apart from the outer surface of the wall. The first and second shell corners have a height greater than a maximum height of the housing. Such a connector may be miniaturized, yet provide for robust operation and resist unintentional demating as a result of twisting forces on a plug inserted into the connector.
    Type: Grant
    Filed: July 27, 2021
    Date of Patent: November 28, 2023
    Assignee: Amphenol East Asia Ltd.
    Inventor: Lo-Wen Lu
  • Publication number: 20230369227
    Abstract: A semiconductor device including a substrate having a NMOS region and a PMOS region; a metal gate extending continuously along a first direction from the NMOS region to the PMOS region on the substrate; a first source/drain region extending along a second direction adjacent to two sides of the metal gate on the NMOS region; a second source/drain region extending along the second direction adjacent to two sides of the metal gate on the PMOS region; a first contact plug landing on the second source/drain region adjacent to one side of the metal gate; a second contact plug landing on the second source/drain region adjacent to another side of the metal gate; and a third contact plug landing directly on a portion of the metal gate on the PMOS region and between the first contact plug and the second contact plug.
    Type: Application
    Filed: July 27, 2023
    Publication date: November 16, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Shih-Cheng Chen, Li-Hsuan Ho, Tsuo-Wen Lu, Shih-Hao Liang, Tsung-Hsun Wu, Po-Jen Chuang, Chi-Mao Hsu
  • Publication number: 20230369372
    Abstract: A driver chip is provided. The driver chip includes a light-emitting module and a wafer substrate. The light-emitting module has multiple pins. The wafer substrate has a first surface and a second surface. The wafer substrate includes a photodiode, an image sensing circuit, and a light-emitting driving circuit. The photodiode is disposed on the second surface of the wafer substrate. The image sensing circuit is disposed in the wafer substrate and is electrically connected to the photodiode to drive the photodiode. The light-emitting driving circuit is disposed in the wafer substrate, and is electrically connected to the multiple pins of the light-emitting module via multiple connection units on the first surface of the wafer substrate to drive the light-emitting module.
    Type: Application
    Filed: April 24, 2023
    Publication date: November 16, 2023
    Applicant: Yinscorp Ltd.
    Inventors: Ping-Hung Yin, Chih-Wen Lu, Jia-Shyang Wang, Jai-Jyun Shen
  • Patent number: 11805903
    Abstract: Disclosed is a gap-free epidemic-preventing partition board structure, which includes a transparent board, a plurality of arc surfaces, two lateral side edges, a flat form, and a plurality of arc surface transitions. The arc surfaces are arranged on a bottom portion of the transparent board. The arc surfaces gradually change in an upward direction into the flat form. The two lateral side edges are arranged on two opposite sides of the arc surfaces and are on the same plane as the flat form. The arc surfaces include the arc surface transitions. The arc surfaces, the flat form, the two lateral side edges, and arc surface transitions that make up the gap-free epidemic-preventing partition board structure are integrally formed together as a unitary structure. The bottom in the form of multiple arc surfaces helps increase a contact area with a tabletop for securely standing thereon to achieve separation for epidemic prevention.
    Type: Grant
    Filed: January 5, 2022
    Date of Patent: November 7, 2023
    Assignee: WEN'S DESIGN INC.
    Inventors: Haur-Wen Lu, Althea Chen
  • Publication number: 20230341062
    Abstract: This disclosure is directed to a ball valve having an outer valve body, a valve core, a rotational assembly, and a functional assembly. The valve core is accommodated in the outer valve body, and the valve core has a flow channel defined therein. The rotational assembly is connected to the valve core for turning the valve core. A portion of the functional assembly is disposed in the flow channel.
    Type: Application
    Filed: November 23, 2022
    Publication date: October 26, 2023
    Inventor: Chao-Wen LU
  • Patent number: 11789371
    Abstract: A method including: obtaining a thin-mask transmission function of a patterning device and a M3D model for a lithographic process, wherein the thin-mask transmission function is a continuous transmission mask (CTM) and the M3D model at least represents a portion of M3D attributable to multiple edges of structures on the patterning device; determining a M3D mask transmission function of the patterning device by using the thin-mask transmission function and the M3D model; and determining an aerial image produced by the patterning device and the lithographic process, by using the M3D mask transmission function.
    Type: Grant
    Filed: August 5, 2022
    Date of Patent: October 17, 2023
    Assignee: ASML NETHERLANDS B.V.
    Inventors: Yu Cao, Yen-Wen Lu, Peng Liu, Rafael C. Howell, Roshni Biswas
  • Publication number: 20230327000
    Abstract: A semiconductor device includes a gate structure on a substrate, a first spacer on sidewalls of gate structure, a second spacer on sidewalls of the first spacer, a polymer block adjacent to the first spacer and on a corner between the gate structure and the substrate, an interfacial layer under the polymer block, and a source/drain region adjacent to two sides of the first spacer. Preferably, the polymer block is surrounded by the first spacer, the interfacial layer, and the second spacer.
    Type: Application
    Filed: June 13, 2023
    Publication date: October 12, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Fu-Jung Chuang, Tsuo-Wen Lu, Chia-Ming Kuo, Po-Jen Chuang, Chi-Mao Hsu
  • Publication number: 20230327333
    Abstract: A semiconductor device package includes a substrate, a first antenna pattern and a second antenna pattern. The substrate has a first surface and a second surface opposite to the first surface. The first antenna pattern is disposed over the first surface of the substrate. The first antenna pattern has a first bandwidth. The second antenna pattern is disposed over the first antenna pattern. The second antenna pattern has a second bandwidth different from the first bandwidth. The first antenna pattern and the second antenna pattern are at least partially overlapping in a direction perpendicular to the first surface of the substrate.
    Type: Application
    Filed: June 6, 2023
    Publication date: October 12, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Shao-En HSU, Huei-Shyong CHO, Shih-Wen LU
  • Publication number: 20230318228
    Abstract: An electrical connector includes an insulative housing, metal terminals, and a shell. The metal terminals are being disposed in the housing such that contact portions of the terminals are exposed in openings of the housing and arranged to contact conductive portions of a mating connector when the electrical connector and the mating connector are mated. The shell surrounds external surfaces of the housing and includes first and second portions having first and second widths, respectively, and a third portion positioned between the first and second portions and having a third width less that each of the first and second widths. The shell also includes multiple protrusions extending outward from an external surface of the shell. The protrusions limit an insertion distance of the mating connector relative to the electrical connector when the mating connector is misaligned with the electrical connector during a mating operation.
    Type: Application
    Filed: March 30, 2023
    Publication date: October 5, 2023
    Applicant: Amphenol East Asia Limited (Hong Kong)
    Inventor: Lo-Wen Lu
  • Patent number: 11778157
    Abstract: The present invention discloses an image capture device and depth information calculation method thereof. The depth information calculation method includes: acquiring, a stereo camera module, an image information; and determining a re-projection mode according to a usage scenario, and transforming the image information to a depth information corresponding to the re-projection mode according to the re-projection mode. The re-projection mode is planar mode, cylinder mode or spherical mode, and the corresponding coordinate systems are planar coordinate system, cylinder coordinate system and spherical coordinate system respectively.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: October 3, 2023
    Assignee: EYS3D MICROELECTRONICS, CO.
    Inventors: Chih-Chien Cheng, Chiao-Wen Lu, Ming-Hua Lin
  • Patent number: 11768440
    Abstract: A method including: obtaining data based an optical proximity correction for a spatially shifted version of a training design pattern; and training a machine learning model configured to predict optical proximity corrections for design patterns using data regarding the training design pattern and the data based on the optical proximity correction for the spatially shifted version of the training design pattern.
    Type: Grant
    Filed: December 27, 2022
    Date of Patent: September 26, 2023
    Assignee: ASML NETHERLANDS B.V.
    Inventors: Jing Su, Yen-Wen Lu, Ya Luo
  • Patent number: 11756888
    Abstract: A semiconductor device including a substrate having a NMOS region and a PMOS region; a metal gate extending continuously along a first direction from the NMOS region to the PMOS region on the substrate; a first source/drain region extending along a second direction adjacent to two sides of the metal gate on the NMOS region; a second source/drain region extending along the second direction adjacent to two sides of the metal gate on the PMOS region; a first contact plug landing on the second source/drain region adjacent to one side of the metal gate; a second contact plug landing on the second source/drain region adjacent to another side of the metal gate; and a third contact plug landing directly on a portion of the metal gate on the PMOS region and between the first contact plug and the second contact plug.
    Type: Grant
    Filed: October 5, 2021
    Date of Patent: September 12, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Shih-Cheng Chen, Li-Hsuan Ho, Tsuo-Wen Lu, Shih-Hao Liang, Tsung-Hsun Wu, Po-Jen Chuang, Chi-Mao Hsu
  • Patent number: 11749743
    Abstract: A semiconductor device includes a gate structure on a substrate, a first spacer on sidewalls of gate structure, a second spacer on sidewalls of the first spacer, a polymer block adjacent to the first spacer and on a corner between the gate structure and the substrate, an interfacial layer under the polymer block, and a source/drain region adjacent to two sides of the first spacer. Preferably, the polymer block is surrounded by the first spacer, the interfacial layer, and the second spacer.
    Type: Grant
    Filed: October 18, 2022
    Date of Patent: September 5, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Fu-Jung Chuang, Tsuo-Wen Lu, Chia-Ming Kuo, Po-Jen Chuang, Chi-Mao Hsu