Patents by Inventor Wen Sung

Wen Sung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9881902
    Abstract: A semiconductor package includes a substrate, a first electronic component, a first conductive layer, a first pillar layer and a first package body. The first electronic component is disposed on the substrate. The first pillar layer connects the first conductive layer and the substrate. The first package body encapsulates the first conductive layer, the first pillar layer and the first electronic component. The first conductive layer is embedded in the first package body.
    Type: Grant
    Filed: May 24, 2016
    Date of Patent: January 30, 2018
    Assignee: MEDIATEK INC.
    Inventors: Wen-Sung Hsu, Shih-Chin Lin, Tao Cheng
  • Patent number: 9868975
    Abstract: The invention utilizes virtual screening strategy to seek for current market drugs as anti-schizophrenia therapy drug repurposing. Drug repurposing strategy finds new uses other than the original medical indications of existing drugs. Finding new indications for such drugs will benefit patients who are in needs for a potential new therapy sooner since known drugs are usually with acceptable safety and pharmacokinetic profiles. In this study, repurposing marketed drugs for DAAO inhibitor as new schizophrenia therapy was performed with virtual screening on marketed drugs and its metabolites. The identified and available drugs and compounds were further confirmed with in vitro DAAO enzymatic inhibitory assay.
    Type: Grant
    Filed: April 30, 2015
    Date of Patent: January 16, 2018
    Assignees: National Taiwan University, National Chiao Tung University, National Health Research Institutes
    Inventors: Yufeng Jane Tseng, Yu-Li Liu, Chung-Ming Sun, Hai-Gwo Hwu, Chih-Min Liu, Wen-Sung Lai
  • Patent number: 9852973
    Abstract: A manufacturing method of a package substrate is provided. The method includes forming a first circuit layer on a carrier. A passive component is disposed on the first circuit layer and the carrier. A dielectric layer is formed on the carrier to embed the passive component and the first circuit layer in the dielectric layer. A second circuit layer is formed on the dielectric layer. The carrier is removed from the dielectric layer. A manufacturing method of a chip package is also provided.
    Type: Grant
    Filed: March 10, 2017
    Date of Patent: December 26, 2017
    Assignee: MEDIATEK INC.
    Inventors: Wen-Sung Hsu, Ta-Jen Yu
  • Publication number: 20170338183
    Abstract: A manufacturing method of a semiconductor package includes the follow steps. Firstly, a carrier is provided. Then, a package substrate is formed. Then, a first electronic component is disposed above the second conductive layer of the package substrate. Then, a second package body encapsulating the first electronic component and the second conductive layer is formed. Then, the carrier is carried. Wherein in the step of forming the package substrate includes a step of forming a first conductive layer on the carrier, a step of forming a first pillar layer on the first conductive layer, a step of forming a first package body encapsulating the first conductive layer and the first pillar layer and a step of forming a second conductive layer on the first pillar layer.
    Type: Application
    Filed: August 9, 2017
    Publication date: November 23, 2017
    Inventors: Wen-Sung Hsu, Shih-Chin Lin, Tao Cheng, Andrew C. Chang
  • Patent number: 9761534
    Abstract: A semiconductor package includes a package substrate, a first electronic component and a second package body. The package substrate includes a first conductive layer, a first pillar layer, a first package body and a second conductive layer, wherein the first pillar layer is formed on the first conductive layer, the first package body encapsulates the first conductive layer and the first pillar layer, and the second conductive layer electrically connects to the first pillar layer. The first electronic component is disposed above the second conductive layer of the package substrate. The second package body encapsulates the first electronic component and the second conductive layer.
    Type: Grant
    Filed: May 24, 2016
    Date of Patent: September 12, 2017
    Assignee: MEDIATEK INC.
    Inventors: Wen-Sung Hsu, Shih-Chin Lin, Tao Cheng, Andrew C. Chang
  • Publication number: 20170252262
    Abstract: An assembling type sports instrument comprises a hollow column and a plurality of assembly parts. The hollow column includes an outer surface on the outer circumference thereof, an inner surface on the inner circumference thereof, and a plurality of column through-holes each penetrating the outer surface and the inner surface. Each assembly part includes a massage member and a connection member connected with the massage member. Each massage member comprises a construction at one end, which is far away from the connection member. Each connection member can be detachably connected with one of the column through-holes. While one assembly part is connected with the column through-hole, the construction thereof protrudes from the outer surface.
    Type: Application
    Filed: March 4, 2016
    Publication date: September 7, 2017
    Inventor: WEN-SUNG CHANG
  • Publication number: 20170194227
    Abstract: A semiconductor package includes a substrate, a first electronic component, a film and a package body. The first electronic component is disposed on the substrate and has an upper surface. The film is disposed on the upper surface of the first electronic component. The package body encapsulates the first electronic component and the film.
    Type: Application
    Filed: November 3, 2016
    Publication date: July 6, 2017
    Inventors: Wen-Sung Hsu, Shih-Chin Lin, Ming-Jen Hsiung
  • Publication number: 20170186676
    Abstract: A semiconductor package is provided. In one configuration, the semiconductor package includes a substrate having a die attach surface. A conductive trace is disposed on the substrate, wherein the conductive trace is elongated and carries a signal or a ground across at least a portion of the substrate. A die is mounted on the die attach surface of the substrate via a conductive pillar bump, the conductive pillar bump being rounded and elongated such that the conductive pillar bump extends along a length of the conductive trace and contacts the conductive trace at an end or at an intermediate portion thereof. The die further includes a metal pad electrically coupling to the conductive pillar bump, wherein the metal pad has a first edge and a second edge substantially vertical to the first edge, and wherein the first edge is not adjacent to the second edge.
    Type: Application
    Filed: March 16, 2017
    Publication date: June 29, 2017
    Inventors: Wen-Sung HSU, Tzu-Hung LIN, Ta-Jen YU
  • Publication number: 20170186709
    Abstract: A manufacturing method of a package substrate is provided. The method includes forming a first circuit layer on a carrier. A passive component is disposed on the first circuit layer and the carrier. A dielectric layer is formed on the carrier to embed the passive component and the first circuit layer in the dielectric layer. A second circuit layer is formed on the dielectric layer. The carrier is removed from the dielectric layer. A manufacturing method of a chip package is also provided.
    Type: Application
    Filed: March 10, 2017
    Publication date: June 29, 2017
    Inventors: Wen-Sung HSU, Ta-Jen YU
  • Publication number: 20170155745
    Abstract: A fastening device is used to snap and carry an electronic device which includes a plurality of positioning holes on its bottom side. The fastening device has a sliding unit and a carrier unit. The sliding unit is used to connect with and carry the electronic device and includes two guiding rails, a pushing portion, and a plurality of positioning pins. The carrier unit is connected with the sliding unit and comprises a plate, a plurality of first limiting units, a plurality of second limiting units, and a link-handle. Through the fastening device, the assembly process for the electronic device is simplified.
    Type: Application
    Filed: March 27, 2016
    Publication date: June 1, 2017
    Inventor: Tzu Wen SUNG
  • Patent number: 9664519
    Abstract: A positioning system adapted to be assembled in an enclosed space, includes a positioning device having a directional arithmetic unit and a positional arithmetic unit; and a plurality of sensors, each sensor electrically connected to the directional arithmetic unit and the positional arithmetic unit of the positioning device. Under this arrangement, the directional arithmetic unit and the positional arithmetic unit of the positioning device accurately measures a current position of an object in the enclosed space, via a time difference between the sensors and an output value of a voltage of each sensor.
    Type: Grant
    Filed: July 18, 2013
    Date of Patent: May 30, 2017
    Inventor: Wen-Sung Lee
  • Publication number: 20170136582
    Abstract: A semiconductor package includes a first substrate, a second substrate, a composite solder ball and a first semiconductor component. The composite solder ball includes a core, an encapsulating layer and a barrier layer. The composite solder ball is disposed between the first substrate and the second substrate for electrically connecting the first substrate and the second substrate. The barrier layer is disposed between the core and the encapsulating layer. Wherein a melting point of the barrier layer is higher than a melting point of the core, the melting point of the core is higher than a melting point of the encapsulating layer. The first semiconductor component is disposed between the first substrate and the second substrate.
    Type: Application
    Filed: January 31, 2017
    Publication date: May 18, 2017
    Inventors: Tao Cheng, Wen-Sung Hsu, Shih-Chin Lin
  • Patent number: 9640052
    Abstract: A home intellectual positioning system for use in a house, the system includes a power supply, a sound sensor, a thermal sensor, an identification unit and an intellectual processor. The sound sensor is provided for detecting and tracking a sonic wave of a home member to generate a sonic wave value. The thermal sensor is provided for detecting and tracking a body temperature of the home member to generate a body temperature value. The identification unit is provided for storing sonic wave information and body temperature information of a plurality of home members. The intellectual processor is interconnected to the identification unit, and to compare the sonic wave value of the sound sensor with the sonic wave information and the body temperature value of the thermal sensor with the body temperature information to identify which home member stays in the house.
    Type: Grant
    Filed: April 25, 2014
    Date of Patent: May 2, 2017
    Inventor: Wen-Sung Lee
  • Patent number: 9633936
    Abstract: A semiconductor package is provided. In one configuration, the semiconductor package includes a substrate. First and second conductive traces are disposed on the substrate. A conductive pillar bump is disposed on the second conductive trace, and a first conductive structure is disposed between the second conductive trace and the conductive pillar bump or between the second conductive trace and the substrate. A semiconductor die is disposed over the first conductive trace, wherein the conductive pillar bump connects to the semiconductor die.
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: April 25, 2017
    Assignee: MEDIATEK INC.
    Inventors: Wen-Sung Hsu, Tzu-Hung Lin, Ta-Jen Yu
  • Patent number: 9627311
    Abstract: A package substrate is provided. The package substrate includes: a dielectric layer; a passive component embedded in the dielectric layer and contacting the dielectric layer; and a circuit layer embedded in the dielectric layer and having a first surface aligned with a second surface of the dielectric layer.
    Type: Grant
    Filed: January 22, 2015
    Date of Patent: April 18, 2017
    Assignee: MEDIATEK INC.
    Inventors: Wen-Sung Hsu, Ta-Jen Yu
  • Patent number: 9603793
    Abstract: The present invention provides a nano/micro bubble system for drug delivery comprising a gas core, a plurality of surfactants and an active ingredient. The surfactants surround the gas core and form a double-layer structure having an inner layer and outer layer. The active ingredient is embedded in a gap formed between the inner layer and the outer layer of the double-layer structure and comprises a nucleic acid, a peptide or a protein.
    Type: Grant
    Filed: November 10, 2014
    Date of Patent: March 28, 2017
    Assignee: NATIONAL TSING HUA UNIVERSITY
    Inventors: Hsing-Wen Sung, Er-Yuan Chuang, Po-Yen Lin
  • Publication number: 20170084541
    Abstract: A semiconductor package includes a package substrate, a first electronic component and a second package body. The package substrate includes a first conductive layer, a first pillar layer, a first package body and a second conductive layer, wherein the first pillar layer is formed on the first conductive layer, the first package body encapsulates the first conductive layer and the first pillar layer, and the second conductive layer electrically connects to the first pillar layer. The first electronic component is disposed above the second conductive layer of the package substrate. The second package body encapsulates the first electronic component and the second conductive layer.
    Type: Application
    Filed: May 24, 2016
    Publication date: March 23, 2017
    Inventors: Wen-Sung Hsu, Shih-Chin Lin, Tao Cheng, Andrew C. Chang
  • Patent number: 9597752
    Abstract: A semiconductor package includes a first substrate, a second substrate, a composite solder ball and a first semiconductor component. The composite solder ball includes a core, an encapsulating layer and a barrier layer. The composite solder ball is disposed between the first substrate and the second substrate for electrically connecting the first substrate and the second substrate. The barrier layer is disposed between the core and the encapsulating layer. Wherein a melting point of the barrier layer is higher than a melting point of the core, the melting point of the core is higher than a melting point of the encapsulating layer. The first semiconductor component is disposed between the first substrate and the second substrate.
    Type: Grant
    Filed: October 21, 2015
    Date of Patent: March 21, 2017
    Assignee: MEDIATEK INC.
    Inventors: Tao Cheng, Wen-Sung Hsu, Shih-Chin Lin
  • Patent number: 9593834
    Abstract: A head lamp device for wearing on a head and emitting lights outwardly is disclosed and comprises a cover member, a main control member, a sensing member, and at least two lamps. The main control member is mounted on the cover member. A receiving unit and a control unit are embedded in the main control member and electrically connected with each other wirelessly or wiredly. The sensing member is electrically connected with the main control member and installed in the cover member. The sensing member is detecting an inclined angle of the head and generating a signal for being transmitted to the main control member and received by the receiving unit. The lamps are electrically connected with the control unit. The lamps are controlled to turn on/off, adjust brightness, and change light-on/off priority by the control unit. The sensing member detects the change of the angle via moving the head.
    Type: Grant
    Filed: July 24, 2015
    Date of Patent: March 14, 2017
    Inventor: Wen-Sung Lee
  • Patent number: D808336
    Type: Grant
    Filed: February 11, 2016
    Date of Patent: January 23, 2018
    Assignee: SCHNEIDER ELECTRIC IT CORPORATION
    Inventors: Yuchen Chien, Wen Sung Wu, Chung-Hui Chen, Chia Pin Wu, Gabriela Isabel Rubio Barraza