Abstract: An embodiment semiconductor device may include an electrical interconnect layer, a bonding pad electrically coupled to the electrical interconnect layer, a stacked film structure including a first film partially covering a surface of the bonding pad and a second film partially covering the first film, a first aperture formed in the first film over a portion of the surface of the bonding pad, a second aperture formed in the second film such that the second aperture is larger than the first aperture and is formed over the first aperture such that the first aperture is located entirely below an area of the second aperture, and a solder material portion formed in contact with the bonding pad. The solder material portion may include a first width that is less than a size of the second aperture such that the solder material portion does not contact the second film.

Abstract: A metal backplate is composed of two parallel plain parts and a flexible part lying two plain parts, and the flexible part has a first surface and a second surface deployed underneath the first surface. The flexible part is etched or etched partially with a plurality of curved first openings which form a first array in a staggered arrangement in order to weaken the flexible part B with rigidity property to be one with bending-resilience property; at the same time, which form in staggered rows or in alignments on the upside and the reverse side of the first surface in order to decrease the unidirectional stress concentration and the warpage problem of the display panel.

Abstract: A method of forming a semiconductor package is provided. The method includes mounting a chip on a package substrate. The method further includes placing a heat spreader over the chip and applying a thermal interface material to a first surface of the heat spreader facing the chip. The heat spreader is flexible. In addition, the method includes attaching the heat spreader to the chip through the thermal interface material by rolling a rod over a second surface of the heat spreader, and the second surface is opposite to the first surface.

Abstract: Package structures and methods of forming package structures are discussed. A package structure, in accordance with some embodiments, includes a large package component, such as a CoWoS, adhered to a large package substrate, such as a printed circuit board, an underfill material disposed between the large package component and the large package substrate, and a stress-release structure with high elongation values formed from photolithography encapsulated by the underfill material. The stress-release structure helping to reduce stress in the underfill material to reduce the risk of underfill cracking caused by the difference in coefficients of thermal expansion between the large package component and the large package substrate.

Abstract: Package structures and methods of forming package structures are discussed. A package structure, in accordance with some embodiments, includes a package component with one or more integrated circuits adhered to a package substrate, a hybrid thermal interface material utilizing a combination of polymer based material with high elongation values and metal based material with high thermal conductivity values. The polymer based thermal interface material placed on the edge of the package component contains the metal based thermal interface material in liquid form.

Abstract: In an embodiment, a device includes: an integrated circuit die including a die connector; a first through via adjacent the integrated circuit die; an encapsulant encapsulating the first through via and the integrated circuit die; and a redistribution structure on the encapsulant, the redistribution structure including a redistribution line, the redistribution line physically and electrically coupled to the die connector of the integrated circuit die, the redistribution line electrically isolated from the first through via, the redistribution line crossing over the first through via.

Abstract: A package structure is provided. The package structure includes a substrate and a chip-containing structure over the substrate. The package structure also includes a protective lid attached to the substrate through a first adhesive element and a second adhesive element. The first adhesive element has a first electrical resistivity, and the second adhesive element has a second electrical resistivity. The second electrical resistivity is greater than the first electrical resistivity. The second adhesive element is closer to a corner edge of the substrate than the first adhesive element, and a portion of the second adhesive element is between the first adhesive element and the chip-containing structure.

Abstract: A package structure and a formation method of a package structure are provided. The method includes disposing a chip structure over a substrate, and forming a first adhesive element over the substrate. The first adhesive element has a first electrical resistivity. The method also includes forming a second adhesive element over the substrate. The second adhesive element has a second electrical resistivity, and the second electrical resistivity is greater than the first electrical resistivity. The method further includes attaching a protective lid to the substrate through the first adhesive element and the second adhesive element. The protective lid surrounds the chip structure and covers a top surface of the chip structure.

Abstract: A method of manufacturing a metal mask includes calendering a metal material, so as to form a metal mask substrate, where the metal mask substrate includes a surface and a plurality of grooves formed in the surface, and the grooves all extend in a direction. The surface has at least one sampling region, while at least two grooves are distributed in the sampling region, where an average area ratio of the area of the grooves within the sampling region to the area of the sampling region ranges between 45% and 68%.

Abstract: A probe head structure is provided. The probe head structure includes a flexible substrate having a top surface and a bottom surface. The probe head structure includes a first probe pillar passing through the flexible substrate. The first probe pillar has a first protruding portion protruding from the bottom surface. The probe head structure includes a redistribution structure on the top surface of the flexible substrate and the first probe pillar. The redistribution structure is in direct contact with the flexible substrate and the first probe pillar. The redistribution structure includes a dielectric structure and a wiring structure in the dielectric structure. The wiring structure is electrically connected to the first probe pillar. The probe head structure includes a wiring substrate over the redistribution structure. The probe head structure includes a first conductive bump connected between the wiring substrate and the redistribution structure.

Abstract: A method of manufacturing a metal mask includes calendering a metal material, so as to form a metal mask substrate, where the metal mask substrate includes a surface and a plurality of grooves formed in the surface, and the grooves all extend in a direction. The surface has at least one sampling region, while at least two grooves are distributed in the sampling region, where an average area ratio of the area of the grooves within the sampling region to the area of the sampling region ranges between 45% and 68%.

Abstract: A substrate for a semiconductor package includes an array of bonding pads on a first surface of the substrate, and a plurality of raised structures adjacent to at least some of the bonding pads on the first surface of the substrate. The raised structures may be configured to control the height of solder balls contacting the array of bonding pads when the package substrate is mounted onto a support substrate. The raised structures may compensate for a deformation of the package substrate so that the co-planarity of the solder balls may be improved, thereby providing an improved solder connection between the package substrate and the support substrate.

Abstract: A method of preparing a metal mask substrate includes providing a metal substrate. Next, a gloss is measured and obtained from the surface of the metal substrate. Next, the gloss is determined whether to be within a predetermined range. When the gloss is determined within the predetermined range, a photolithography process is performed to the metal substrate, where the predetermined range is between 90 GU and 400 GU.

Abstract: A method of manufacturing a metal mask includes calendering a metal material, so as to form a metal mask substrate, where the metal mask substrate includes a surface and a plurality of grooves formed in the surface, and the grooves all extend in a direction. The surface has at least one sampling region, while at least two grooves are distributed in the sampling region, where an average area ratio of the area of the grooves within the sampling region to the area of the sampling region ranges between 45% and 68%.

Abstract: A package structure and a formation method of a package structure are provided. The method includes disposing a chip structure over a substrate, and forming a first adhesive element over the substrate. The first adhesive element has a first electrical resistivity. The method also includes forming a second adhesive element over the substrate. The second adhesive element has a second electrical resistivity, and the second electrical resistivity is greater than the first electrical resistivity. The method further includes attaching a protective lid to the substrate through the first adhesive element and the second adhesive element. The protective lid surrounds the chip structure and covers a top surface of the chip structure.

Abstract: A method of inspecting flatness of substrate is provided and includes providing a substrate. N first inspecting points are selected from the surface of the substrate along a first straight line, where the coordinate of the i-th first inspecting point is (Xi,Yi,Zi). By using a formula “D=?i=1N?1?{square root over ((Xi+1?Xi)2+(Yi+1?Yi)2+(Zi+1?Zi)2)}”, a first measurement length D is calculated. By using a formula “F=(D?S)/S”, a first flatness index F is calculated. S is the horizontal distance between 1st first inspecting point and N-th first inspecting point. When the first flatness index F is larger than a first threshold, the substrate is determined to be unqualified.

Abstract: A metal mask and an inspecting method thereof are provided. In the method, a metal mask having a first and a second long side, a first and a second short side, and plural pattern regions is provided. Afterwards, based on the pattern regions adjacent to the first and second long sides, a first reference straight line adjacent to the first long side and a second reference straight line adjacent to the second long side are defined. Then, a first maximum offset length between the pattern regions adjacent to first long side and first reference straight line is measured. A second maximum offset length between the pattern regions adjacent to second long side and second reference straight line is measured. When a difference between the first and second maximum offset lengths is less than or equal to 20 ?m, the metal mask is determined to meet an inspecting standard.

Abstract: A metal backplate is composed of two parallel plain parts and a flexible part lying two plain parts, and the flexible part has a first surface and a second surface deployed underneath the first surface. The flexible part is etched or etched partially with a plurality of curved first openings which form a first array in a staggered arrangement in order to weaken the flexible part B with rigidity property to be one with bending-resilience property; at the same time, which form in staggered rows or in alignments on the upside and the reverse side of the first surface in order to decrease the unidirectional stress concentration and the warpage problem of the display panel.

Abstract: A method of forming a semiconductor package is provided. The method includes mounting a chip on a package substrate. The method further includes placing a heat spreader over the chip and applying a thermal interface material to a first surface of the heat spreader facing the chip. The heat spreader is flexible. In addition, the method includes attaching the heat spreader to the chip through the thermal interface material by rolling a rod over a second surface of the heat spreader, and the second surface is opposite to the first surface.

Abstract: A semiconductor package is provided. The semiconductor package includes a package substrate. The semiconductor package further includes a first chip and a second chip mounted on the package substrate. The thickness of the first chip is different from that of the second chip. In addition, the semiconductor package includes a heat spreader attached on top of the first chip and top of the second chip. A first portion of the heat spreader over the first chip and a second portion of the heat spreader over the second chip have the same thickness.