Abstract: An electronic device is provided, which includes: a first substrate; a second substrate; a first polarizer, wherein the first substrate is disposed between the second substrate and the first polarizer; and a conductive adhesive disposed on the second substrate, wherein from a top view of the electronic device, a first portion of the conductive adhesive contacts the second substrate and extends along a first extending direction, a second portion of the conductive adhesive contacts the first substrate and extends along a second extending direction, the first extending direction and the second extending direction are different, a length of the second portion of the conductive adhesive along the second extending direction is greater than a length of the first portion of the conductive adhesive along the first extending direction, the first polarizer comprises an arc edge, and the arc edge is adjacent to the conductive adhesive.

Abstract: A semiconductor package is provided, which includes a first chip disposed over a first package substrate, a molding compound surrounding the first chip, a first thermal interface material disposed over the first chip and the molding compound, a heat spreader disposed over the thermal interface material, and a second thermal interface material disposed over the heat spreader. The first thermal interface material and the second thermal interface material have an identical width.

Abstract: A battery module capable of suppressing spread of battery fire including a case, a plurality of battery packs, a plurality of temperature sensors, an energy consumption module and a controller. The case forms an accommodation space, and the battery packs is accommodated in the accommodation space. The temperature sensors are dispersedly configured to the accommodation space, and the temperature sensors respectively detect an ambient temperature around configure locations. The controller is coupled to the temperature sensors, and when the ambient temperature detected by one of the temperature sensors is greater than or equal to a first specific temperature range, the controller controls the energy consumption module to consume a battery capacity of at least one battery pack around the one of the temperature sensors.

Abstract: A package structure is provided. The package structure includes a substrate and a ground structure laterally surrounded by the substrate. The package structure also includes a chip-containing structure over the substrate and a protective lid attached to the substrate through a first adhesive element and a second adhesive element. The ground structure is electrically connected to the protective lid through the first adhesive element. The second adhesive element is closer to a corner edge of the substrate than the first adhesive element, and a portion of the second adhesive element is between the first adhesive element and the chip-containing structure.

Abstract: The present invention discloses a display panel and a display device. The display panel comprises a plurality of common electrode blocks and a plurality of display regions. During a display period, one or more common electrode blocks corresponding to one of the display regions which is to be displayed during the display period are coupled to a common voltage; and during the display period, one or more of the common electrode blocks corresponding to the display regions which are not to be displayed during the display period are kept in a floating state.

Abstract: A method for fabricating a semiconductor device includes steps as follows. A gate material layer is formed on a substrate, wherein the gate material layer includes an amorphous material having a phase transition temperature, and the amorphous material converts into a polycrystalline material at the phase transition temperature. A first hard mask is formed on the gate material layer at a first process temperature, wherein the first process temperature is less than the phase transition temperature. A second hard mask is formed on the first hard mask at a second process temperature, wherein the second process temperature is less than the phase transition temperature.

Abstract: The application provides gene therapies for treating monogenic forms of nephrotic syndrome.

Abstract: Disclosed herein are methods for obtaining antibody-producing cells that express antibody molecules exhibiting high binding affinity for an antigen which comprise contacting a population of antibody-producing cells encompassing cells that express antibody molecules to the antigen on the cell surface, with a first labeled form of the antigen to allow the antigen to bind to the antibody molecules on the cell surface, followed by contacting the cells with (i) an unlabeled form of the antigen, (ii) a second labeled form of the antigen, or (iii) the unlabeled form of the antigen and the second labeled form of the antigen; and collecting cells that remain bound to the first labeled form of the antigen, thereby obtaining cells expressing high affinity antibody molecules to the antigen. The present methods allow for obtaining cells expressing high affinity antibody molecules from a pool of antibody-producing cells that express antibody molecules with different affinities.

Abstract: The invention provides a semiconductor structure, which comprises a material layer, wherein a plurality of resistive random access memory cells are arranged on the material layer in an array, the array comprises a first outer ring, the first outer ring consists of some of the plurality of resistive random access memory cells and is located at the outermost ring of the array, and a peripheral metal layer, which at least connects a plurality of resistive random access memory cells located in the first outer ring in series into a loop.

Abstract: A package structure is provided. The package structure includes a substrate and a chip-containing structure over the substrate. The package structure also includes a protective lid attached to the substrate through a first adhesive element and a second adhesive element. The first adhesive element has a first electrical resistivity, and the second adhesive element has a second electrical resistivity. The second electrical resistivity is greater than the first electrical resistivity. The second adhesive element is closer to a corner edge of the substrate than the first adhesive element, and a portion of the second adhesive element is between the first adhesive element and the chip-containing structure.

Abstract: A reticle thermal expansion calibration method includes exposing a first group of wafers and generating a first sub-recipe, performing data mining and data parsing to generate a plurality of overlay parameters, performing a linear regression on each of the overlay parameters, and generating a first coefficient of determination for each of the overlay parameters.

Abstract: An internally dismantled anti-typhoon soundproof horizontal sliding window, which is fastened to an outer frame body and is provided with at least one outer sliding window and an inner sliding window; it is characterized in that: the outer side of the outer frame body is provided with at least one outer fixing column, an elastically movable top plate is provided on the inside and outside of the outer fixed column; when the two windows are closed, a central control lock can be used to drive the top plate to move through the inner columns of the outer and inner windows inwardly, the top plate squeezes the two inner column clamps tightly; the outer column of the outer frame body is provided with a hook, which can be used for the outer sliding window and the outer column of the inner sliding window; a snap cover that seals the grooves of the outer frame; thus, the window structure can be tightly closed in an all-round way, so as to meet the requirements of windproof, rainproof and sound insulation of the strong t

Abstract: A package structure includes a package substrate, a semiconductor die module on the package substrate, a ring structure on the package substrate adjacent to the semiconductor die module, and a hybrid adhesive having a first modulus and a second modulus less than the first modulus and attaching the ring structure to the package substrate.

Abstract: A machine learning intelligent dispatching system, including a history information module storing various history data, a basic information module storing various basic data, an algorithm module working out predicted runtimes and switching times of recipe groups based on the history data and basic data through machining learning, a robot module working out an optimized schedule result based on the history data and basic data and the predicted times, and a dispatching module dispatching lots according to the optimized schedule result to obtain an actual production result, and the actual production result is fed back to the robot module as a basis for the machine learning.

Abstract: Aspects include providing isolation between a plurality of containers in a pod that are each executing on a different virtual machine (VM) on a host computer. Providing the isolation includes converting a data packet into a serial format for communicating with the host computer. The converted data packet is sent to a router executing on the host computer. The router determines a destination container in the plurality of containers based at least in part on content of the converted data packet and routes the converted data packet to the destination container.

Abstract: A semiconductor device includes a patterned metal layer on a substrate, via conductors on the patterned metal layer, first inter-metal dielectric (IMD) patterns embedded in the patterned metal layer, and a second IMD pattern surrounding the patterned metal layer. Preferably, the first IMD patterns are between and without overlapping the via conductors in a top view.

Abstract: A testkey structure for semiconductor device includes a substrate, a gate structure disposed on the substrate, and a plurality of first dummy gate structures disposed on the substrate and arranged around the gate structure. A bottom surface of the gate structure is lower than bottom surfaces of the first dummy gate structures. A top surface of the gate structure is flush with top surfaces of the first dummy gate structures.

Abstract: The invention provides a method for manufacturing a semiconductor structure, which comprises the following steps: a high voltage metal oxide semiconductor (HVMOS) is provided, the high voltage metal oxide semiconductor comprises a substrate, and the substrate comprises an NMOS region and a PMOS region, the NMOS region and the PMOS region each comprise an oxide layer, a P-type ion doping step on the PMOS region is performed, the thickness of the oxide layer of the PMOS region is reduced during the P-type ion doping step, and an N-type ion doping step is then performed on the NMOS region after the P-type ion doping step, the thickness of the oxide layer of the NMOS region is reduced during the N-type ion doping step.

Abstract: A probe head structure is provided. The probe head structure includes a flexible substrate having a top surface and a bottom surface. The probe head structure includes a first probe pillar passing through the flexible substrate. The probe head structure includes a redistribution structure on the top surface of the flexible substrate and the first probe pillar. The probe head structure includes a wiring substrate over the redistribution structure. The probe head structure includes a first conductive bump connected between the wiring substrate and the redistribution structure.

Abstract: A semiconductor device includes a resistor disposed on a second etching stop layer in the resistor forming region. A fourth interlayer dielectric layer covers the resistor and the second etch stop layer. A first via is located in the fourth interlayer dielectric layer and is electrically connected to a terminal of the resistor. By forming the resistor in BEOL process, the problem of the contact stop depth difference that affects the process window and causes the reduced yield can be improved.