Abstract: The invention provides a semiconductor processing machine, which comprises a plurality of chambers, at least one of the chamber is a load-lock chamber, and the load-lock chamber comprises a bottom surface and a top lid opposite to the bottom surface; and a gas pipeline is connected with the top lid of the load-lock chamber.

Abstract: An embodiment semiconductor package structure may include a package substrate, a semiconductor die coupled to the package substrate, and a package lid attached to the package substrate and covering the semiconductor die. The package lid may include a top portion having a spatially varying thermal conductivity that is greater in a first region than in a second region. The first region may include a multi-layer structure including a metal/diamond composite material supported by a copper layer. The metal/diamond composite material may include a silver/diamond, copper/diamond, or aluminum/diamond material and may have a thermal conductivity that is within a range from 600 W/m·K to 900 W/m·K and a coefficient of thermal expansion that is in a second range from 5 ppm/° C. to 10 ppm/° C. The package lid may have an effective coefficient of thermal expansion that is in a range from 14.5 ppm/° C. to 17 ppm/° C.

Abstract: A test key structure includes a substrate; a first metal pad disposed on the substrate; a second metal pad disposed in proximity to the first metal pad on the substrate; a gap between the first metal pad and the second metal pad; a first contact disposed on the first metal pad; and a second contact disposed on the second metal pad.

Abstract: An injection molding grade PVC tube and a method for producing the same are provided. The injection molding grade PVC tube includes 100 parts by weight of a PVC resin, 2 to 8 parts by weight of a heat stabilizer, 1 to 20 parts by weight of a first additive, and 0.7 to 15 parts by weight of a second additive. The first additive includes a processing modifier and a heat resistance enhancer, and a weight ratio between the processing modifier and the heat resistance enhancer is within a range from 1:6.67 to 1:10. The PVC resin, the heat stabilizer, the first additive, and the second additive are powder-shaped. The injection molding grade PVC tube is formed by direct injection molding after hot melt extrusion of the PVC resin, the heat stabilizer, the first additive, and the second additive.

Abstract: A semiconductor transistor structure includes a substrate with a first conductivity type, a fin structure grown on the substrate, and a gate on the fin structure. The fin structure includes a first epitaxial layer having a second conductivity type opposite to the first conductivity type, a second epitaxial layer on the first epitaxial layer, and a third epitaxial layer having the second conductivity type on the second epitaxial layer.

Abstract: A method of removing a hard mask layer includes providing a gate. A hard mask layer covers and contacts a top surface of the gate. Two spacer structures respectively contacts two sides of the gate. Two first spacers are respectively disposed on the two spacer structures. Later, a wet etching process is performed to remove the hard mask layer and the first spacers and keep the spacer structures. An etchant is utilized in the wet etching process. A selective etching ratio of the silicon nitride to silicon oxide of the etchant is more than 90. The etchant includes Si(OH)4. A concentration of Si(OH)4. is greater than or equal to 3.95 ppm and smaller than or equal to 10 ppm.

Abstract: A method of inspecting flatness of substrate is provided and includes providing a substrate. N first inspecting points are selected from the surface of the substrate along a first straight line, where the coordinate of the i-th first inspecting point is (Xi,Yi,Zi). By using a formula “ D = ? i = 1 N - 1 ? ( X i + 1 - X i ) 2 + ( Y i + 1 - Y i ) 2 + ( Z i + 1 - Z i ) 2 ” , a first measurement length D is calculated. By using a formula “F=(D?S)/S”, a first flatness index F is calculated. S is the horizontal distance between 1st first inspecting point and N-th first inspecting point. When the first flatness index F is larger than a first threshold, the substrate is determined to be unqualified.

Abstract: The invention provides an ion source structure of an ion implanter, which comprises an arc chamber, a filament in the arc chamber, and a cathode in the arc chamber, wherein the cathode has an upper surface and a lower surface, and at least one of the upper surface and the lower surface is non-planar.

Abstract: A method for wafer image equalization includes obtaining a wafer image, converting the wafer image into bitmap data, generating a grayscale distribution of RGB pixels according to the bitmap data, generating a grayscale cumulative probability distribution of the RGB pixels according to the grayscale distribution, generating a mapping function according to the grayscale cumulative probability distribution of the RGB pixels, converting the grayscale distribution of the RGB pixels by the mapping function into an equalized grayscale distribution of the RGB pixels, and generating an equalized wafer image according to the equalized grayscale distribution of the RGB pixels.

Abstract: A multiple-input multiple-output (MIMO) radar device for scanning at least one moving object in space, comprising a transmitting antenna array having a plurality of transmitters, a receiving antenna array having a plurality of receivers, and a processor. The transmitters transmit electromagnetic wave signals with predetermined timing delays to the moving object, the electromagnetic wave signals are configured with random sequences. The receivers receive the electromagnetic wave signals reflected by the moving object, each receiver includes a plurality of matched filters corresponding to the plurality of transmitters, each matched filter obtains the electromagnetic wave signals with the predetermined timing delays from a corresponding transmitter and outputting a value. The processor accumulating the value outputted by each matched filter of each receiver and calculating a 3D cubic aggregate result for showing an existence probability of the at least one moving object in space.

Abstract: The present invention provides a semiconductor device and a method of fabricating the same, which includes a substrate, a gate structure, and a dielectric layer. The gate structure is disposed on the substrate and includes an inverted trapezoidal shape. The dielectric layer is disposed on the substrate, and the gate structure is disposed within the dielectric layer. The gate structure includes a metal gate structure or a polysilicon gate structure.

Abstract: A method of preparing a metal mask substrate includes providing a metal substrate. Next, a gloss is measured and obtained from the surface of the metal substrate. Next, the gloss is determined whether to be within a predetermined range. When the gloss is determined within the predetermined range, a photolithography process is performed to the metal substrate, where the predetermined range is between 90 GU and 400 GU.

Abstract: The invention provides a photoresist coating method, which comprises the following steps: providing a wafer with a pattern on the wafer, placing the wafer on a spinner, injecting a photoresist on a central region of the wafer from a nozzle, and carrying out a spin coating step, the spin coating step comprises: turning on the spinner to rotate the spinner to a first rotation speed, and raising the first rotation speed to a second rotation speed, and performing a plurality of brakes during the process of maintaining the second rotation speed, so that the second rotation speed instantly drops to a third rotation speed, and then rises to the second rotation speed again.

Abstract: A probe head structure is provided. The probe head structure includes a flexible substrate having a top surface and a bottom surface. The probe head structure includes a first probe pillar passing through the flexible substrate. The first probe pillar has a first protruding portion protruding from the bottom surface. The probe head structure includes a redistribution structure on the top surface of the flexible substrate and the first probe pillar. The redistribution structure is in direct contact with the flexible substrate and the first probe pillar. The redistribution structure includes a dielectric structure and a wiring structure in the dielectric structure. The wiring structure is electrically connected to the first probe pillar. The probe head structure includes a wiring substrate over the redistribution structure. The probe head structure includes a first conductive bump connected between the wiring substrate and the redistribution structure.

Abstract: A method of detecting wafer defects based on singularly valuable decomposition is provided in the present invention, including steps of input a wafer image, performing a preprocess to the wafer image through histogram equalization to obtain a preprocessed image, performing singularly valuable decomposition to the preprocessed image, performing defect magnification to the decomposed wafer image, reconstruct the magnified wafer image to obtain a defect saliency image, denoising the defect saliency image, and detecting defects in the denoised wafer image.

Abstract: A lithography film stack applied to an immersion lithography process includes a photoresist, a wavelength adjusting layer and a top coating layer. The photoresist is disposed on a substrate. The wavelength adjusting layer is disposed on the photoresist. The top coating layer is disposed on the wavelength adjusting layer. A refractive index of the wavelength adjusting layer is greater than a refractive index of the top coating layer and a refractive index of an immersion fluid of the immersion lithography process.

Abstract: Aspects of the invention include systems and methods configured to prevent masquerading service attacks. A non-limiting example computer-implemented method includes sending, from a first server in a cloud environment, a communication request comprising an application programming interface (API) key and a first server identifier to an identity and access management (IAM) server of the cloud environment. The API key can be uniquely assigned by the IAM server to a first component of the first server. The first server receives a credential that includes a token for the first component and sends the credential to a second server. The second server sends the credential, a second server identifier, and an identifier for a second component of the second server to the IAM server. The second server receives an acknowledgment from the IAM server and sends the acknowledgment to the first server.

Abstract: A machine monitoring system includes a plurality of first machines and a control module. The first machines are for a first process. The control module is connected with the first machines. The control module is configured to: define each of the first machines as a high-risk first machine or a low-risk first machine according to a first risk score of each of the first machines; designate one of the first machines being defined as the high-risk first machine as a selected high-risk first machine; assign an object to be processed by the first process through the selected high-risk first machine to obtain a processed object; and determine whether to continue or stop to use the selected high-risk first machine according to a test result of the processed object.

Abstract: A fitting assembly (100) is provided. The fitting assembly (100) comprises a holder (102) that holds one or more fluidic seal assemblies. The fluidic seal assembly comprises a fitting (104), a ferrule (110) and a tube (112), such as a chromatography column, and optionally comprises a protrusion (118) and a compliant seal material (120). Fluidic connections for a gas chromatography instrument are also provided.

Abstract: A method of inspecting flatness of substrate is provided and includes providing a substrate. N first inspecting points are selected from the surface of the substrate along a first straight line, where the coordinate of the i-th first inspecting point is (Xi,Yi,Zi). By using a formula “D=?i=1N?1?{square root over ((Xi+1?Xi)2+(Yi+1?Yi)2+(Zi+1?Zi)2)}”, a first measurement length D is calculated. By using a formula “F=(D?S)/S”, a first flatness index F is calculated. S is the horizontal distance between 1st first inspecting point and N-th first inspecting point. When the first flatness index F is larger than a first threshold, the substrate is determined to be unqualified.