Patents by Inventor Wen Yi

Wen Yi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7281193
    Abstract: A method for decoding multiword information comprises multiple steps. In step (a), a multiword information cluster, e.g., ECC, including high protective codewords, e.g., BIS, and low protective codewords, e.g., LDC, is provided. In step (b), the high and low protective codewords are stored into a first memory, e.g., DRAM. In step (c), the high protective codewords are decoded to generate high protective word erasure indicators showing whether decoding errors occur. In step (d), the high protective word erasure indicators are stored into a second memory, e.g., SRAM. In step (e), the low protective codewords are decoded. In the meanwhile, an erasure bit for a low protective codeword is marked by finding high protective codewords close to the low protective codeword in the multiword information cluster and looking up the high protective word erasure indicators of the high protective codewords close to the low protective codeword.
    Type: Grant
    Filed: September 27, 2004
    Date of Patent: October 9, 2007
    Assignee: Mediatek Inc.
    Inventors: Wen-Yi Wu, Li-Lien Lin, Jia-Horng Shieh
  • Patent number: 7278738
    Abstract: An eyeglass lens has a front side, a back side, a central portion and a peripheral portion. The lens is coated on one or both of it sides with a reflective coating, an anti-reflective coating or both. The reflective coating and/or the anti-reflective coating in the central portion of the lens is different from the reflective coating and/or anti-reflective coating in the peripheral portion of the lens. In one embodiment, the peripheral portion of the front side of the lens is coated with a reflective coating and the central portion of the back side of the lens is coated with an anti-reflective coating.
    Type: Grant
    Filed: May 21, 2002
    Date of Patent: October 9, 2007
    Assignee: Eye Ojo Corp.
    Inventor: Wen-Yi Hsu
  • Publication number: 20070230073
    Abstract: A high-voltage tolerant power-rail ESD clamp circuit is proposed, in which circuit devices can safely operate under the high power supply voltage that is three times larger than their process limitation without gate-oxide reliability issue. Moreover, an ESD detection circuit is used to effectively improve the whole ESD protection function by substrate-triggered technique. Because only low voltage (1*VDD) devices are used to achieve the object of high voltage (3*VDD) tolerance, the proposed design provides a cost effective power-rail ESD protection solution to chips with mixed-voltage interfaces.
    Type: Application
    Filed: July 5, 2006
    Publication date: October 4, 2007
    Inventors: Ming-Dou Ker, Wen-Yi Chen
  • Patent number: 7274636
    Abstract: A phase locked loop (PLL) for generating an output signal according to an input signal is disclosed. The PLL of the present invention includes a detector for generating a detection signal according to the logical difference between the input signal and a feedback signal, a signal mixer electrically connected to the detector for generating a control signal according to the detection signal and a mixing reference signal, a filtering device electrically connected to the signal mixer for generating an adjust signal according to the control signal, a controllable oscillator electrically connected to the filtering device for generating the output signal according to the adjust signal, and a frequency divider electrically connected to the controllable oscillator for generating the feedback signal and the mixing reference signal according to the output signal. The frequency of the output signal is at least twice the frequency of the input signal.
    Type: Grant
    Filed: December 17, 2004
    Date of Patent: September 25, 2007
    Assignee: Mediatek Incorporation
    Inventors: Hong-Ching Chen, Wen-Yi Wu
  • Patent number: 7274728
    Abstract: A method and apparatus to estimate the channel fade (both the amplitude gain/loss and the phase rotation) to assist the receiver to detect and recover the transmitted signal employs a continuous pilot signal such as the pilot code channel or pilot symbols. The channel estimator uses the same scrambling pattern of pilot channel and coherently integrates the continuous pilot signal to yield a channel estimate. The present invention employs adaptive integration duration to yield a channel estimate. The integration duration of the pilot signal for channel estimation is adaptive and proportional to the Doppler period. The Doppler period is proportional to the inverse of Doppler frequency and is an indicator of how fast the channel changes.
    Type: Grant
    Filed: November 11, 2003
    Date of Patent: September 25, 2007
    Assignee: Intel Corporation
    Inventor: Wen-Yi Kuo
  • Publication number: 20070205800
    Abstract: A circuit for electrostatic discharge (ESD) protection includes a resistor a capacitor connected in series with the resistor, a first transistor including a gate, the gate being connected to a first power supply providing a first voltage to the gate via the resistor and a first terminal connected to the first power supply, a second transistor including a gate, the gate being connected to a second power supply, the second power supply providing a second voltage smaller than the first voltage, the second transistor having a first terminal connected to a second terminal of the first transistor, and a third transistor including a gate, the gate being connected to the second power supply, a first terminal of the third transistor being connected to a second terminal of the second transistor, and a second terminal being connected to a reference voltage different from the first voltage and the second voltage.
    Type: Application
    Filed: March 2, 2006
    Publication date: September 6, 2007
    Inventors: Ming-Dou Ker, Wen-Yi Chen, Che-Hao Chuang
  • Publication number: 20070178227
    Abstract: Epitaxial thin films are formed on textured substrates. An electrode is formed on the exposed surface of the thin film; the textured substrate removed, and second electrode is formed on the thin film on the side opposite the first electrode. A capacitor is thereby formed.
    Type: Application
    Filed: June 15, 2006
    Publication date: August 2, 2007
    Inventors: Andrew Hunt, Girish Deshpande, Wen-Yi Lin, Tzyy-Jiuan Hwang
  • Patent number: 7242460
    Abstract: A method and apparatus for high-resolution 3D imaging ladar system which can penetrate foliage and camouflage to sample fragments of concealed surfaces of interest is disclosed. Samples collected while the ladar moves can be integrated into a coherent object shape. In one embodiment, a system and method for automatic data-driven registration of ladar frames, comprises a coarse search stage, a pairwise fine registration stage using an iterated closest points algorithm, and a multi-view registration strategy. After alignment and aggregation, it is often difficult for human observers to find, assess and recognize objects from a point cloud display. Basic display manipulations, surface fitting techniques, and clutter suppression to enhance visual exploitation of 3D imaging ladar data may be utilized.
    Type: Grant
    Filed: April 16, 2004
    Date of Patent: July 10, 2007
    Assignee: Sarnoff Corporation
    Inventors: Stephen Charles Hsu, Supun Samarasekera, Rakesh Kumar, Wen-Yi Zhao, Keith J. Hanna
  • Patent number: 7236404
    Abstract: A virtual ground NROM array has a matrix of NROM cells in which during an erase operation the non-erasing side of NROM cells are connected to a common node for enhancing the erase uniformity of the NROM array. If an operation requests erasing on the left side of NROM cells, a positive voltage is supplied from an internal power supply to the left side for each of the NROM cells, and the right side for each of the NROM cells is discharged to a common node. If an operation requests erasing the right side of NROM cells, a positive voltage is supplied from the internal power supply to the right side for each of the NROM cells, and the right side for each of the NROM cells is connected to the common node. The voltage level of the common mode is selected to be sufficiently high in order to prevent from punch through while at the same time sufficiently low to maintain the lateral electric field for erase operation to function optimally.
    Type: Grant
    Filed: August 24, 2005
    Date of Patent: June 26, 2007
    Assignee: Macronix International Co. Ltd.
    Inventors: Ching Chung Lin, Ken Hui Chen, Nai Ping Kuo, Han Sung Chen, Chun Hsiung Hung, Wen Yi Hsieh
  • Publication number: 20070134955
    Abstract: A panel assembly structure including a first connecting portion, a first screw, a second connecting portion and a second screw for fixing a display panel on a panel cover is provided. The first connecting portion having a first connecting through hole is formed on the cover and extends toward a first side of the panel. The first screw is screwed into the first connecting through hole and a first panel threaded hole on the first side for fastening the first connecting portion and the first side. The second connecting portion having a second connecting through hole is formed on the inner surface of the cover and extends toward a second side of the panel. The second screw is screwed into the second connecting through hole and a second panel threaded hole on the second side of the panel for fastening the second connecting portion and the second side.
    Type: Application
    Filed: July 10, 2006
    Publication date: June 14, 2007
    Applicant: COMPAL ELECTRONICS, INC.
    Inventors: Jung-Sheng Chiang, Po-An Lin, Wen-Yi Huang
  • Publication number: 20070129117
    Abstract: A mobile telecommunication device with a front embedded battery includes a casing, a keypad, a first fixing unit, a second fixing unit and a battery. The casing has a front surface and a cavity, while an open end of the cavity is exposed over the front surface. The keypad is moveably disposed on the front surface for opening or closing the open end of the cavity. The first fixing unit is disposed between the casing and the keypad for fixing the keypad position relative to the casing. The second fixing unit is disposed between the casing and the keypad for fixing the keypad position relative to the casing. The battery is stored inside the cavity.
    Type: Application
    Filed: June 2, 2006
    Publication date: June 7, 2007
    Inventors: Ying-Xing Lee, Hsi-Yung Liu, Wen-Yi Kuo
  • Publication number: 20070106688
    Abstract: A network-based data feedback processing method and system is proposed, which is designed for use in conjunction with a network system, and which is characterized by the capability of feeding the data stored in the database of a material dispatching management system on a data server on a remote side back to an ERP management system on a business-side server on a local side, for the purpose of allowing all the related working personnel of a business organization, such as purchase personnel, inventory management personnel, accounting personnel, and so on, to inquire into the feedback data via their own ERP management system. This feature can help enhance the efficiency of custom-related works in the enterprise.
    Type: Application
    Filed: October 25, 2005
    Publication date: May 10, 2007
    Applicant: Inventec Corporation
    Inventors: Wen-Yi Chang, Acky Tang
  • Patent number: 7208965
    Abstract: A method of preparing a planar view TEM sample of a planar portion of a circuit layer structure formed on a substrate. The method includes polishing the substrate circuit layer structure until a cross-sectional polishing face has substantially reached a first side face of the planar portion of the circuit layer structure; forming a trench structure in the cross-sectional polishing face. The trench structure extends into the cross-sectional polishing face substantially in the direction parallel to the substrate such that top and bottom faces of the planar portion of the circuit layer structure are exposed, wherein the planar portion of the circuit layer structure extends substantially parallel to the substrate from the first side face. The method further includes performing a cut around the first side face to free the planar portion of the circuit layer structure.
    Type: Grant
    Filed: December 23, 2004
    Date of Patent: April 24, 2007
    Assignee: Systems on Silicon Manufacturing Co. Pte. Ltd.
    Inventors: Wen Yi Zhang, Siew Khim Oh
  • Patent number: 7209302
    Abstract: A hinge with a positioning and limiting assembly is mounted on an electronic device with a camera and has a stationary bracket, a pivot cylinder, a stationary positioning ring and a rotating positioning ring. The stationary bracket is attached to the electronic device and has a mounting ring. The pivot cylinder is mounted rotatably through the mounting ring. The stationary positioning ring is mounted around the pivot cylinder, connects to the mounting ring and has a positioning protrusion formed on and protruding from the stationary positioning ring. The rotating positioning ring is connected to the pivot cylinder, presses against the stationary positioning ring and has multiple detents. The detents engage the positioning protrusion to hold the camera lens in place.
    Type: Grant
    Filed: May 8, 2006
    Date of Patent: April 24, 2007
    Assignee: Shin Zu Shing Co., Ltd.
    Inventor: Wen-Yi Kuo
  • Patent number: 7203888
    Abstract: The present invention is a correcting system for correcting a linear block code generated by coding an original data via a data coding process when a predetermined correction portion of an original data is corrected by a variant correction data. The correcting system comprises a coding module and a correcting module. The coding module is used to code the variant correction data via the data coding process to generate a corresponding variant correction code. The correcting module is used to store the variant correction code and calculate the variant correction code and the linear block code to generate a substitute code to substitute the linear block code. Therefore, if the data is modified after an optical recording system has completed coding the data, the optical recording system could add the substitute code to generate the renewed linear block code, unnecessarily reprocessing the complicated data coding process.
    Type: Grant
    Filed: August 27, 2003
    Date of Patent: April 10, 2007
    Assignee: MediaTek Inc.
    Inventors: Li-Lien Lin, Wen-Yi Wu
  • Publication number: 20070075961
    Abstract: A panel of a liquid crystal display panel with a plurality of pixels is disclosed, wherein each pixel comprises one switch, one pixel electrode and one floating line. The switch comprises a gate, a source, and two drains. The pixel electrode can be electrically connected to the switch through the drain. Besides, each floating conductive line and two drains of the same switch are crossed but electrically disconnected. Hence, the design of the dual drain (or dual source) illustrated above and the combined the technique of laser welding can be used to repair the source-drain leakage of the substrate of the liquid crystal display device.
    Type: Application
    Filed: October 3, 2006
    Publication date: April 5, 2007
    Applicant: Quanta Display Inc.
    Inventors: Wen-Yi Shyu, Chun-Chang Chiu, Liang-Neng Chien
  • Publication number: 20070070830
    Abstract: A recording apparatus and a recording method are provided. Control information is generated by the microcontroller based on the received command. The data preparing unit has a control register and a preparing circuit wherein the control register is used for storing a set of control register values corresponding to the control information, and the preparing circuit is used for generating prepared data based on the set of control register values and storing the prepared data in the data buffer. The recording circuit records on an optical storage media based on the prepared data. The optical storage media has a lead-in area having a plurality of continuous zones. The prepared data includes a plurality of data to be written into the corresponding zones and the plurality of data are stored in the data buffer in the same sequence as the writing sequence to the zones and are read continuously.
    Type: Application
    Filed: September 18, 2006
    Publication date: March 29, 2007
    Applicant: MEDIATEK INC.
    Inventors: Yih-Shin Weng, Wen-Yi Wu, Hong-Ching Chen
  • Patent number: D539831
    Type: Grant
    Filed: October 3, 2005
    Date of Patent: April 3, 2007
    Inventor: Wen Yi Hsu
  • Patent number: D545346
    Type: Grant
    Filed: January 3, 2007
    Date of Patent: June 26, 2007
    Inventor: Wen Yi Hsu
  • Patent number: D549990
    Type: Grant
    Filed: June 3, 2005
    Date of Patent: September 4, 2007
    Inventor: Wen Yi Hsu