Patents by Inventor Xiaoming Chen

Xiaoming Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210334637
    Abstract: In an example, an apparatus comprises a compute engine comprising a high precision component and a low precision component; and logic, at least partially including hardware logic, to receive instructions in the compute engine; select at least one of the high precision component or the low precision component to execute the instructions; and apply a gate to at least one of the high precision component or the low precision component to execute the instructions. Other embodiments are also disclosed and claimed.
    Type: Application
    Filed: May 11, 2021
    Publication date: October 28, 2021
    Applicant: INTEL CORPORATION
    Inventors: Kamal Sinha, Balaji Vembu, Eriko Nurvitadhi, Nicolas C. Galoppo Von Borries, Rajkishore Barik, Tsung-Han Lin, Joydeep Ray, Ping T. Tang, Michael S. Strickland, Xiaoming Chen, Anbang Yao, Tatiana Shpeisman, Abhishek R. Appu, Altug Koker, Farshad Akhbari, Narayan Srinivasa, Feng Chen, Dukhwan Kim, Nadathur Rajagopalan Satish, John C. Weast, Mike B. MacPherson, Linda L. Hurd, Vasanth Ranganathan, Sanjeev S. Jahagirdar
  • Patent number: 11152654
    Abstract: The present application discloses a battery pack including a first battery and a second battery arranged in a stack, the second battery being closer to a center of the battery pack than the first battery in a stacking direction of the first battery and the second battery, wherein the first battery includes a first thermally conductive component and a first electrode assembly, the second battery includes a second thermally conductive component and a second electrode assembly, and a thermal conductivity of the second thermally conductive component is not lower than that of the first thermally conductive component. The battery pack provided by the present application may achieve temperature uniformity while keeping the overall temperature of the battery pack low.
    Type: Grant
    Filed: June 9, 2019
    Date of Patent: October 19, 2021
    Assignee: Dongguan Poweramp Technology Limited
    Inventors: Yi Li, Xiaoming Chen
  • Patent number: 11152743
    Abstract: The present invention provides a transmission high-voltage connector for circuit connection of a transmission of a new-energy vehicle, the transmission comprising a box body and a high-voltage connector covering an opening of the box body, the high-voltage connector comprises a housing, at least one reinforcing sheet and a copper bar, and the copper bar is inserted into and connected to the housing; wherein, the housing is an N-sided polygon, and at most N-1 fixing holes are formed in the housing at positions where two side lines are connected; and at positions where two side lines are connected while no fixing hole is formed, the housing embraces and is connected to the reinforcing sheet. The transmission high-voltage connector provided by the present invention is simple in structure, and has enhanced strength and high-temperature deformation resistance.
    Type: Grant
    Filed: May 14, 2020
    Date of Patent: October 19, 2021
    Assignee: Ningbo Luokexin Auto Parts Co.
    Inventors: Guoqing Sun, Yongping Geng, Xiaoming Chen
  • Patent number: 11139224
    Abstract: A package that includes a substrate having a routing region and a non-routing region along a periphery of the substrate. The non-routing region includes a plurality of vias configured as a shield. The package includes an integrated device coupled to the substrate, and an encapsulation layer located over the substrate such that the encapsulation layer encapsulates the integrated device.
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: October 5, 2021
    Assignee: QUALCOMM Incorporated
    Inventors: Chaoqi Zhang, Rajneesh Kumar, Li-Sheng Weng, Darryl Sheldon Jessie, Suhyung Hwang, Jeahyeong Han, Xiaoming Chen, Jaehyun Yeon
  • Patent number: 11138686
    Abstract: Embodiments described herein provide a graphics processor that can perform a variety of mixed and multiple precision instructions and operations. One embodiment provides a streaming multiprocessor that can concurrently execute multiple thread groups, wherein the streaming multiprocessor includes a single instruction, multiple thread (SIMT) architecture and the streaming multiprocessor is to execute multiple threads for each of multiple instructions. The streaming multiprocessor can perform concurrent integer and floating-point operations and includes a mixed precision core to perform operations at multiple precisions.
    Type: Grant
    Filed: June 19, 2019
    Date of Patent: October 5, 2021
    Assignee: Intel Corporation
    Inventors: Elmoustapha Ould-Ahmed-Vall, Sara S. Baghsorkhi, Anbang Yao, Kevin Nealis, Xiaoming Chen, Altug Koker, Abhishek R. Appu, John C. Weast, Mike B. Macpherson, Dukhwan Kim, Linda L. Hurd, Ben J. Ashbaugh, Barath Lakshmanan, Liwei Ma, Joydeep Ray, Ping T. Tang, Michael S. Strickland
  • Patent number: 11125890
    Abstract: The invention relates to a method carried out by a navigation satellite system (NSS) receiver or a processing entity receiving data therefrom, for estimating parameters useful to determine a position. The NSS receiver observes NSS signals from NSS satellites over multiple epochs. A filter, called “precise estimator”, is operated, which uses state variables, makes use of NSS signals observed by the NSS receiver, and computes its state variable values based on observations that are not derived from NSS signals observed by the NSS receiver. Seeding information is obtained, and a constrained solution, called “seeding- and ambiguity-constrained solution”, is computed by constraining the ambiguities of the precise estimator by the seeding information, by resolving the resulting ambiguities, and by constraining at least one of the other state variables of the precise estimator by the resolved ambiguities. A corresponding system is also disclosed.
    Type: Grant
    Filed: December 4, 2018
    Date of Patent: September 21, 2021
    Assignee: Trimble Inc.
    Inventors: Xiaoming Chen, Nico Reussner, Stephan Seeger
  • Publication number: 20210280406
    Abstract: A universal nanochip for mass spectrometry analysis and preparing method and application of the same, relates to a technical field of mass spectrometry analysis. A main material of the nanochip is a silicon-based semiconductor material, array-type spotting wells are distributed at a surface of the main material, and an inner surface of the spotting well is of a nanostructure; the surface of the main material has a regional hydrophobic modification, and inside the array-type spotting well is a hydrophilic region and outside the spotting well is a hydrophobic region; or outside the array-type spotting well is a hydrophilic region and inside the spotting well is a hydrophobic region. The nanostructure can extract molecules on a surface of a biological tissue sample to be tested, and improves laser energy absorption and utilization, thereby improving ionization efficiency and enhancing mass spectrum signals. The universal nanochip can be widely applied to clinical inspection.
    Type: Application
    Filed: May 24, 2021
    Publication date: September 9, 2021
    Applicant: Hangzhou Well-Healthcare Technologies Co., LTD
    Inventors: Jianmin WU, Xiaoming CHEN, Xisheng CHEN, Qiaoling ZHONG, Chunyan LUAN, Jiekai YU
  • Publication number: 20210269375
    Abstract: The present application belongs to the field of compounds, and particularly relates to the perovskite-type compound ABX3. As a finding of the present application, the structural characteristics of the perovskite type enables the type of compound to be highly stable, thus overcoming the unsafety of an explosive having poor stability in the prior art. Meanwhile, the structural characteristics of the compound, such as rich energetic ligands, as well as the alternately arranged oxidizing energetic anions and reducing organic cations in the space, endow the compound with excellent performance on instantaneously releasing energy at detonation. The resulting three-dimensional structure allows the compound to not only have an energetic material effect but also overcome shortcomings of some existing energetic materials.
    Type: Application
    Filed: December 23, 2020
    Publication date: September 2, 2021
    Applicant: XI'AN CRYSTEN MATERIALS TECHNOLOGY CORPORATION LIMITED
    Inventors: Weixiong ZHANG, Shaoli CHEN, Xiaoming CHEN
  • Publication number: 20210264163
    Abstract: A mechanism is described for facilitating person tracking and data security in machine learning at autonomous machines. A method of embodiments, as described herein, includes detecting, by a camera associated with one or more trackers, a person within a physical vicinity, where detecting includes capturing one or more images the person. The method may further include tracking, by the one or more trackers, the person based on the one or more images of the person, where tracking includes collect tracking data relating to the person. The method may further include selecting a tracker of the one or more trackers as a preferred tracker based on the tracking data.
    Type: Application
    Filed: February 11, 2021
    Publication date: August 26, 2021
    Applicant: Intel Corporation
    Inventors: Mayuresh M. Varerkar, Barnan Das, Narayan Biswal, Stanley J. Baran, Gokcen Cilingir, Nilesh V. Shah, Archie Sharma, Sherine Abdelhak, Sachin Godse, Farshad Akhbari, Narayan Srinivasa, Altug Koker, Nadathur Rajagopalan Satish, Dukhwan Kim, Feng Chen, Abhishek R. Appu, Joydeep Ray, Ping T. Tang, Michael S. Strickland, Xiaoming Chen, Anbang Yao, Tatiana Shpeisman, Vasanth Ranganathan, Sanjeev Jahagirdar
  • Patent number: 11094499
    Abstract: The present invention provides an apparatus of charged-particle beam such as an electron microscope including a specimen table that can slide on a planar surface around the lower pole piece of the objective lens. The specimen table is confined in a specimen stage having one elastic protrusion and one or more elastic force receiving parts (e.g three permanent protrusions) that contact and press the table. When the specimen is under microscopic examination, disturbing vibration cannot generate a force sufficient to overcome the limiting friction between the specimen table and the planar surface of the objective lens. The invention exhibits numerous technical merits such as minimal or zero vibration noise, and improved image quality, among others.
    Type: Grant
    Filed: February 18, 2021
    Date of Patent: August 17, 2021
    Assignee: BORRIES PTE. LTD.
    Inventors: Zhongwei Chen, Xiaoming Chen, Daniel Tang, Liang-Fu Fan
  • Patent number: 11085487
    Abstract: A positioning locking mechanism of a rotational member having a rotational positioning member provided with a positioning groove; a rotational member pivotally connected with the rotational positioning member and rotating around the rotational positioning member; a positioning member arranged in the rotational member and movably meshed with the positioning groove; and a locking operation member arranged in the rotational member to control the motion of the positioning member.
    Type: Grant
    Filed: May 8, 2018
    Date of Patent: August 10, 2021
    Inventor: Xiaoming Chen
  • Patent number: 11080046
    Abstract: A processing apparatus is provided comprising a multiprocessor having a multithreaded architecture. The multiprocessor can execute at least one single instruction to perform parallel mixed precision matrix operations. In one embodiment the apparatus includes a memory interface and an array of multiprocessors coupled to the memory interface. At least one multiprocessor in the array of multiprocessors is configured to execute a fused multiply-add instruction in parallel across multiple threads.
    Type: Grant
    Filed: February 5, 2021
    Date of Patent: August 3, 2021
    Assignee: Intel Corporation
    Inventors: Himanshu Kaul, Mark A. Anders, Sanu K. Mathew, Anbang Yao, Joydeep Ray, Ping T. Tang, Michael S. Strickland, Xiaoming Chen, Tatiana Shpeisman, Abhishek R. Appu, Altug Koker, Kamal Sinha, Balaji Vembu, Nicolas C. Galoppo Von Borries, Eriko Nurvitadhi, Rajkishore Barik, Tsung-Han Lin, Vasanth Ranganathan, Sanjeev Jahagirdar
  • Patent number: 11080813
    Abstract: An apparatus to facilitate compute optimization is disclosed. The apparatus includes a mixed precision core to perform a mixed precision multi-dimensional matrix multiply and accumulate operation on 8-bit and/or 32 bit signed or unsigned integer elements.
    Type: Grant
    Filed: September 26, 2019
    Date of Patent: August 3, 2021
    Assignee: Intel Corporation
    Inventors: Abhishek R. Appu, Altug Koker, Linda L. Hurd, Dukhwan Kim, Mike B. Macpherson, John C. Weast, Feng Chen, Farshad Akhbari, Narayan Srinivasa, Nadathur Rajagopalan Satish, Joydeep Ray, Ping T. Tang, Michael S. Strickland, Xiaoming Chen, Anbang Yao, Tatiana Shpeisman
  • Patent number: 11080811
    Abstract: An apparatus to facilitate compute optimization is disclosed. The apparatus includes a mixed precision core to perform a mixed precision multi-dimensional matrix multiply and accumulate operation on 16-bit and/or 32 bit floating-point elements.
    Type: Grant
    Filed: June 19, 2019
    Date of Patent: August 3, 2021
    Assignee: Intel Corporation
    Inventors: Abhishek R. Appu, Altug Koker, Linda L. Hurd, Dukhwan Kim, Mike B. Macpherson, John C. Weast, Feng Chen, Farshad Akhbari, Narayan Srinivasa, Nadathur Rajagopalan Satish, Joydeep Ray, Ping T. Tang, Michael S. Strickland, Xiaoming Chen, Anbang Yao, Tatiana Shpeisman
  • Patent number: 11074072
    Abstract: One embodiment provides for a compute apparatus comprising a decode unit to decode a single instruction into a decoded instruction that specifies multiple operands including a multi-bit input value and a bipolar binary weight associated with a neural network and an arithmetic logic unit including a multiplier, an adder, and an accumulator register. To execute the decoded instruction, the multiplier is to perform a multiplication operation on the multi-bit input based on the bipolar binary weight to generate an intermediate product and the adder is to add the intermediate product to a value stored in the accumulator register and update the value stored in the accumulator register.
    Type: Grant
    Filed: July 8, 2019
    Date of Patent: July 27, 2021
    Assignee: Intel Corporation
    Inventors: Kevin Nealis, Anbang Yao, Xiaoming Chen, Elmoustapha Ould-Ahmed-Vall, Sara S. Baghsorkhi, Eriko Nurvitadhi, Balaji Vembu, Nicolas C. Galoppo Von Borries, Rajkishore Barik, Tsung-Han Lin, Kamal Sinha
  • Patent number: 11070901
    Abstract: The present application provides a thin-type phone receiver, comprising a housing, a vibration membrane assembly and a coil. The vibration membrane assembly comprises a frame, a diaphragm and a sealing membrane. The coil is sealedly fixed in the mounting area and sealedly sleeved on the frame, and the spreading sealing membrane seals an entirety of a first gap between the frame and the diaphragm, thereby, the vibration membrane assembly separates a mounting cavity of the housing into two cavities that are arranged side by side and separate. When the coil is energized and an electromagnetic field generated by the coil interacts with a fixed magnetic field of the permanent magnets in the phone receiver, the entire diaphragm vibrates, thus, as the coil is sleeved on the vibration membrane assembly to form the thin-type phone receiver.
    Type: Grant
    Filed: February 28, 2019
    Date of Patent: July 20, 2021
    Assignee: SUZHOU YICHUAN ELECTRONIC TECHNOLOGY CO., LTD
    Inventors: Yiqian Wu, Xiaoming Chen
  • Publication number: 20210218105
    Abstract: An output structure of a battery group, including an output terminal, a circuit board, a first terminal, and a conductive member. The first terminal is electrically connected to the circuit board; the conductive member is electrically connected to the circuit board; the first terminal is welded to the conductive member; and the output terminal is welded to the conductive member or the first terminal. In the output structure provided by this application, the output terminal, the first terminal, and the conductive member are fixedly connected by welding. The output structure has advantages such as stable connection, stable welding quality, easy control, and being not easy to loosen, and can effectively avoid the serious heating caused by the increase of internal resistance at the joint, and thus can avoid the risk of a battery fire caused by the heating.
    Type: Application
    Filed: March 30, 2021
    Publication date: July 15, 2021
    Inventors: Xiaoping Liu, Xiaoming Chen, Li Li
  • Publication number: 20210190967
    Abstract: Methods and apparatus for processing of GNSS signals are presented.
    Type: Application
    Filed: March 8, 2021
    Publication date: June 24, 2021
    Inventors: Ulrich Vollath, Nicholas Charles Talbot, Markus Glocker, Xiaoming Chen, Rodrigo Leandro
  • Publication number: 20210182058
    Abstract: A processing apparatus is provided comprising a multiprocessor having a multithreaded architecture. The multiprocessor can execute at least one single instruction to perform parallel mixed precision matrix operations. In one embodiment the apparatus includes a memory interface and an array of multiprocessors coupled to the memory interface. At least one multiprocessor in the array of multiprocessors is configured to execute a fused multiply-add instruction in parallel across multiple threads.
    Type: Application
    Filed: February 5, 2021
    Publication date: June 17, 2021
    Applicant: Intel Corporation
    Inventors: Himanshu Kaul, Mark A. Anders, Sanu K. Mathew, Anbang Yao, Joydeep Ray, Ping T. Tang, Michael S. Strickland, Xiaoming Chen, Tatiana Shpeisman, Abhishek R. Appu, Altug Koker, Kamal Sinha, Balaji Vembu, Nicolas C. Galoppo Von Borries, Eriko Nurvitadhi, Rajkishore Barik, Tsung-Han Lin, Vasanth Ranganathan, Sanjeev Jahagirdar
  • Publication number: 20210175152
    Abstract: A package that includes a substrate having a routing region and a non-routing region along a periphery of the substrate. The non-routing region includes a plurality of vias configured as a shield. The package includes an integrated device coupled to the substrate, and an encapsulation layer located over the substrate such that the encapsulation layer encapsulates the integrated device.
    Type: Application
    Filed: December 5, 2019
    Publication date: June 10, 2021
    Inventors: Chaoqi ZHANG, Rajneesh KUMAR, Li-Sheng WENG, Darryl Sheldon JESSIE, Suhyung HWANG, Jeahyeong HAN, Xiaoming CHEN, Jaehyun YEON