Abstract: The present application provides a thin-type phone receiver, comprising a housing, a vibration membrane assembly and a coil. The vibration membrane assembly comprises a frame, a diaphragm and a sealing membrane. The coil is sealedly fixed in the mounting area and sealedly sleeved on the frame, and the spreading sealing membrane seals an entirety of a first gap between the frame and the diaphragm, thereby, the vibration membrane assembly separates a mounting cavity of the housing into two cavities that are arranged side by side and separate. When the coil is energized and an electromagnetic field generated by the coil interacts with a fixed magnetic field of the permanent magnets in the phone receiver, the entire diaphragm vibrates, thus, as the coil is sleeved on the vibration membrane assembly to form the thin-type phone receiver.

Abstract: An output structure of a battery group, including an output terminal, a circuit board, a first terminal, and a conductive member. The first terminal is electrically connected to the circuit board; the conductive member is electrically connected to the circuit board; the first terminal is welded to the conductive member; and the output terminal is welded to the conductive member or the first terminal. In the output structure provided by this application, the output terminal, the first terminal, and the conductive member are fixedly connected by welding. The output structure has advantages such as stable connection, stable welding quality, easy control, and being not easy to loosen, and can effectively avoid the serious heating caused by the increase of internal resistance at the joint, and thus can avoid the risk of a battery fire caused by the heating.

Abstract: Methods and apparatus for processing of GNSS signals are presented.

Abstract: A processing apparatus is provided comprising a multiprocessor having a multithreaded architecture. The multiprocessor can execute at least one single instruction to perform parallel mixed precision matrix operations. In one embodiment the apparatus includes a memory interface and an array of multiprocessors coupled to the memory interface. At least one multiprocessor in the array of multiprocessors is configured to execute a fused multiply-add instruction in parallel across multiple threads.

Abstract: A package that includes a substrate having a routing region and a non-routing region along a periphery of the substrate. The non-routing region includes a plurality of vias configured as a shield. The package includes an integrated device coupled to the substrate, and an encapsulation layer located over the substrate such that the encapsulation layer encapsulates the integrated device.

Abstract: A mechanism is described for facilitating efficient training of neural networks at computing devices. A method of embodiments, as described herein, includes detecting one or more inputs for training of a neural network, and introducing randomness in floating point (FP) numbers to prevent overtraining of the neural network, where introducing randomness includes replacing less-significant low-order bits of operand and result values with new low-order bits during the training of the neural network.

Abstract: In an example, an apparatus comprises a compute engine comprising a high precision component and a low precision component; and logic, at least partially including hardware logic, to receive instructions in the compute engine; select at least one of the high precision component or the low precision component to execute the instructions; and apply a gate to at least one of the high precision component or the low precision component to execute the instructions. Other embodiments are also disclosed and claimed.

Abstract: Embodiments are generally directed to an adaptive deformable kernel prediction network for image de-noising. An embodiment of a method for de-noising an image by a convolutional neural network implemented on a compute engine, the image including a plurality of pixels, the method comprising: for each of the plurality of pixels of the image, generating a convolutional kernel having a plurality of kernel values for the pixel; generating a plurality of offsets for the pixel respectively corresponding to the plurality of kernel values, each of the plurality of offsets to indicate a deviation from a pixel position of the pixel; determining a plurality of deviated pixel positions based on the pixel position of the pixel and the plurality of offsets; and filtering the pixel with the convolutional kernel and pixel values of the plurality of deviated pixel positions to obtain a de-noised pixel.

Abstract: Embodiments are generally directed to dynamically dividing activations and kernels for improving memory efficiency. An embodiment of a method in a compute engine performing machine learning comprises: receiving, by a convolutional layer of a convolutional neural network (CNN) implemented on the compute engine, a plurality of activation groups contained in an input data, wherein the convolutional layer includes one or more kernel groups and the one or more kernel groups each include a plurality of kernels; determining a plurality of memory efficiency metrics based on the number of activation groups of the plurality of activation groups and the number of kernels of the plurality of kernels; selecting a first optimal number of activation groups and a second optimal number of kernels that are associated with an optimal memory efficiency metric in the plurality of memory efficiency metrics; and performing a convolutional operation on the input data based on the first optimal number and the second optimal number.

Abstract: The present application provides a thin-type phone receiver, comprising a housing, a vibration membrane assembly and a coil. The vibration membrane assembly comprises a frame, a diaphragm and a sealing membrane. The coil is sealedly fixed in the mounting area and sealedly sleeved on the frame, and the spreading sealing membrane seals an entirety of a first gap between the frame and the diaphragm, thereby, the vibration membrane assembly separates a mounting cavity of the housing into two cavities that are arranged side by side and separate. When the coil is energized and an electromagnetic field generated by the coil interacts with a fixed magnetic field of the permanent magnets in the phone receiver, the entire diaphragm vibrates, thus, as the coil is sleeved on the vibration membrane assembly to form the thin-type phone receiver.

Abstract: One embodiment provides for a graphics processing unit to accelerate machine-learning operations, the graphics processing unit comprising a multiprocessor having a single instruction, multiple thread (SIMT) architecture, the multiprocessor to execute at least one single instruction; and a first compute unit included within the multiprocessor, the at least one single instruction to cause the first compute unit to perform a two-dimensional matrix multiply and accumulate operation, wherein to perform the two-dimensional matrix multiply and accumulate operation includes to compute a 32-bit intermediate product of 16-bit operands and to compute a 32-bit sum based on the 32-bit intermediate product.

Abstract: Methods and apparatus for processing of GNSS signals are presented. These include GNSS processing with predicted precise clocks, GNSS processing with mixed-quality data, GNSS processing with time-sequence maintenance, GNSS processing with reduction of position jumps in low-latency solutions, GNSS processing with position blending to bridge reference station changes, and GNSS processing with delta-phase correction for incorrect starting position.

Abstract: One embodiment provides for a general-purpose graphics processing unit including a scheduler to schedule multiple matrix operations for execution by a general-purpose graphics processing unit. The multiple matrix operations are determined based on a single machine learning compute instruction. The single machine learning compute instruction is a convolution instruction and the multiple matrix operations are associated with a convolution operation.

Abstract: A process for cleaning particulate matter from the interior of a muffle of an optical fiber draw furnace includes propagating sound waves through the interior of the muffle at a frequency of from about 75 Hz to about 5000 Hz and an intensity of from about 110 dB to about 160 dB.

Abstract: Some embodiments of the invention relate to methods carried out by an NSS receiver and/or a processing entity capable of receiving data therefrom, for estimating parameters derived from NSS signals useful to determine a position, and for generating protection level(s) for an application relying on NSS observations to produce an estimate of said parameters. A float solution is computed using NSS signals observed by the NSS receiver. A best integer ambiguity combination that minimizes an error norm is identified based on the float solution. Additional integer ambiguity combinations are identified, which have the smallest error norms that, together with the error norm of the best integer ambiguity combination, jointly satisfy the integrity risk. A measure of spread of the best and additional integer ambiguity combinations is computed. The protection level(s) is then generated from the measure of spread. Systems and computer programs are also disclosed.

Abstract: A mechanism is described for facilitating person tracking and data security in machine learning at autonomous machines. A method of embodiments, as described herein, includes detecting, by a camera associated with one or more trackers, a person within a physical vicinity, where detecting includes capturing one or more images the person. The method may further include tracking, by the one or more trackers, the person based on the one or more images of the person, where tracking includes collect tracking data relating to the person. The method may further include selecting a tracker of the one or more trackers as a preferred tracker based on the tracking data.

Abstract: The present application belongs to the field of energetic compounds, and particularly relates to the use of a perovskite-type compound ABX3 as an energetic material. As a finding of the present application, the structural characteristics of the perovskite type enables the type of compound to be highly stable, thus overcoming the unsafety of an explosive having poor stability in the prior art. Meanwhile, the structural characteristics of the compound, such as rich energetic ligands, as well as the alternately arranged oxidizing energetic anions and reducing organic cations in the space, endow the compound with excellent performance on instantaneously releasing energy at detonation. The resulting three-dimensional structure allows the compound to not only have an energetic material effect but also overcome shortcomings of some existing energetic materials.

Abstract: One embodiment provides for a compute apparatus to perform machine learning operations, the compute apparatus comprising a decode unit to decode a single instruction into a decoded instruction, the decoded instruction to cause the compute apparatus to perform a complex machine learning compute operation.

Abstract: A lookup-table type TL-TCAM hardware search engine includes a SL decoder, a TL-TCAM array, and the data stored in the TL-TCAM hardware search engine is obtained by performing lookup table operation in the corresponding TCAM hardware search engine, the SL decoder is used to decode the search word and send it to the TL-TCAM hardware search engine array, and the decoding is to convert a search word SL corresponding to data in a TCAM hardware search engine table into a search word LSL corresponding to TL-TCAM hardware search engine table data, the effect is that TCAM adds a decoder, cooperates with the decoder and by lookup table method converts the TCAM table data to a new circuit unit that can be adapted to the added search line.

Abstract: One embodiment provides an accelerator module comprising a memory stack including multiple memory dies; a graphics processing unit (GPU) coupled with the memory stack via one or more memory controllers, the GPU including a plurality of multiprocessors having a single instruction, multiple thread (SIMT) architecture, the multiprocessors to execute at least one single instruction. The at least one single instruction is to cause at least a portion of the GPU to perform a floating point operation on input having differing precisions. The floating point operation is a two-dimensional matrix multiply and accumulate operation.